2 * i.MX drm driver - LVDS display bridge
4 * Copyright (C) 2012 Sascha Hauer, Pengutronix
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
16 #include <linux/module.h>
17 #include <linux/clk.h>
18 #include <linux/component.h>
20 #include <drm/drm_fb_helper.h>
21 #include <drm/drm_crtc_helper.h>
22 #include <drm/drm_panel.h>
23 #include <linux/mfd/syscon.h>
24 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
25 #include <linux/of_device.h>
26 #include <video/of_display_timing.h>
27 #include <linux/of_graph.h>
28 #include <video/of_videomode.h>
29 #include <linux/regmap.h>
30 #include <linux/videodev2.h>
34 #define DRIVER_NAME "imx-ldb"
36 #define LDB_CH0_MODE_EN_TO_DI0 (1 << 0)
37 #define LDB_CH0_MODE_EN_TO_DI1 (3 << 0)
38 #define LDB_CH0_MODE_EN_MASK (3 << 0)
39 #define LDB_CH1_MODE_EN_TO_DI0 (1 << 2)
40 #define LDB_CH1_MODE_EN_TO_DI1 (3 << 2)
41 #define LDB_CH1_MODE_EN_MASK (3 << 2)
42 #define LDB_SPLIT_MODE_EN (1 << 4)
43 #define LDB_DATA_WIDTH_CH0_24 (1 << 5)
44 #define LDB_BIT_MAP_CH0_JEIDA (1 << 6)
45 #define LDB_DATA_WIDTH_CH1_24 (1 << 7)
46 #define LDB_BIT_MAP_CH1_JEIDA (1 << 8)
47 #define LDB_DI0_VS_POL_ACT_LOW (1 << 9)
48 #define LDB_DI1_VS_POL_ACT_LOW (1 << 10)
49 #define LDB_BGREF_RMODE_INT (1 << 15)
51 #define con_to_imx_ldb_ch(x) container_of(x, struct imx_ldb_channel, connector)
52 #define enc_to_imx_ldb_ch(x) container_of(x, struct imx_ldb_channel, encoder)
56 struct imx_ldb_channel {
58 struct drm_connector connector;
59 struct drm_encoder encoder;
60 struct drm_panel *panel;
61 struct device_node *child;
65 struct drm_display_mode mode;
77 struct regmap *regmap;
79 struct imx_ldb_channel channel[2];
80 struct clk *clk[2]; /* our own clock */
81 struct clk *clk_sel[4]; /* parent of display clock */
82 struct clk *clk_parent[4]; /* original parent of clk_sel */
83 struct clk *clk_pll[2]; /* upstream clock we can adjust */
85 const struct bus_mux *lvds_mux;
88 static enum drm_connector_status imx_ldb_connector_detect(
89 struct drm_connector *connector, bool force)
91 return connector_status_connected;
94 static int imx_ldb_connector_get_modes(struct drm_connector *connector)
96 struct imx_ldb_channel *imx_ldb_ch = con_to_imx_ldb_ch(connector);
99 if (imx_ldb_ch->panel && imx_ldb_ch->panel->funcs &&
100 imx_ldb_ch->panel->funcs->get_modes) {
101 struct drm_display_info *di = &connector->display_info;
103 num_modes = imx_ldb_ch->panel->funcs->get_modes(imx_ldb_ch->panel);
104 if (!imx_ldb_ch->bus_format && di->num_bus_formats)
105 imx_ldb_ch->bus_format = di->bus_formats[0];
110 if (imx_ldb_ch->edid) {
111 drm_mode_connector_update_edid_property(connector,
113 num_modes = drm_add_edid_modes(connector, imx_ldb_ch->edid);
116 if (imx_ldb_ch->mode_valid) {
117 struct drm_display_mode *mode;
119 mode = drm_mode_create(connector->dev);
122 drm_mode_copy(mode, &imx_ldb_ch->mode);
123 mode->type |= DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
124 drm_mode_probed_add(connector, mode);
131 static struct drm_encoder *imx_ldb_connector_best_encoder(
132 struct drm_connector *connector)
134 struct imx_ldb_channel *imx_ldb_ch = con_to_imx_ldb_ch(connector);
136 return &imx_ldb_ch->encoder;
139 static void imx_ldb_encoder_dpms(struct drm_encoder *encoder, int mode)
143 static bool imx_ldb_encoder_mode_fixup(struct drm_encoder *encoder,
144 const struct drm_display_mode *mode,
145 struct drm_display_mode *adjusted_mode)
150 static void imx_ldb_set_clock(struct imx_ldb *ldb, int mux, int chno,
151 unsigned long serial_clk, unsigned long di_clk)
155 dev_dbg(ldb->dev, "%s: now: %ld want: %ld\n", __func__,
156 clk_get_rate(ldb->clk_pll[chno]), serial_clk);
157 clk_set_rate(ldb->clk_pll[chno], serial_clk);
159 dev_dbg(ldb->dev, "%s after: %ld\n", __func__,
160 clk_get_rate(ldb->clk_pll[chno]));
162 dev_dbg(ldb->dev, "%s: now: %ld want: %ld\n", __func__,
163 clk_get_rate(ldb->clk[chno]),
165 clk_set_rate(ldb->clk[chno], di_clk);
167 dev_dbg(ldb->dev, "%s after: %ld\n", __func__,
168 clk_get_rate(ldb->clk[chno]));
170 /* set display clock mux to LDB input clock */
171 ret = clk_set_parent(ldb->clk_sel[mux], ldb->clk[chno]);
174 "unable to set di%d parent clock to ldb_di%d\n", mux,
178 static void imx_ldb_encoder_prepare(struct drm_encoder *encoder)
180 struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
181 struct imx_ldb *ldb = imx_ldb_ch->ldb;
182 int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
185 switch (imx_ldb_ch->bus_format) {
188 "could not determine data mapping, default to 18-bit \"spwg\"\n");
190 case MEDIA_BUS_FMT_RGB666_1X7X3_SPWG:
191 bus_format = MEDIA_BUS_FMT_RGB666_1X18;
193 case MEDIA_BUS_FMT_RGB888_1X7X4_SPWG:
194 bus_format = MEDIA_BUS_FMT_RGB888_1X24;
195 if (imx_ldb_ch->chno == 0 || dual)
196 ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH0_24;
197 if (imx_ldb_ch->chno == 1 || dual)
198 ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH1_24;
200 case MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA:
201 bus_format = MEDIA_BUS_FMT_RGB888_1X24;
202 if (imx_ldb_ch->chno == 0 || dual)
203 ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH0_24 |
204 LDB_BIT_MAP_CH0_JEIDA;
205 if (imx_ldb_ch->chno == 1 || dual)
206 ldb->ldb_ctrl |= LDB_DATA_WIDTH_CH1_24 |
207 LDB_BIT_MAP_CH1_JEIDA;
211 imx_drm_set_bus_format(encoder, bus_format);
214 static void imx_ldb_encoder_commit(struct drm_encoder *encoder)
216 struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
217 struct imx_ldb *ldb = imx_ldb_ch->ldb;
218 int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
219 int mux = imx_drm_encoder_get_mux_id(imx_ldb_ch->child, encoder);
221 drm_panel_prepare(imx_ldb_ch->panel);
224 clk_prepare_enable(ldb->clk[0]);
225 clk_prepare_enable(ldb->clk[1]);
228 if (imx_ldb_ch == &ldb->channel[0] || dual) {
229 ldb->ldb_ctrl &= ~LDB_CH0_MODE_EN_MASK;
230 if (mux == 0 || ldb->lvds_mux)
231 ldb->ldb_ctrl |= LDB_CH0_MODE_EN_TO_DI0;
233 ldb->ldb_ctrl |= LDB_CH0_MODE_EN_TO_DI1;
235 if (imx_ldb_ch == &ldb->channel[1] || dual) {
236 ldb->ldb_ctrl &= ~LDB_CH1_MODE_EN_MASK;
237 if (mux == 1 || ldb->lvds_mux)
238 ldb->ldb_ctrl |= LDB_CH1_MODE_EN_TO_DI1;
240 ldb->ldb_ctrl |= LDB_CH1_MODE_EN_TO_DI0;
244 const struct bus_mux *lvds_mux = NULL;
246 if (imx_ldb_ch == &ldb->channel[0])
247 lvds_mux = &ldb->lvds_mux[0];
248 else if (imx_ldb_ch == &ldb->channel[1])
249 lvds_mux = &ldb->lvds_mux[1];
251 regmap_update_bits(ldb->regmap, lvds_mux->reg, lvds_mux->mask,
252 mux << lvds_mux->shift);
255 regmap_write(ldb->regmap, IOMUXC_GPR2, ldb->ldb_ctrl);
257 drm_panel_enable(imx_ldb_ch->panel);
260 static void imx_ldb_encoder_mode_set(struct drm_encoder *encoder,
261 struct drm_display_mode *orig_mode,
262 struct drm_display_mode *mode)
264 struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
265 struct imx_ldb *ldb = imx_ldb_ch->ldb;
266 int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
267 unsigned long serial_clk;
268 unsigned long di_clk = mode->clock * 1000;
269 int mux = imx_drm_encoder_get_mux_id(imx_ldb_ch->child, encoder);
271 if (mode->clock > 170000) {
273 "%s: mode exceeds 170 MHz pixel clock\n", __func__);
275 if (mode->clock > 85000 && !dual) {
277 "%s: mode exceeds 85 MHz pixel clock\n", __func__);
281 serial_clk = 3500UL * mode->clock;
282 imx_ldb_set_clock(ldb, mux, 0, serial_clk, di_clk);
283 imx_ldb_set_clock(ldb, mux, 1, serial_clk, di_clk);
285 serial_clk = 7000UL * mode->clock;
286 imx_ldb_set_clock(ldb, mux, imx_ldb_ch->chno, serial_clk,
290 /* FIXME - assumes straight connections DI0 --> CH0, DI1 --> CH1 */
291 if (imx_ldb_ch == &ldb->channel[0]) {
292 if (mode->flags & DRM_MODE_FLAG_NVSYNC)
293 ldb->ldb_ctrl |= LDB_DI0_VS_POL_ACT_LOW;
294 else if (mode->flags & DRM_MODE_FLAG_PVSYNC)
295 ldb->ldb_ctrl &= ~LDB_DI0_VS_POL_ACT_LOW;
297 if (imx_ldb_ch == &ldb->channel[1]) {
298 if (mode->flags & DRM_MODE_FLAG_NVSYNC)
299 ldb->ldb_ctrl |= LDB_DI1_VS_POL_ACT_LOW;
300 else if (mode->flags & DRM_MODE_FLAG_PVSYNC)
301 ldb->ldb_ctrl &= ~LDB_DI1_VS_POL_ACT_LOW;
305 static void imx_ldb_encoder_disable(struct drm_encoder *encoder)
307 struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
308 struct imx_ldb *ldb = imx_ldb_ch->ldb;
312 * imx_ldb_encoder_disable is called by
313 * drm_helper_disable_unused_functions without
314 * the encoder being enabled before.
316 if (imx_ldb_ch == &ldb->channel[0] &&
317 (ldb->ldb_ctrl & LDB_CH0_MODE_EN_MASK) == 0)
319 else if (imx_ldb_ch == &ldb->channel[1] &&
320 (ldb->ldb_ctrl & LDB_CH1_MODE_EN_MASK) == 0)
323 drm_panel_disable(imx_ldb_ch->panel);
325 if (imx_ldb_ch == &ldb->channel[0])
326 ldb->ldb_ctrl &= ~LDB_CH0_MODE_EN_MASK;
327 else if (imx_ldb_ch == &ldb->channel[1])
328 ldb->ldb_ctrl &= ~LDB_CH1_MODE_EN_MASK;
330 regmap_write(ldb->regmap, IOMUXC_GPR2, ldb->ldb_ctrl);
332 if (ldb->ldb_ctrl & LDB_SPLIT_MODE_EN) {
333 clk_disable_unprepare(ldb->clk[0]);
334 clk_disable_unprepare(ldb->clk[1]);
338 const struct bus_mux *lvds_mux = NULL;
340 if (imx_ldb_ch == &ldb->channel[0])
341 lvds_mux = &ldb->lvds_mux[0];
342 else if (imx_ldb_ch == &ldb->channel[1])
343 lvds_mux = &ldb->lvds_mux[1];
345 regmap_read(ldb->regmap, lvds_mux->reg, &mux);
346 mux &= lvds_mux->mask;
347 mux >>= lvds_mux->shift;
349 mux = (imx_ldb_ch == &ldb->channel[0]) ? 0 : 1;
352 /* set display clock mux back to original input clock */
353 ret = clk_set_parent(ldb->clk_sel[mux], ldb->clk_parent[mux]);
356 "unable to set di%d parent clock to original parent\n",
359 drm_panel_unprepare(imx_ldb_ch->panel);
362 static struct drm_connector_funcs imx_ldb_connector_funcs = {
363 .dpms = drm_helper_connector_dpms,
364 .fill_modes = drm_helper_probe_single_connector_modes,
365 .detect = imx_ldb_connector_detect,
366 .destroy = imx_drm_connector_destroy,
369 static struct drm_connector_helper_funcs imx_ldb_connector_helper_funcs = {
370 .get_modes = imx_ldb_connector_get_modes,
371 .best_encoder = imx_ldb_connector_best_encoder,
374 static struct drm_encoder_funcs imx_ldb_encoder_funcs = {
375 .destroy = imx_drm_encoder_destroy,
378 static struct drm_encoder_helper_funcs imx_ldb_encoder_helper_funcs = {
379 .dpms = imx_ldb_encoder_dpms,
380 .mode_fixup = imx_ldb_encoder_mode_fixup,
381 .prepare = imx_ldb_encoder_prepare,
382 .commit = imx_ldb_encoder_commit,
383 .mode_set = imx_ldb_encoder_mode_set,
384 .disable = imx_ldb_encoder_disable,
387 static int imx_ldb_get_clk(struct imx_ldb *ldb, int chno)
391 snprintf(clkname, sizeof(clkname), "di%d", chno);
392 ldb->clk[chno] = devm_clk_get(ldb->dev, clkname);
393 if (IS_ERR(ldb->clk[chno]))
394 return PTR_ERR(ldb->clk[chno]);
396 snprintf(clkname, sizeof(clkname), "di%d_pll", chno);
397 ldb->clk_pll[chno] = devm_clk_get(ldb->dev, clkname);
399 return PTR_ERR_OR_ZERO(ldb->clk_pll[chno]);
402 static int imx_ldb_register(struct drm_device *drm,
403 struct imx_ldb_channel *imx_ldb_ch)
405 struct imx_ldb *ldb = imx_ldb_ch->ldb;
408 ret = imx_drm_encoder_parse_of(drm, &imx_ldb_ch->encoder,
413 ret = imx_ldb_get_clk(ldb, imx_ldb_ch->chno);
417 if (ldb->ldb_ctrl & LDB_SPLIT_MODE_EN) {
418 ret = imx_ldb_get_clk(ldb, 1);
423 drm_encoder_helper_add(&imx_ldb_ch->encoder,
424 &imx_ldb_encoder_helper_funcs);
425 drm_encoder_init(drm, &imx_ldb_ch->encoder, &imx_ldb_encoder_funcs,
426 DRM_MODE_ENCODER_LVDS);
428 drm_connector_helper_add(&imx_ldb_ch->connector,
429 &imx_ldb_connector_helper_funcs);
430 drm_connector_init(drm, &imx_ldb_ch->connector,
431 &imx_ldb_connector_funcs, DRM_MODE_CONNECTOR_LVDS);
433 if (imx_ldb_ch->panel)
434 drm_panel_attach(imx_ldb_ch->panel, &imx_ldb_ch->connector);
436 drm_mode_connector_attach_encoder(&imx_ldb_ch->connector,
437 &imx_ldb_ch->encoder);
447 struct imx_ldb_bit_mapping {
450 const char * const mapping;
453 static const struct imx_ldb_bit_mapping imx_ldb_bit_mappings[] = {
454 { MEDIA_BUS_FMT_RGB666_1X7X3_SPWG, 18, "spwg" },
455 { MEDIA_BUS_FMT_RGB888_1X7X4_SPWG, 24, "spwg" },
456 { MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA, 24, "jeida" },
459 static u32 of_get_bus_format(struct device *dev, struct device_node *np)
465 ret = of_property_read_string(np, "fsl,data-mapping", &bm);
469 of_property_read_u32(np, "fsl,data-width", &datawidth);
471 for (i = 0; i < ARRAY_SIZE(imx_ldb_bit_mappings); i++) {
472 if (!strcasecmp(bm, imx_ldb_bit_mappings[i].mapping) &&
473 datawidth == imx_ldb_bit_mappings[i].datawidth)
474 return imx_ldb_bit_mappings[i].bus_format;
477 dev_err(dev, "invalid data mapping: %d-bit \"%s\"\n", datawidth, bm);
482 static struct bus_mux imx6q_lvds_mux[2] = {
486 .mask = IMX6Q_GPR3_LVDS0_MUX_CTL_MASK,
490 .mask = IMX6Q_GPR3_LVDS1_MUX_CTL_MASK,
495 * For a device declaring compatible = "fsl,imx6q-ldb", "fsl,imx53-ldb",
496 * of_match_device will walk through this list and take the first entry
497 * matching any of its compatible values. Therefore, the more generic
498 * entries (in this case fsl,imx53-ldb) need to be ordered last.
500 static const struct of_device_id imx_ldb_dt_ids[] = {
501 { .compatible = "fsl,imx6q-ldb", .data = imx6q_lvds_mux, },
502 { .compatible = "fsl,imx53-ldb", .data = NULL, },
505 MODULE_DEVICE_TABLE(of, imx_ldb_dt_ids);
507 static int imx_ldb_bind(struct device *dev, struct device *master, void *data)
509 struct drm_device *drm = data;
510 struct device_node *np = dev->of_node;
511 const struct of_device_id *of_id =
512 of_match_device(imx_ldb_dt_ids, dev);
513 struct device_node *child;
515 struct imx_ldb *imx_ldb;
520 imx_ldb = devm_kzalloc(dev, sizeof(*imx_ldb), GFP_KERNEL);
524 imx_ldb->regmap = syscon_regmap_lookup_by_phandle(np, "gpr");
525 if (IS_ERR(imx_ldb->regmap)) {
526 dev_err(dev, "failed to get parent regmap\n");
527 return PTR_ERR(imx_ldb->regmap);
533 imx_ldb->lvds_mux = of_id->data;
535 dual = of_property_read_bool(np, "fsl,dual-channel");
537 imx_ldb->ldb_ctrl |= LDB_SPLIT_MODE_EN;
540 * There are three different possible clock mux configurations:
541 * i.MX53: ipu1_di0_sel, ipu1_di1_sel
542 * i.MX6q: ipu1_di0_sel, ipu1_di1_sel, ipu2_di0_sel, ipu2_di1_sel
543 * i.MX6dl: ipu1_di0_sel, ipu1_di1_sel, lcdif_sel
544 * Map them all to di0_sel...di3_sel.
546 for (i = 0; i < 4; i++) {
549 sprintf(clkname, "di%d_sel", i);
550 imx_ldb->clk_sel[i] = devm_clk_get(imx_ldb->dev, clkname);
551 if (IS_ERR(imx_ldb->clk_sel[i])) {
552 ret = PTR_ERR(imx_ldb->clk_sel[i]);
553 imx_ldb->clk_sel[i] = NULL;
557 imx_ldb->clk_parent[i] = clk_get_parent(imx_ldb->clk_sel[i]);
562 for_each_child_of_node(np, child) {
563 struct imx_ldb_channel *channel;
564 struct device_node *port;
566 ret = of_property_read_u32(child, "reg", &i);
567 if (ret || i < 0 || i > 1)
571 dev_warn(dev, "dual-channel mode, ignoring second output\n");
575 if (!of_device_is_available(child))
578 channel = &imx_ldb->channel[i];
579 channel->ldb = imx_ldb;
581 channel->child = child;
584 * The output port is port@4 with an external 4-port mux or
585 * port@2 with the internal 2-port mux.
587 port = of_graph_get_port_by_id(child, imx_ldb->lvds_mux ? 4 : 2);
589 struct device_node *endpoint, *remote;
591 endpoint = of_get_child_by_name(port, "endpoint");
593 remote = of_graph_get_remote_port_parent(endpoint);
595 channel->panel = of_drm_find_panel(remote);
597 return -EPROBE_DEFER;
598 if (!channel->panel) {
599 dev_err(dev, "panel not found: %s\n",
601 return -EPROBE_DEFER;
606 edidp = of_get_property(child, "edid", &channel->edid_len);
608 channel->edid = kmemdup(edidp, channel->edid_len,
610 } else if (!channel->panel) {
611 ret = of_get_drm_display_mode(child, &channel->mode,
614 channel->mode_valid = 1;
617 channel->bus_format = of_get_bus_format(dev, child);
618 if (channel->bus_format == -EINVAL) {
620 * If no bus format was specified in the device tree,
621 * we can still get it from the connected panel later.
623 if (channel->panel && channel->panel->funcs &&
624 channel->panel->funcs->get_modes)
625 channel->bus_format = 0;
627 if (channel->bus_format < 0) {
628 dev_err(dev, "could not determine data mapping: %d\n",
629 channel->bus_format);
630 return channel->bus_format;
633 ret = imx_ldb_register(drm, channel);
638 dev_set_drvdata(dev, imx_ldb);
643 static void imx_ldb_unbind(struct device *dev, struct device *master,
646 struct imx_ldb *imx_ldb = dev_get_drvdata(dev);
649 for (i = 0; i < 2; i++) {
650 struct imx_ldb_channel *channel = &imx_ldb->channel[i];
652 if (!channel->connector.funcs)
655 channel->connector.funcs->destroy(&channel->connector);
656 channel->encoder.funcs->destroy(&channel->encoder);
658 kfree(channel->edid);
662 static const struct component_ops imx_ldb_ops = {
663 .bind = imx_ldb_bind,
664 .unbind = imx_ldb_unbind,
667 static int imx_ldb_probe(struct platform_device *pdev)
669 return component_add(&pdev->dev, &imx_ldb_ops);
672 static int imx_ldb_remove(struct platform_device *pdev)
674 component_del(&pdev->dev, &imx_ldb_ops);
678 static struct platform_driver imx_ldb_driver = {
679 .probe = imx_ldb_probe,
680 .remove = imx_ldb_remove,
682 .of_match_table = imx_ldb_dt_ids,
687 module_platform_driver(imx_ldb_driver);
689 MODULE_DESCRIPTION("i.MX LVDS driver");
690 MODULE_AUTHOR("Sascha Hauer, Pengutronix");
691 MODULE_LICENSE("GPL");
692 MODULE_ALIAS("platform:" DRIVER_NAME);