drivers/net/ethernet/qlogic/qlcnic/qlcnic_sriov_common.c

   1 /*
   2  * QLogic qlcnic NIC Driver
   3  * Copyright (c) 2009-2013 QLogic Corporation
   4  *
   5  * See LICENSE.qlcnic for copyright and licensing details.
   6  */
   7
   8 #include "qlcnic_sriov.h"
   9 #include "qlcnic.h"
  10 #include "qlcnic_83xx_hw.h"
  11 #include <linux/types.h>
  12
  13 #define QLC_BC_COMMAND  0
  14 #define QLC_BC_RESPONSE 1
  15
  16 #define QLC_MBOX_RESP_TIMEOUT           (10 * HZ)
  17 #define QLC_MBOX_CH_FREE_TIMEOUT        (10 * HZ)
  18
  19 #define QLC_BC_MSG              0
  20 #define QLC_BC_CFREE            1
  21 #define QLC_BC_FLR              2
  22 #define QLC_BC_HDR_SZ           16
  23 #define QLC_BC_PAYLOAD_SZ       (1024 - QLC_BC_HDR_SZ)
  24
  25 #define QLC_DEFAULT_RCV_DESCRIPTORS_SRIOV_VF            2048
  26 #define QLC_DEFAULT_JUMBO_RCV_DESCRIPTORS_SRIOV_VF      512
  27
  28 #define QLC_83XX_VF_RESET_FAIL_THRESH   8
  29 #define QLC_BC_CMD_MAX_RETRY_CNT        5
  30
  31 static void qlcnic_sriov_vf_free_mac_list(struct qlcnic_adapter *);
  32 static int qlcnic_sriov_alloc_bc_mbx_args(struct qlcnic_cmd_args *, u32);
  33 static void qlcnic_sriov_vf_poll_dev_state(struct work_struct *);
  34 static void qlcnic_sriov_vf_cancel_fw_work(struct qlcnic_adapter *);
  35 static void qlcnic_sriov_cleanup_transaction(struct qlcnic_bc_trans *);
  36 static int qlcnic_sriov_issue_cmd(struct qlcnic_adapter *,
  37                                   struct qlcnic_cmd_args *);
  38 static void qlcnic_sriov_process_bc_cmd(struct work_struct *);
  39
  40 static struct qlcnic_hardware_ops qlcnic_sriov_vf_hw_ops = {
  41         .read_crb                       = qlcnic_83xx_read_crb,
  42         .write_crb                      = qlcnic_83xx_write_crb,
  43         .read_reg                       = qlcnic_83xx_rd_reg_indirect,
  44         .write_reg                      = qlcnic_83xx_wrt_reg_indirect,
  45         .get_mac_address                = qlcnic_83xx_get_mac_address,
  46         .setup_intr                     = qlcnic_83xx_setup_intr,
  47         .alloc_mbx_args                 = qlcnic_83xx_alloc_mbx_args,
  48         .mbx_cmd                        = qlcnic_sriov_issue_cmd,
  49         .get_func_no                    = qlcnic_83xx_get_func_no,
  50         .api_lock                       = qlcnic_83xx_cam_lock,
  51         .api_unlock                     = qlcnic_83xx_cam_unlock,
  52         .process_lb_rcv_ring_diag       = qlcnic_83xx_process_rcv_ring_diag,
  53         .create_rx_ctx                  = qlcnic_83xx_create_rx_ctx,
  54         .create_tx_ctx                  = qlcnic_83xx_create_tx_ctx,
  55         .del_rx_ctx                     = qlcnic_83xx_del_rx_ctx,
  56         .del_tx_ctx                     = qlcnic_83xx_del_tx_ctx,
  57         .setup_link_event               = qlcnic_83xx_setup_link_event,
  58         .get_nic_info                   = qlcnic_83xx_get_nic_info,
  59         .get_pci_info                   = qlcnic_83xx_get_pci_info,
  60         .set_nic_info                   = qlcnic_83xx_set_nic_info,
  61         .change_macvlan                 = qlcnic_83xx_sre_macaddr_change,
  62         .napi_enable                    = qlcnic_83xx_napi_enable,
  63         .napi_disable                   = qlcnic_83xx_napi_disable,
  64         .config_intr_coal               = qlcnic_83xx_config_intr_coal,
  65         .config_rss                     = qlcnic_83xx_config_rss,
  66         .config_hw_lro                  = qlcnic_83xx_config_hw_lro,
  67         .config_promisc_mode            = qlcnic_83xx_nic_set_promisc,
  68         .change_l2_filter               = qlcnic_83xx_change_l2_filter,
  69         .get_board_info                 = qlcnic_83xx_get_port_info,
  70         .free_mac_list                  = qlcnic_sriov_vf_free_mac_list,
  71 };
  72
  73 static struct qlcnic_nic_template qlcnic_sriov_vf_ops = {
  74         .config_bridged_mode    = qlcnic_config_bridged_mode,
  75         .config_led             = qlcnic_config_led,
  76         .cancel_idc_work        = qlcnic_sriov_vf_cancel_fw_work,
  77         .napi_add               = qlcnic_83xx_napi_add,
  78         .napi_del               = qlcnic_83xx_napi_del,
  79         .shutdown               = qlcnic_sriov_vf_shutdown,
  80         .resume                 = qlcnic_sriov_vf_resume,
  81         .config_ipaddr          = qlcnic_83xx_config_ipaddr,
  82         .clear_legacy_intr      = qlcnic_83xx_clear_legacy_intr,
  83 };
  84
  85 static const struct qlcnic_mailbox_metadata qlcnic_sriov_bc_mbx_tbl[] = {
  86         {QLCNIC_BC_CMD_CHANNEL_INIT, 2, 2},
  87         {QLCNIC_BC_CMD_CHANNEL_TERM, 2, 2},
  88         {QLCNIC_BC_CMD_GET_ACL, 3, 14},
  89         {QLCNIC_BC_CMD_CFG_GUEST_VLAN, 2, 2},
  90 };
  91
  92 static inline bool qlcnic_sriov_bc_msg_check(u32 val)
  93 {
  94         return (val & (1 << QLC_BC_MSG)) ? true : false;
  95 }
  96
  97 static inline bool qlcnic_sriov_channel_free_check(u32 val)
  98 {
  99         return (val & (1 << QLC_BC_CFREE)) ? true : false;
 100 }
 101
 102 static inline bool qlcnic_sriov_flr_check(u32 val)
 103 {
 104         return (val & (1 << QLC_BC_FLR)) ? true : false;
 105 }
 106
 107 static inline u8 qlcnic_sriov_target_func_id(u32 val)
 108 {
 109         return (val >> 4) & 0xff;
 110 }
 111
 112 static int qlcnic_sriov_virtid_fn(struct qlcnic_adapter *adapter, int vf_id)
 113 {
 114         struct pci_dev *dev = adapter->pdev;
 115         int pos;
 116         u16 stride, offset;
 117
 118         if (qlcnic_sriov_vf_check(adapter))
 119                 return 0;
 120
 121         pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
 122         pci_read_config_word(dev, pos + PCI_SRIOV_VF_OFFSET, &offset);
 123         pci_read_config_word(dev, pos + PCI_SRIOV_VF_STRIDE, &stride);
 124
 125         return (dev->devfn + offset + stride * vf_id) & 0xff;
 126 }
 127
 128 int qlcnic_sriov_init(struct qlcnic_adapter *adapter, int num_vfs)
 129 {
 130         struct qlcnic_sriov *sriov;
 131         struct qlcnic_back_channel *bc;
 132         struct workqueue_struct *wq;
 133         struct qlcnic_vport *vp;
 134         struct qlcnic_vf_info *vf;
 135         int err, i;
 136
 137         if (!qlcnic_sriov_enable_check(adapter))
 138                 return -EIO;
 139
 140         sriov  = kzalloc(sizeof(struct qlcnic_sriov), GFP_KERNEL);
 141         if (!sriov)
 142                 return -ENOMEM;
 143
 144         adapter->ahw->sriov = sriov;
 145         sriov->num_vfs = num_vfs;
 146         bc = &sriov->bc;
 147         sriov->vf_info = kzalloc(sizeof(struct qlcnic_vf_info) *
 148                                  num_vfs, GFP_KERNEL);
 149         if (!sriov->vf_info) {
 150                 err = -ENOMEM;
 151                 goto qlcnic_free_sriov;
 152         }
 153
 154         wq = create_singlethread_workqueue("bc-trans");
 155         if (wq == NULL) {
 156                 err = -ENOMEM;
 157                 dev_err(&adapter->pdev->dev,
 158                         "Cannot create bc-trans workqueue\n");
 159                 goto qlcnic_free_vf_info;
 160         }
 161
 162         bc->bc_trans_wq = wq;
 163
 164         wq = create_singlethread_workqueue("async");
 165         if (wq == NULL) {
 166                 err = -ENOMEM;
 167                 dev_err(&adapter->pdev->dev, "Cannot create async workqueue\n");
 168                 goto qlcnic_destroy_trans_wq;
 169         }
 170
 171         bc->bc_async_wq =  wq;
 172         INIT_LIST_HEAD(&bc->async_list);
 173
 174         for (i = 0; i < num_vfs; i++) {
 175                 vf = &sriov->vf_info[i];
 176                 vf->adapter = adapter;
 177                 vf->pci_func = qlcnic_sriov_virtid_fn(adapter, i);
 178                 mutex_init(&vf->send_cmd_lock);
 179                 INIT_LIST_HEAD(&vf->rcv_act.wait_list);
 180                 INIT_LIST_HEAD(&vf->rcv_pend.wait_list);
 181                 spin_lock_init(&vf->rcv_act.lock);
 182                 spin_lock_init(&vf->rcv_pend.lock);
 183                 init_completion(&vf->ch_free_cmpl);
 184
 185                 INIT_WORK(&vf->trans_work, qlcnic_sriov_process_bc_cmd);
 186
 187                 if (qlcnic_sriov_pf_check(adapter)) {
 188                         vp = kzalloc(sizeof(struct qlcnic_vport), GFP_KERNEL);
 189                         if (!vp) {
 190                                 err = -ENOMEM;
 191                                 goto qlcnic_destroy_async_wq;
 192                         }
 193                         sriov->vf_info[i].vp = vp;
 194                         vp->max_tx_bw = MAX_BW;
 195                         vp->spoofchk = true;
 196                         random_ether_addr(vp->mac);
 197                         dev_info(&adapter->pdev->dev,
 198                                  "MAC Address %pM is configured for VF %d\n",
 199                                  vp->mac, i);
 200                 }
 201         }
 202
 203         return 0;
 204
 205 qlcnic_destroy_async_wq:
 206         destroy_workqueue(bc->bc_async_wq);
 207
 208 qlcnic_destroy_trans_wq:
 209         destroy_workqueue(bc->bc_trans_wq);
 210
 211 qlcnic_free_vf_info:
 212         kfree(sriov->vf_info);
 213
 214 qlcnic_free_sriov:
 215         kfree(adapter->ahw->sriov);
 216         return err;
 217 }
 218
 219 void qlcnic_sriov_cleanup_list(struct qlcnic_trans_list *t_list)
 220 {
 221         struct qlcnic_bc_trans *trans;
 222         struct qlcnic_cmd_args cmd;
 223         unsigned long flags;
 224
 225         spin_lock_irqsave(&t_list->lock, flags);
 226
 227         while (!list_empty(&t_list->wait_list)) {
 228                 trans = list_first_entry(&t_list->wait_list,
 229                                          struct qlcnic_bc_trans, list);
 230                 list_del(&trans->list);
 231                 t_list->count--;
 232                 cmd.req.arg = (u32 *)trans->req_pay;
 233                 cmd.rsp.arg = (u32 *)trans->rsp_pay;
 234                 qlcnic_free_mbx_args(&cmd);
 235                 qlcnic_sriov_cleanup_transaction(trans);
 236         }
 237
 238         spin_unlock_irqrestore(&t_list->lock, flags);
 239 }
 240
 241 void __qlcnic_sriov_cleanup(struct qlcnic_adapter *adapter)
 242 {
 243         struct qlcnic_sriov *sriov = adapter->ahw->sriov;
 244         struct qlcnic_back_channel *bc = &sriov->bc;
 245         struct qlcnic_vf_info *vf;
 246         int i;
 247
 248         if (!qlcnic_sriov_enable_check(adapter))
 249                 return;
 250
 251         qlcnic_sriov_cleanup_async_list(bc);
 252         destroy_workqueue(bc->bc_async_wq);
 253
 254         for (i = 0; i < sriov->num_vfs; i++) {
 255                 vf = &sriov->vf_info[i];
 256                 qlcnic_sriov_cleanup_list(&vf->rcv_pend);
 257                 cancel_work_sync(&vf->trans_work);
 258                 qlcnic_sriov_cleanup_list(&vf->rcv_act);
 259         }
 260
 261         destroy_workqueue(bc->bc_trans_wq);
 262
 263         for (i = 0; i < sriov->num_vfs; i++)
 264                 kfree(sriov->vf_info[i].vp);
 265
 266         kfree(sriov->vf_info);
 267         kfree(adapter->ahw->sriov);
 268 }
 269
 270 static void qlcnic_sriov_vf_cleanup(struct qlcnic_adapter *adapter)
 271 {
 272         qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_TERM);
 273         qlcnic_sriov_cfg_bc_intr(adapter, 0);
 274         __qlcnic_sriov_cleanup(adapter);
 275 }
 276
 277 void qlcnic_sriov_cleanup(struct qlcnic_adapter *adapter)
 278 {
 279         if (qlcnic_sriov_pf_check(adapter))
 280                 qlcnic_sriov_pf_cleanup(adapter);
 281
 282         if (qlcnic_sriov_vf_check(adapter))
 283                 qlcnic_sriov_vf_cleanup(adapter);
 284 }
 285
 286 static int qlcnic_sriov_post_bc_msg(struct qlcnic_adapter *adapter, u32 *hdr,
 287                                     u32 *pay, u8 pci_func, u8 size)
 288 {
 289         struct qlcnic_hardware_context *ahw = adapter->ahw;
 290         struct qlcnic_mailbox *mbx = ahw->mailbox;
 291         struct qlcnic_cmd_args cmd;
 292         unsigned long timeout;
 293         int err;
 294
 295         memset(&cmd, 0, sizeof(struct qlcnic_cmd_args));
 296         cmd.hdr = hdr;
 297         cmd.pay = pay;
 298         cmd.pay_size = size;
 299         cmd.func_num = pci_func;
 300         cmd.op_type = QLC_83XX_MBX_POST_BC_OP;
 301         cmd.cmd_op = ((struct qlcnic_bc_hdr *)hdr)->cmd_op;
 302
 303         err = mbx->ops->enqueue_cmd(adapter, &cmd, &timeout);
 304         if (err) {
 305                 dev_err(&adapter->pdev->dev,
 306                         "%s: Mailbox not available, cmd_op=0x%x, cmd_type=0x%x, pci_func=0x%x, op_mode=0x%x\n",
 307                         __func__, cmd.cmd_op, cmd.type, ahw->pci_func,
 308                         ahw->op_mode);
 309                 return err;
 310         }
 311
 312         if (!wait_for_completion_timeout(&cmd.completion, timeout)) {
 313                 dev_err(&adapter->pdev->dev,
 314                         "%s: Mailbox command timed out, cmd_op=0x%x, cmd_type=0x%x, pci_func=0x%x, op_mode=0x%x\n",
 315                         __func__, cmd.cmd_op, cmd.type, ahw->pci_func,
 316                         ahw->op_mode);
 317                 flush_workqueue(mbx->work_q);
 318         }
 319
 320         return cmd.rsp_opcode;
 321 }
 322
 323 static void qlcnic_sriov_vf_cfg_buff_desc(struct qlcnic_adapter *adapter)
 324 {
 325         adapter->num_rxd = QLC_DEFAULT_RCV_DESCRIPTORS_SRIOV_VF;
 326         adapter->max_rxd = MAX_RCV_DESCRIPTORS_10G;
 327         adapter->num_jumbo_rxd = QLC_DEFAULT_JUMBO_RCV_DESCRIPTORS_SRIOV_VF;
 328         adapter->max_jumbo_rxd = MAX_JUMBO_RCV_DESCRIPTORS_10G;
 329         adapter->num_txd = MAX_CMD_DESCRIPTORS;
 330         adapter->max_rds_rings = MAX_RDS_RINGS;
 331 }
 332
 333 int qlcnic_sriov_get_vf_vport_info(struct qlcnic_adapter *adapter,
 334                                    struct qlcnic_info *npar_info, u16 vport_id)
 335 {
 336         struct device *dev = &adapter->pdev->dev;
 337         struct qlcnic_cmd_args cmd;
 338         int err;
 339         u32 status;
 340
 341         err = qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_GET_NIC_INFO);
 342         if (err)
 343                 return err;
 344
 345         cmd.req.arg[1] = vport_id << 16 | 0x1;
 346         err = qlcnic_issue_cmd(adapter, &cmd);
 347         if (err) {
 348                 dev_err(&adapter->pdev->dev,
 349                         "Failed to get vport info, err=%d\n", err);
 350                 qlcnic_free_mbx_args(&cmd);
 351                 return err;
 352         }
 353
 354         status = cmd.rsp.arg[2] & 0xffff;
 355         if (status & BIT_0)
 356                 npar_info->min_tx_bw = MSW(cmd.rsp.arg[2]);
 357         if (status & BIT_1)
 358                 npar_info->max_tx_bw = LSW(cmd.rsp.arg[3]);
 359         if (status & BIT_2)
 360                 npar_info->max_tx_ques = MSW(cmd.rsp.arg[3]);
 361         if (status & BIT_3)
 362                 npar_info->max_tx_mac_filters = LSW(cmd.rsp.arg[4]);
 363         if (status & BIT_4)
 364                 npar_info->max_rx_mcast_mac_filters = MSW(cmd.rsp.arg[4]);
 365         if (status & BIT_5)
 366                 npar_info->max_rx_ucast_mac_filters = LSW(cmd.rsp.arg[5]);
 367         if (status & BIT_6)
 368                 npar_info->max_rx_ip_addr = MSW(cmd.rsp.arg[5]);
 369         if (status & BIT_7)
 370                 npar_info->max_rx_lro_flow = LSW(cmd.rsp.arg[6]);
 371         if (status & BIT_8)
 372                 npar_info->max_rx_status_rings = MSW(cmd.rsp.arg[6]);
 373         if (status & BIT_9)
 374                 npar_info->max_rx_buf_rings = LSW(cmd.rsp.arg[7]);
 375
 376         npar_info->max_rx_ques = MSW(cmd.rsp.arg[7]);
 377         npar_info->max_tx_vlan_keys = LSW(cmd.rsp.arg[8]);
 378         npar_info->max_local_ipv6_addrs = MSW(cmd.rsp.arg[8]);
 379         npar_info->max_remote_ipv6_addrs = LSW(cmd.rsp.arg[9]);
 380
 381         dev_info(dev, "\n\tmin_tx_bw: %d, max_tx_bw: %d max_tx_ques: %d,\n"
 382                  "\tmax_tx_mac_filters: %d max_rx_mcast_mac_filters: %d,\n"
 383                  "\tmax_rx_ucast_mac_filters: 0x%x, max_rx_ip_addr: %d,\n"
 384                  "\tmax_rx_lro_flow: %d max_rx_status_rings: %d,\n"
 385                  "\tmax_rx_buf_rings: %d, max_rx_ques: %d, max_tx_vlan_keys %d\n"
 386                  "\tlocal_ipv6_addr: %d, remote_ipv6_addr: %d\n",
 387                  npar_info->min_tx_bw, npar_info->max_tx_bw,
 388                  npar_info->max_tx_ques, npar_info->max_tx_mac_filters,
 389                  npar_info->max_rx_mcast_mac_filters,
 390                  npar_info->max_rx_ucast_mac_filters, npar_info->max_rx_ip_addr,
 391                  npar_info->max_rx_lro_flow, npar_info->max_rx_status_rings,
 392                  npar_info->max_rx_buf_rings, npar_info->max_rx_ques,
 393                  npar_info->max_tx_vlan_keys, npar_info->max_local_ipv6_addrs,
 394                  npar_info->max_remote_ipv6_addrs);
 395
 396         qlcnic_free_mbx_args(&cmd);
 397         return err;
 398 }
 399
 400 static int qlcnic_sriov_set_pvid_mode(struct qlcnic_adapter *adapter,
 401                                       struct qlcnic_cmd_args *cmd)
 402 {
 403         adapter->rx_pvid = MSW(cmd->rsp.arg[1]) & 0xffff;
 404         adapter->flags &= ~QLCNIC_TAGGING_ENABLED;
 405         return 0;
 406 }
 407
 408 static int qlcnic_sriov_set_guest_vlan_mode(struct qlcnic_adapter *adapter,
 409                                             struct qlcnic_cmd_args *cmd)
 410 {
 411         struct qlcnic_sriov *sriov = adapter->ahw->sriov;
 412         int i, num_vlans;
 413         u16 *vlans;
 414
 415         if (sriov->allowed_vlans)
 416                 return 0;
 417
 418         sriov->any_vlan = cmd->rsp.arg[2] & 0xf;
 419         if (!sriov->any_vlan)
 420                 return 0;
 421
 422         sriov->num_allowed_vlans = cmd->rsp.arg[2] >> 16;
 423         num_vlans = sriov->num_allowed_vlans;
 424         sriov->allowed_vlans = kzalloc(sizeof(u16) * num_vlans, GFP_KERNEL);
 425         if (!sriov->allowed_vlans)
 426                 return -ENOMEM;
 427
 428         vlans = (u16 *)&cmd->rsp.arg[3];
 429         for (i = 0; i < num_vlans; i++)
 430                 sriov->allowed_vlans[i] = vlans[i];
 431
 432         return 0;
 433 }
 434
 435 static int qlcnic_sriov_get_vf_acl(struct qlcnic_adapter *adapter,
 436                                    struct qlcnic_info *info)
 437 {
 438         struct qlcnic_sriov *sriov = adapter->ahw->sriov;
 439         struct qlcnic_cmd_args cmd;
 440         int ret = 0;
 441
 442         ret = qlcnic_sriov_alloc_bc_mbx_args(&cmd, QLCNIC_BC_CMD_GET_ACL);
 443         if (ret)
 444                 return ret;
 445
 446         ret = qlcnic_issue_cmd(adapter, &cmd);
 447         if (ret) {
 448                 dev_err(&adapter->pdev->dev, "Failed to get ACL, err=%d\n",
 449                         ret);
 450         } else {
 451                 sriov->vlan_mode = cmd.rsp.arg[1] & 0x3;
 452                 switch (sriov->vlan_mode) {
 453                 case QLC_GUEST_VLAN_MODE:
 454                         ret = qlcnic_sriov_set_guest_vlan_mode(adapter, &cmd);
 455                         break;
 456                 case QLC_PVID_MODE:
 457                         ret = qlcnic_sriov_set_pvid_mode(adapter, &cmd);
 458                         break;
 459                 }
 460         }
 461
 462         qlcnic_free_mbx_args(&cmd);
 463         return ret;
 464 }
 465
 466 static int qlcnic_sriov_vf_init_driver(struct qlcnic_adapter *adapter)
 467 {
 468         struct qlcnic_hardware_context *ahw = adapter->ahw;
 469         struct qlcnic_info nic_info;
 470         int err;
 471
 472         err = qlcnic_sriov_get_vf_vport_info(adapter, &nic_info, 0);
 473         if (err)
 474                 return err;
 475
 476         err = qlcnic_get_nic_info(adapter, &nic_info, ahw->pci_func);
 477         if (err)
 478                 return -EIO;
 479
 480         err = qlcnic_sriov_get_vf_acl(adapter, &nic_info);
 481         if (err)
 482                 return err;
 483
 484         if (qlcnic_83xx_get_port_info(adapter))
 485                 return -EIO;
 486
 487         qlcnic_sriov_vf_cfg_buff_desc(adapter);
 488         adapter->flags |= QLCNIC_ADAPTER_INITIALIZED;
 489         dev_info(&adapter->pdev->dev, "HAL Version: %d\n",
 490                  adapter->ahw->fw_hal_version);
 491
 492         ahw->physical_port = (u8) nic_info.phys_port;
 493         ahw->switch_mode = nic_info.switch_mode;
 494         ahw->max_mtu = nic_info.max_mtu;
 495         ahw->op_mode = nic_info.op_mode;
 496         ahw->capabilities = nic_info.capabilities;
 497         return 0;
 498 }
 499
 500 static int qlcnic_sriov_setup_vf(struct qlcnic_adapter *adapter,
 501                                  int pci_using_dac)
 502 {
 503         struct qlcnic_dcb *dcb;
 504         int err;
 505
 506         INIT_LIST_HEAD(&adapter->vf_mc_list);
 507         if (!qlcnic_use_msi_x && !!qlcnic_use_msi)
 508                 dev_warn(&adapter->pdev->dev,
 509                          "Device does not support MSI interrupts\n");
 510
 511         err = qlcnic_setup_intr(adapter, 1, 0);
 512         if (err) {
 513                 dev_err(&adapter->pdev->dev, "Failed to setup interrupt\n");
 514                 goto err_out_disable_msi;
 515         }
 516
 517         err = qlcnic_83xx_setup_mbx_intr(adapter);
 518         if (err)
 519                 goto err_out_disable_msi;
 520
 521         err = qlcnic_sriov_init(adapter, 1);
 522         if (err)
 523                 goto err_out_disable_mbx_intr;
 524
 525         err = qlcnic_sriov_cfg_bc_intr(adapter, 1);
 526         if (err)
 527                 goto err_out_cleanup_sriov;
 528
 529         err = qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_INIT);
 530         if (err)
 531                 goto err_out_disable_bc_intr;
 532
 533         err = qlcnic_sriov_vf_init_driver(adapter);
 534         if (err)
 535                 goto err_out_send_channel_term;
 536
 537         dcb = adapter->dcb;
 538
 539         if (dcb && qlcnic_dcb_attach(dcb))
 540                 qlcnic_clear_dcb_ops(dcb);
 541
 542         err = qlcnic_setup_netdev(adapter, adapter->netdev, pci_using_dac);
 543         if (err)
 544                 goto err_out_send_channel_term;
 545
 546         pci_set_drvdata(adapter->pdev, adapter);
 547         dev_info(&adapter->pdev->dev, "%s: XGbE port initialized\n",
 548                  adapter->netdev->name);
 549
 550         qlcnic_schedule_work(adapter, qlcnic_sriov_vf_poll_dev_state,
 551                              adapter->ahw->idc.delay);
 552         return 0;
 553
 554 err_out_send_channel_term:
 555         qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_TERM);
 556
 557 err_out_disable_bc_intr:
 558         qlcnic_sriov_cfg_bc_intr(adapter, 0);
 559
 560 err_out_cleanup_sriov:
 561         __qlcnic_sriov_cleanup(adapter);
 562
 563 err_out_disable_mbx_intr:
 564         qlcnic_83xx_free_mbx_intr(adapter);
 565
 566 err_out_disable_msi:
 567         qlcnic_teardown_intr(adapter);
 568         return err;
 569 }
 570
 571 static int qlcnic_sriov_check_dev_ready(struct qlcnic_adapter *adapter)
 572 {
 573         u32 state;
 574
 575         do {
 576                 msleep(20);
 577                 if (++adapter->fw_fail_cnt > QLC_BC_CMD_MAX_RETRY_CNT)
 578                         return -EIO;
 579                 state = QLCRDX(adapter->ahw, QLC_83XX_IDC_DEV_STATE);
 580         } while (state != QLC_83XX_IDC_DEV_READY);
 581
 582         return 0;
 583 }
 584
 585 int qlcnic_sriov_vf_init(struct qlcnic_adapter *adapter, int pci_using_dac)
 586 {
 587         struct qlcnic_hardware_context *ahw = adapter->ahw;
 588         int err;
 589
 590         set_bit(QLC_83XX_MODULE_LOADED, &ahw->idc.status);
 591         ahw->idc.delay = QLC_83XX_IDC_FW_POLL_DELAY;
 592         ahw->reset_context = 0;
 593         adapter->fw_fail_cnt = 0;
 594         ahw->msix_supported = 1;
 595         adapter->need_fw_reset = 0;
 596         adapter->flags |= QLCNIC_TX_INTR_SHARED;
 597
 598         err = qlcnic_sriov_check_dev_ready(adapter);
 599         if (err)
 600                 return err;
 601
 602         err = qlcnic_sriov_setup_vf(adapter, pci_using_dac);
 603         if (err)
 604                 return err;
 605
 606         if (qlcnic_read_mac_addr(adapter))
 607                 dev_warn(&adapter->pdev->dev, "failed to read mac addr\n");
 608
 609         INIT_DELAYED_WORK(&adapter->idc_aen_work, qlcnic_83xx_idc_aen_work);
 610
 611         clear_bit(__QLCNIC_RESETTING, &adapter->state);
 612         return 0;
 613 }
 614
 615 void qlcnic_sriov_vf_set_ops(struct qlcnic_adapter *adapter)
 616 {
 617         struct qlcnic_hardware_context *ahw = adapter->ahw;
 618
 619         ahw->op_mode = QLCNIC_SRIOV_VF_FUNC;
 620         dev_info(&adapter->pdev->dev,
 621                  "HAL Version: %d Non Privileged SRIOV function\n",
 622                  ahw->fw_hal_version);
 623         adapter->nic_ops = &qlcnic_sriov_vf_ops;
 624         set_bit(__QLCNIC_SRIOV_ENABLE, &adapter->state);
 625         return;
 626 }
 627
 628 void qlcnic_sriov_vf_register_map(struct qlcnic_hardware_context *ahw)
 629 {
 630         ahw->hw_ops             = &qlcnic_sriov_vf_hw_ops;
 631         ahw->reg_tbl            = (u32 *)qlcnic_83xx_reg_tbl;
 632         ahw->ext_reg_tbl        = (u32 *)qlcnic_83xx_ext_reg_tbl;
 633 }
 634
 635 static u32 qlcnic_sriov_get_bc_paysize(u32 real_pay_size, u8 curr_frag)
 636 {
 637         u32 pay_size;
 638
 639         pay_size = real_pay_size / ((curr_frag + 1) * QLC_BC_PAYLOAD_SZ);
 640
 641         if (pay_size)
 642                 pay_size = QLC_BC_PAYLOAD_SZ;
 643         else
 644                 pay_size = real_pay_size % QLC_BC_PAYLOAD_SZ;
 645
 646         return pay_size;
 647 }
 648
 649 int qlcnic_sriov_func_to_index(struct qlcnic_adapter *adapter, u8 pci_func)
 650 {
 651         struct qlcnic_vf_info *vf_info = adapter->ahw->sriov->vf_info;
 652         u8 i;
 653
 654         if (qlcnic_sriov_vf_check(adapter))
 655                 return 0;
 656
 657         for (i = 0; i < adapter->ahw->sriov->num_vfs; i++) {
 658                 if (vf_info[i].pci_func == pci_func)
 659                         return i;
 660         }
 661
 662         return -EINVAL;
 663 }
 664
 665 static inline int qlcnic_sriov_alloc_bc_trans(struct qlcnic_bc_trans **trans)
 666 {
 667         *trans = kzalloc(sizeof(struct qlcnic_bc_trans), GFP_ATOMIC);
 668         if (!*trans)
 669                 return -ENOMEM;
 670
 671         init_completion(&(*trans)->resp_cmpl);
 672         return 0;
 673 }
 674
 675 static inline int qlcnic_sriov_alloc_bc_msg(struct qlcnic_bc_hdr **hdr,
 676                                             u32 size)
 677 {
 678         *hdr = kzalloc(sizeof(struct qlcnic_bc_hdr) * size, GFP_ATOMIC);
 679         if (!*hdr)
 680                 return -ENOMEM;
 681
 682         return 0;
 683 }
 684
 685 static int qlcnic_sriov_alloc_bc_mbx_args(struct qlcnic_cmd_args *mbx, u32 type)
 686 {
 687         const struct qlcnic_mailbox_metadata *mbx_tbl;
 688         int i, size;
 689
 690         mbx_tbl = qlcnic_sriov_bc_mbx_tbl;
 691         size = ARRAY_SIZE(qlcnic_sriov_bc_mbx_tbl);
 692
 693         for (i = 0; i < size; i++) {
 694                 if (type == mbx_tbl[i].cmd) {
 695                         mbx->op_type = QLC_BC_CMD;
 696                         mbx->req.num = mbx_tbl[i].in_args;
 697                         mbx->rsp.num = mbx_tbl[i].out_args;
 698                         mbx->req.arg = kcalloc(mbx->req.num, sizeof(u32),
 699                                                GFP_ATOMIC);
 700                         if (!mbx->req.arg)
 701                                 return -ENOMEM;
 702                         mbx->rsp.arg = kcalloc(mbx->rsp.num, sizeof(u32),
 703                                                GFP_ATOMIC);
 704                         if (!mbx->rsp.arg) {
 705                                 kfree(mbx->req.arg);
 706                                 mbx->req.arg = NULL;
 707                                 return -ENOMEM;
 708                         }
 709                         memset(mbx->req.arg, 0, sizeof(u32) * mbx->req.num);
 710                         memset(mbx->rsp.arg, 0, sizeof(u32) * mbx->rsp.num);
 711                         mbx->req.arg[0] = (type | (mbx->req.num << 16) |
 712                                            (3 << 29));
 713                         mbx->rsp.arg[0] = (type & 0xffff) | mbx->rsp.num << 16;
 714                         return 0;
 715                 }
 716         }
 717         return -EINVAL;
 718 }
 719
 720 static int qlcnic_sriov_prepare_bc_hdr(struct qlcnic_bc_trans *trans,
 721                                        struct qlcnic_cmd_args *cmd,
 722                                        u16 seq, u8 msg_type)
 723 {
 724         struct qlcnic_bc_hdr *hdr;
 725         int i;
 726         u32 num_regs, bc_pay_sz;
 727         u16 remainder;
 728         u8 cmd_op, num_frags, t_num_frags;
 729
 730         bc_pay_sz = QLC_BC_PAYLOAD_SZ;
 731         if (msg_type == QLC_BC_COMMAND) {
 732                 trans->req_pay = (struct qlcnic_bc_payload *)cmd->req.arg;
 733                 trans->rsp_pay = (struct qlcnic_bc_payload *)cmd->rsp.arg;
 734                 num_regs = cmd->req.num;
 735                 trans->req_pay_size = (num_regs * 4);
 736                 num_regs = cmd->rsp.num;
 737                 trans->rsp_pay_size = (num_regs * 4);
 738                 cmd_op = cmd->req.arg[0] & 0xff;
 739                 remainder = (trans->req_pay_size) % (bc_pay_sz);
 740                 num_frags = (trans->req_pay_size) / (bc_pay_sz);
 741                 if (remainder)
 742                         num_frags++;
 743                 t_num_frags = num_frags;
 744                 if (qlcnic_sriov_alloc_bc_msg(&trans->req_hdr, num_frags))
 745                         return -ENOMEM;
 746                 remainder = (trans->rsp_pay_size) % (bc_pay_sz);
 747                 num_frags = (trans->rsp_pay_size) / (bc_pay_sz);
 748                 if (remainder)
 749                         num_frags++;
 750                 if (qlcnic_sriov_alloc_bc_msg(&trans->rsp_hdr, num_frags))
 751                         return -ENOMEM;
 752                 num_frags  = t_num_frags;
 753                 hdr = trans->req_hdr;
 754         }  else {
 755                 cmd->req.arg = (u32 *)trans->req_pay;
 756                 cmd->rsp.arg = (u32 *)trans->rsp_pay;
 757                 cmd_op = cmd->req.arg[0] & 0xff;
 758                 remainder = (trans->rsp_pay_size) % (bc_pay_sz);
 759                 num_frags = (trans->rsp_pay_size) / (bc_pay_sz);
 760                 if (remainder)
 761                         num_frags++;
 762                 cmd->req.num = trans->req_pay_size / 4;
 763                 cmd->rsp.num = trans->rsp_pay_size / 4;
 764                 hdr = trans->rsp_hdr;
 765                 cmd->op_type = trans->req_hdr->op_type;
 766         }
 767
 768         trans->trans_id = seq;
 769         trans->cmd_id = cmd_op;
 770         for (i = 0; i < num_frags; i++) {
 771                 hdr[i].version = 2;
 772                 hdr[i].msg_type = msg_type;
 773                 hdr[i].op_type = cmd->op_type;
 774                 hdr[i].num_cmds = 1;
 775                 hdr[i].num_frags = num_frags;
 776                 hdr[i].frag_num = i + 1;
 777                 hdr[i].cmd_op = cmd_op;
 778                 hdr[i].seq_id = seq;
 779         }
 780         return 0;
 781 }
 782
 783 static void qlcnic_sriov_cleanup_transaction(struct qlcnic_bc_trans *trans)
 784 {
 785         if (!trans)
 786                 return;
 787         kfree(trans->req_hdr);
 788         kfree(trans->rsp_hdr);
 789         kfree(trans);
 790 }
 791
 792 static int qlcnic_sriov_clear_trans(struct qlcnic_vf_info *vf,
 793                                     struct qlcnic_bc_trans *trans, u8 type)
 794 {
 795         struct qlcnic_trans_list *t_list;
 796         unsigned long flags;
 797         int ret = 0;
 798
 799         if (type == QLC_BC_RESPONSE) {
 800                 t_list = &vf->rcv_act;
 801                 spin_lock_irqsave(&t_list->lock, flags);
 802                 t_list->count--;
 803                 list_del(&trans->list);
 804                 if (t_list->count > 0)
 805                         ret = 1;
 806                 spin_unlock_irqrestore(&t_list->lock, flags);
 807         }
 808         if (type == QLC_BC_COMMAND) {
 809                 while (test_and_set_bit(QLC_BC_VF_SEND, &vf->state))
 810                         msleep(100);
 811                 vf->send_cmd = NULL;
 812                 clear_bit(QLC_BC_VF_SEND, &vf->state);
 813         }
 814         return ret;
 815 }
 816
 817 static void qlcnic_sriov_schedule_bc_cmd(struct qlcnic_sriov *sriov,
 818                                          struct qlcnic_vf_info *vf,
 819                                          work_func_t func)
 820 {
 821         if (test_bit(QLC_BC_VF_FLR, &vf->state) ||
 822             vf->adapter->need_fw_reset)
 823                 return;
 824
 825         queue_work(sriov->bc.bc_trans_wq, &vf->trans_work);
 826 }
 827
 828 static inline void qlcnic_sriov_wait_for_resp(struct qlcnic_bc_trans *trans)
 829 {
 830         struct completion *cmpl = &trans->resp_cmpl;
 831
 832         if (wait_for_completion_timeout(cmpl, QLC_MBOX_RESP_TIMEOUT))
 833                 trans->trans_state = QLC_END;
 834         else
 835                 trans->trans_state = QLC_ABORT;
 836
 837         return;
 838 }
 839
 840 static void qlcnic_sriov_handle_multi_frags(struct qlcnic_bc_trans *trans,
 841                                             u8 type)
 842 {
 843         if (type == QLC_BC_RESPONSE) {
 844                 trans->curr_rsp_frag++;
 845                 if (trans->curr_rsp_frag < trans->rsp_hdr->num_frags)
 846                         trans->trans_state = QLC_INIT;
 847                 else
 848                         trans->trans_state = QLC_END;
 849         } else {
 850                 trans->curr_req_frag++;
 851                 if (trans->curr_req_frag < trans->req_hdr->num_frags)
 852                         trans->trans_state = QLC_INIT;
 853                 else
 854                         trans->trans_state = QLC_WAIT_FOR_RESP;
 855         }
 856 }
 857
 858 static void qlcnic_sriov_wait_for_channel_free(struct qlcnic_bc_trans *trans,
 859                                                u8 type)
 860 {
 861         struct qlcnic_vf_info *vf = trans->vf;
 862         struct completion *cmpl = &vf->ch_free_cmpl;
 863
 864         if (!wait_for_completion_timeout(cmpl, QLC_MBOX_CH_FREE_TIMEOUT)) {
 865                 trans->trans_state = QLC_ABORT;
 866                 return;
 867         }
 868
 869         clear_bit(QLC_BC_VF_CHANNEL, &vf->state);
 870         qlcnic_sriov_handle_multi_frags(trans, type);
 871 }
 872
 873 static void qlcnic_sriov_pull_bc_msg(struct qlcnic_adapter *adapter,
 874                                      u32 *hdr, u32 *pay, u32 size)
 875 {
 876         struct qlcnic_hardware_context *ahw = adapter->ahw;
 877         u32 fw_mbx;
 878         u8 i, max = 2, hdr_size, j;
 879
 880         hdr_size = (sizeof(struct qlcnic_bc_hdr) / sizeof(u32));
 881         max = (size / sizeof(u32)) + hdr_size;
 882
 883         fw_mbx = readl(QLCNIC_MBX_FW(ahw, 0));
 884         for (i = 2, j = 0; j < hdr_size; i++, j++)
 885                 *(hdr++) = readl(QLCNIC_MBX_FW(ahw, i));
 886         for (; j < max; i++, j++)
 887                 *(pay++) = readl(QLCNIC_MBX_FW(ahw, i));
 888 }
 889
 890 static int __qlcnic_sriov_issue_bc_post(struct qlcnic_vf_info *vf)
 891 {
 892         int ret = -EBUSY;
 893         u32 timeout = 10000;
 894
 895         do {
 896                 if (!test_and_set_bit(QLC_BC_VF_CHANNEL, &vf->state)) {
 897                         ret = 0;
 898                         break;
 899                 }
 900                 mdelay(1);
 901         } while (--timeout);
 902
 903         return ret;
 904 }
 905
 906 static int qlcnic_sriov_issue_bc_post(struct qlcnic_bc_trans *trans, u8 type)
 907 {
 908         struct qlcnic_vf_info *vf = trans->vf;
 909         u32 pay_size, hdr_size;
 910         u32 *hdr, *pay;
 911         int ret;
 912         u8 pci_func = trans->func_id;
 913
 914         if (__qlcnic_sriov_issue_bc_post(vf))
 915                 return -EBUSY;
 916
 917         if (type == QLC_BC_COMMAND) {
 918                 hdr = (u32 *)(trans->req_hdr + trans->curr_req_frag);
 919                 pay = (u32 *)(trans->req_pay + trans->curr_req_frag);
 920                 hdr_size = (sizeof(struct qlcnic_bc_hdr) / sizeof(u32));
 921                 pay_size = qlcnic_sriov_get_bc_paysize(trans->req_pay_size,
 922                                                        trans->curr_req_frag);
 923                 pay_size = (pay_size / sizeof(u32));
 924         } else {
 925                 hdr = (u32 *)(trans->rsp_hdr + trans->curr_rsp_frag);
 926                 pay = (u32 *)(trans->rsp_pay + trans->curr_rsp_frag);
 927                 hdr_size = (sizeof(struct qlcnic_bc_hdr) / sizeof(u32));
 928                 pay_size = qlcnic_sriov_get_bc_paysize(trans->rsp_pay_size,
 929                                                        trans->curr_rsp_frag);
 930                 pay_size = (pay_size / sizeof(u32));
 931         }
 932
 933         ret = qlcnic_sriov_post_bc_msg(vf->adapter, hdr, pay,
 934                                        pci_func, pay_size);
 935         return ret;
 936 }
 937
 938 static int __qlcnic_sriov_send_bc_msg(struct qlcnic_bc_trans *trans,
 939                                       struct qlcnic_vf_info *vf, u8 type)
 940 {
 941         bool flag = true;
 942         int err = -EIO;
 943
 944         while (flag) {
 945                 if (test_bit(QLC_BC_VF_FLR, &vf->state) ||
 946                     vf->adapter->need_fw_reset)
 947                         trans->trans_state = QLC_ABORT;
 948
 949                 switch (trans->trans_state) {
 950                 case QLC_INIT:
 951                         trans->trans_state = QLC_WAIT_FOR_CHANNEL_FREE;
 952                         if (qlcnic_sriov_issue_bc_post(trans, type))
 953                                 trans->trans_state = QLC_ABORT;
 954                         break;
 955                 case QLC_WAIT_FOR_CHANNEL_FREE:
 956                         qlcnic_sriov_wait_for_channel_free(trans, type);
 957                         break;
 958                 case QLC_WAIT_FOR_RESP:
 959                         qlcnic_sriov_wait_for_resp(trans);
 960                         break;
 961                 case QLC_END:
 962                         err = 0;
 963                         flag = false;
 964                         break;
 965                 case QLC_ABORT:
 966                         err = -EIO;
 967                         flag = false;
 968                         clear_bit(QLC_BC_VF_CHANNEL, &vf->state);
 969                         break;
 970                 default:
 971                         err = -EIO;
 972                         flag = false;
 973                 }
 974         }
 975         return err;
 976 }
 977
 978 static int qlcnic_sriov_send_bc_cmd(struct qlcnic_adapter *adapter,
 979                                     struct qlcnic_bc_trans *trans, int pci_func)
 980 {
 981         struct qlcnic_vf_info *vf;
 982         int err, index = qlcnic_sriov_func_to_index(adapter, pci_func);
 983
 984         if (index < 0)
 985                 return -EIO;
 986
 987         vf = &adapter->ahw->sriov->vf_info[index];
 988         trans->vf = vf;
 989         trans->func_id = pci_func;
 990
 991         if (!test_bit(QLC_BC_VF_STATE, &vf->state)) {
 992                 if (qlcnic_sriov_pf_check(adapter))
 993                         return -EIO;
 994                 if (qlcnic_sriov_vf_check(adapter) &&
 995                     trans->cmd_id != QLCNIC_BC_CMD_CHANNEL_INIT)
 996                         return -EIO;
 997         }
 998
 999         mutex_lock(&vf->send_cmd_lock);
1000         vf->send_cmd = trans;
1001         err = __qlcnic_sriov_send_bc_msg(trans, vf, QLC_BC_COMMAND);
1002         qlcnic_sriov_clear_trans(vf, trans, QLC_BC_COMMAND);
1003         mutex_unlock(&vf->send_cmd_lock);
1004         return err;
1005 }
1006
1007 static void __qlcnic_sriov_process_bc_cmd(struct qlcnic_adapter *adapter,
1008                                           struct qlcnic_bc_trans *trans,
1009                                           struct qlcnic_cmd_args *cmd)
1010 {
1011 #ifdef CONFIG_QLCNIC_SRIOV
1012         if (qlcnic_sriov_pf_check(adapter)) {
1013                 qlcnic_sriov_pf_process_bc_cmd(adapter, trans, cmd);
1014                 return;
1015         }
1016 #endif
1017         cmd->rsp.arg[0] |= (0x9 << 25);
1018         return;
1019 }
1020
1021 static void qlcnic_sriov_process_bc_cmd(struct work_struct *work)
1022 {
1023         struct qlcnic_vf_info *vf = container_of(work, struct qlcnic_vf_info,
1024                                                  trans_work);
1025         struct qlcnic_bc_trans *trans = NULL;
1026         struct qlcnic_adapter *adapter  = vf->adapter;
1027         struct qlcnic_cmd_args cmd;
1028         u8 req;
1029
1030         if (adapter->need_fw_reset)
1031                 return;
1032
1033         if (test_bit(QLC_BC_VF_FLR, &vf->state))
1034                 return;
1035
1036         memset(&cmd, 0, sizeof(struct qlcnic_cmd_args));
1037         trans = list_first_entry(&vf->rcv_act.wait_list,
1038                                  struct qlcnic_bc_trans, list);
1039         adapter = vf->adapter;
1040
1041         if (qlcnic_sriov_prepare_bc_hdr(trans, &cmd, trans->req_hdr->seq_id,
1042                                         QLC_BC_RESPONSE))
1043                 goto cleanup_trans;
1044
1045         __qlcnic_sriov_process_bc_cmd(adapter, trans, &cmd);
1046         trans->trans_state = QLC_INIT;
1047         __qlcnic_sriov_send_bc_msg(trans, vf, QLC_BC_RESPONSE);
1048
1049 cleanup_trans:
1050         qlcnic_free_mbx_args(&cmd);
1051         req = qlcnic_sriov_clear_trans(vf, trans, QLC_BC_RESPONSE);
1052         qlcnic_sriov_cleanup_transaction(trans);
1053         if (req)
1054                 qlcnic_sriov_schedule_bc_cmd(adapter->ahw->sriov, vf,
1055                                              qlcnic_sriov_process_bc_cmd);
1056 }
1057
1058 static void qlcnic_sriov_handle_bc_resp(struct qlcnic_bc_hdr *hdr,
1059                                         struct qlcnic_vf_info *vf)
1060 {
1061         struct qlcnic_bc_trans *trans;
1062         u32 pay_size;
1063
1064         if (test_and_set_bit(QLC_BC_VF_SEND, &vf->state))
1065                 return;
1066
1067         trans = vf->send_cmd;
1068
1069         if (trans == NULL)
1070                 goto clear_send;
1071
1072         if (trans->trans_id != hdr->seq_id)
1073                 goto clear_send;
1074
1075         pay_size = qlcnic_sriov_get_bc_paysize(trans->rsp_pay_size,
1076                                                trans->curr_rsp_frag);
1077         qlcnic_sriov_pull_bc_msg(vf->adapter,
1078                                  (u32 *)(trans->rsp_hdr + trans->curr_rsp_frag),
1079                                  (u32 *)(trans->rsp_pay + trans->curr_rsp_frag),
1080                                  pay_size);
1081         if (++trans->curr_rsp_frag < trans->rsp_hdr->num_frags)
1082                 goto clear_send;
1083
1084         complete(&trans->resp_cmpl);
1085
1086 clear_send:
1087         clear_bit(QLC_BC_VF_SEND, &vf->state);
1088 }
1089
1090 int __qlcnic_sriov_add_act_list(struct qlcnic_sriov *sriov,
1091                                 struct qlcnic_vf_info *vf,
1092                                 struct qlcnic_bc_trans *trans)
1093 {
1094         struct qlcnic_trans_list *t_list = &vf->rcv_act;
1095
1096         t_list->count++;
1097         list_add_tail(&trans->list, &t_list->wait_list);
1098         if (t_list->count == 1)
1099                 qlcnic_sriov_schedule_bc_cmd(sriov, vf,
1100                                              qlcnic_sriov_process_bc_cmd);
1101         return 0;
1102 }
1103
1104 static int qlcnic_sriov_add_act_list(struct qlcnic_sriov *sriov,
1105                                      struct qlcnic_vf_info *vf,
1106                                      struct qlcnic_bc_trans *trans)
1107 {
1108         struct qlcnic_trans_list *t_list = &vf->rcv_act;
1109
1110         spin_lock(&t_list->lock);
1111
1112         __qlcnic_sriov_add_act_list(sriov, vf, trans);
1113
1114         spin_unlock(&t_list->lock);
1115         return 0;
1116 }
1117
1118 static void qlcnic_sriov_handle_pending_trans(struct qlcnic_sriov *sriov,
1119                                               struct qlcnic_vf_info *vf,
1120                                               struct qlcnic_bc_hdr *hdr)
1121 {
1122         struct qlcnic_bc_trans *trans = NULL;
1123         struct list_head *node;
1124         u32 pay_size, curr_frag;
1125         u8 found = 0, active = 0;
1126
1127         spin_lock(&vf->rcv_pend.lock);
1128         if (vf->rcv_pend.count > 0) {
1129                 list_for_each(node, &vf->rcv_pend.wait_list) {
1130                         trans = list_entry(node, struct qlcnic_bc_trans, list);
1131                         if (trans->trans_id == hdr->seq_id) {
1132                                 found = 1;
1133                                 break;
1134                         }
1135                 }
1136         }
1137
1138         if (found) {
1139                 curr_frag = trans->curr_req_frag;
1140                 pay_size = qlcnic_sriov_get_bc_paysize(trans->req_pay_size,
1141                                                        curr_frag);
1142                 qlcnic_sriov_pull_bc_msg(vf->adapter,
1143                                          (u32 *)(trans->req_hdr + curr_frag),
1144                                          (u32 *)(trans->req_pay + curr_frag),
1145                                          pay_size);
1146                 trans->curr_req_frag++;
1147                 if (trans->curr_req_frag >= hdr->num_frags) {
1148                         vf->rcv_pend.count--;
1149                         list_del(&trans->list);
1150                         active = 1;
1151                 }
1152         }
1153         spin_unlock(&vf->rcv_pend.lock);
1154
1155         if (active)
1156                 if (qlcnic_sriov_add_act_list(sriov, vf, trans))
1157                         qlcnic_sriov_cleanup_transaction(trans);
1158
1159         return;
1160 }
1161
1162 static void qlcnic_sriov_handle_bc_cmd(struct qlcnic_sriov *sriov,
1163                                        struct qlcnic_bc_hdr *hdr,
1164                                        struct qlcnic_vf_info *vf)
1165 {
1166         struct qlcnic_bc_trans *trans;
1167         struct qlcnic_adapter *adapter = vf->adapter;
1168         struct qlcnic_cmd_args cmd;
1169         u32 pay_size;
1170         int err;
1171         u8 cmd_op;
1172
1173         if (adapter->need_fw_reset)
1174                 return;
1175
1176         if (!test_bit(QLC_BC_VF_STATE, &vf->state) &&
1177             hdr->op_type != QLC_BC_CMD &&
1178             hdr->cmd_op != QLCNIC_BC_CMD_CHANNEL_INIT)
1179                 return;
1180
1181         if (hdr->frag_num > 1) {
1182                 qlcnic_sriov_handle_pending_trans(sriov, vf, hdr);
1183                 return;
1184         }
1185
1186         memset(&cmd, 0, sizeof(struct qlcnic_cmd_args));
1187         cmd_op = hdr->cmd_op;
1188         if (qlcnic_sriov_alloc_bc_trans(&trans))
1189                 return;
1190
1191         if (hdr->op_type == QLC_BC_CMD)
1192                 err = qlcnic_sriov_alloc_bc_mbx_args(&cmd, cmd_op);
1193         else
1194                 err = qlcnic_alloc_mbx_args(&cmd, adapter, cmd_op);
1195
1196         if (err) {
1197                 qlcnic_sriov_cleanup_transaction(trans);
1198                 return;
1199         }
1200
1201         cmd.op_type = hdr->op_type;
1202         if (qlcnic_sriov_prepare_bc_hdr(trans, &cmd, hdr->seq_id,
1203                                         QLC_BC_COMMAND)) {
1204                 qlcnic_free_mbx_args(&cmd);
1205                 qlcnic_sriov_cleanup_transaction(trans);
1206                 return;
1207         }
1208
1209         pay_size = qlcnic_sriov_get_bc_paysize(trans->req_pay_size,
1210                                          trans->curr_req_frag);
1211         qlcnic_sriov_pull_bc_msg(vf->adapter,
1212                                  (u32 *)(trans->req_hdr + trans->curr_req_frag),
1213                                  (u32 *)(trans->req_pay + trans->curr_req_frag),
1214                                  pay_size);
1215         trans->func_id = vf->pci_func;
1216         trans->vf = vf;
1217         trans->trans_id = hdr->seq_id;
1218         trans->curr_req_frag++;
1219
1220         if (qlcnic_sriov_soft_flr_check(adapter, trans, vf))
1221                 return;
1222
1223         if (trans->curr_req_frag == trans->req_hdr->num_frags) {
1224                 if (qlcnic_sriov_add_act_list(sriov, vf, trans)) {
1225                         qlcnic_free_mbx_args(&cmd);
1226                         qlcnic_sriov_cleanup_transaction(trans);
1227                 }
1228         } else {
1229                 spin_lock(&vf->rcv_pend.lock);
1230                 list_add_tail(&trans->list, &vf->rcv_pend.wait_list);
1231                 vf->rcv_pend.count++;
1232                 spin_unlock(&vf->rcv_pend.lock);
1233         }
1234 }
1235
1236 static void qlcnic_sriov_handle_msg_event(struct qlcnic_sriov *sriov,
1237                                           struct qlcnic_vf_info *vf)
1238 {
1239         struct qlcnic_bc_hdr hdr;
1240         u32 *ptr = (u32 *)&hdr;
1241         u8 msg_type, i;
1242
1243         for (i = 2; i < 6; i++)
1244                 ptr[i - 2] = readl(QLCNIC_MBX_FW(vf->adapter->ahw, i));
1245         msg_type = hdr.msg_type;
1246
1247         switch (msg_type) {
1248         case QLC_BC_COMMAND:
1249                 qlcnic_sriov_handle_bc_cmd(sriov, &hdr, vf);
1250                 break;
1251         case QLC_BC_RESPONSE:
1252                 qlcnic_sriov_handle_bc_resp(&hdr, vf);
1253                 break;
1254         }
1255 }
1256
1257 static void qlcnic_sriov_handle_flr_event(struct qlcnic_sriov *sriov,
1258                                           struct qlcnic_vf_info *vf)
1259 {
1260         struct qlcnic_adapter *adapter = vf->adapter;
1261
1262         if (qlcnic_sriov_pf_check(adapter))
1263                 qlcnic_sriov_pf_handle_flr(sriov, vf);
1264         else
1265                 dev_err(&adapter->pdev->dev,
1266                         "Invalid event to VF. VF should not get FLR event\n");
1267 }
1268
1269 void qlcnic_sriov_handle_bc_event(struct qlcnic_adapter *adapter, u32 event)
1270 {
1271         struct qlcnic_vf_info *vf;
1272         struct qlcnic_sriov *sriov;
1273         int index;
1274         u8 pci_func;
1275
1276         sriov = adapter->ahw->sriov;
1277         pci_func = qlcnic_sriov_target_func_id(event);
1278         index = qlcnic_sriov_func_to_index(adapter, pci_func);
1279
1280         if (index < 0)
1281                 return;
1282
1283         vf = &sriov->vf_info[index];
1284         vf->pci_func = pci_func;
1285
1286         if (qlcnic_sriov_channel_free_check(event))
1287                 complete(&vf->ch_free_cmpl);
1288
1289         if (qlcnic_sriov_flr_check(event)) {
1290                 qlcnic_sriov_handle_flr_event(sriov, vf);
1291                 return;
1292         }
1293
1294         if (qlcnic_sriov_bc_msg_check(event))
1295                 qlcnic_sriov_handle_msg_event(sriov, vf);
1296 }
1297
1298 int qlcnic_sriov_cfg_bc_intr(struct qlcnic_adapter *adapter, u8 enable)
1299 {
1300         struct qlcnic_cmd_args cmd;
1301         int err;
1302
1303         if (!test_bit(__QLCNIC_SRIOV_ENABLE, &adapter->state))
1304                 return 0;
1305
1306         if (qlcnic_alloc_mbx_args(&cmd, adapter, QLCNIC_CMD_BC_EVENT_SETUP))
1307                 return -ENOMEM;
1308
1309         if (enable)
1310                 cmd.req.arg[1] = (1 << 4) | (1 << 5) | (1 << 6) | (1 << 7);
1311
1312         err = qlcnic_83xx_issue_cmd(adapter, &cmd);
1313
1314         if (err != QLCNIC_RCODE_SUCCESS) {
1315                 dev_err(&adapter->pdev->dev,
1316                         "Failed to %s bc events, err=%d\n",
1317                         (enable ? "enable" : "disable"), err);
1318         }
1319
1320         qlcnic_free_mbx_args(&cmd);
1321         return err;
1322 }
1323
1324 static int qlcnic_sriov_retry_bc_cmd(struct qlcnic_adapter *adapter,
1325                                      struct qlcnic_bc_trans *trans)
1326 {
1327         u8 max = QLC_BC_CMD_MAX_RETRY_CNT;
1328         u32 state;
1329
1330         state = QLCRDX(adapter->ahw, QLC_83XX_IDC_DEV_STATE);
1331         if (state == QLC_83XX_IDC_DEV_READY) {
1332                 msleep(20);
1333                 clear_bit(QLC_BC_VF_CHANNEL, &trans->vf->state);
1334                 trans->trans_state = QLC_INIT;
1335                 if (++adapter->fw_fail_cnt > max)
1336                         return -EIO;
1337                 else
1338                         return 0;
1339         }
1340
1341         return -EIO;
1342 }
1343
1344 static int qlcnic_sriov_issue_cmd(struct qlcnic_adapter *adapter,
1345                                   struct qlcnic_cmd_args *cmd)
1346 {
1347         struct qlcnic_hardware_context *ahw = adapter->ahw;
1348         struct qlcnic_mailbox *mbx = ahw->mailbox;
1349         struct device *dev = &adapter->pdev->dev;
1350         struct qlcnic_bc_trans *trans;
1351         int err;
1352         u32 rsp_data, opcode, mbx_err_code, rsp;
1353         u16 seq = ++adapter->ahw->sriov->bc.trans_counter;
1354         u8 func = ahw->pci_func;
1355
1356         rsp = qlcnic_sriov_alloc_bc_trans(&trans);
1357         if (rsp)
1358                 return rsp;
1359
1360         rsp = qlcnic_sriov_prepare_bc_hdr(trans, cmd, seq, QLC_BC_COMMAND);
1361         if (rsp)
1362                 goto cleanup_transaction;
1363
1364 retry:
1365         if (!test_bit(QLC_83XX_MBX_READY, &mbx->status)) {
1366                 rsp = -EIO;
1367                 QLCDB(adapter, DRV, "MBX not Ready!(cmd 0x%x) for VF 0x%x\n",
1368                       QLCNIC_MBX_RSP(cmd->req.arg[0]), func);
1369                 goto err_out;
1370         }
1371
1372         err = qlcnic_sriov_send_bc_cmd(adapter, trans, func);
1373         if (err) {
1374                 dev_err(dev, "MBX command 0x%x timed out for VF %d\n",
1375                         (cmd->req.arg[0] & 0xffff), func);
1376                 rsp = QLCNIC_RCODE_TIMEOUT;
1377
1378                 /* After adapter reset PF driver may take some time to
1379                  * respond to VF's request. Retry request till maximum retries.
1380                  */
1381                 if ((trans->req_hdr->cmd_op == QLCNIC_BC_CMD_CHANNEL_INIT) &&
1382                     !qlcnic_sriov_retry_bc_cmd(adapter, trans))
1383                         goto retry;
1384
1385                 goto err_out;
1386         }
1387
1388         rsp_data = cmd->rsp.arg[0];
1389         mbx_err_code = QLCNIC_MBX_STATUS(rsp_data);
1390         opcode = QLCNIC_MBX_RSP(cmd->req.arg[0]);
1391
1392         if ((mbx_err_code == QLCNIC_MBX_RSP_OK) ||
1393             (mbx_err_code == QLCNIC_MBX_PORT_RSP_OK)) {
1394                 rsp = QLCNIC_RCODE_SUCCESS;
1395         } else {
1396                 rsp = mbx_err_code;
1397                 if (!rsp)
1398                         rsp = 1;
1399                 dev_err(dev,
1400                         "MBX command 0x%x failed with err:0x%x for VF %d\n",
1401                         opcode, mbx_err_code, func);
1402         }
1403
1404 err_out:
1405         if (rsp == QLCNIC_RCODE_TIMEOUT) {
1406                 ahw->reset_context = 1;
1407                 adapter->need_fw_reset = 1;
1408                 clear_bit(QLC_83XX_MBX_READY, &mbx->status);
1409         }
1410
1411 cleanup_transaction:
1412         qlcnic_sriov_cleanup_transaction(trans);
1413         return rsp;
1414 }
1415
1416 int qlcnic_sriov_channel_cfg_cmd(struct qlcnic_adapter *adapter, u8 cmd_op)
1417 {
1418         struct qlcnic_cmd_args cmd;
1419         struct qlcnic_vf_info *vf = &adapter->ahw->sriov->vf_info[0];
1420         int ret;
1421
1422         if (qlcnic_sriov_alloc_bc_mbx_args(&cmd, cmd_op))
1423                 return -ENOMEM;
1424
1425         ret = qlcnic_issue_cmd(adapter, &cmd);
1426         if (ret) {
1427                 dev_err(&adapter->pdev->dev,
1428                         "Failed bc channel %s %d\n", cmd_op ? "term" : "init",
1429                         ret);
1430                 goto out;
1431         }
1432
1433         cmd_op = (cmd.rsp.arg[0] & 0xff);
1434         if (cmd.rsp.arg[0] >> 25 == 2)
1435                 return 2;
1436         if (cmd_op == QLCNIC_BC_CMD_CHANNEL_INIT)
1437                 set_bit(QLC_BC_VF_STATE, &vf->state);
1438         else
1439                 clear_bit(QLC_BC_VF_STATE, &vf->state);
1440
1441 out:
1442         qlcnic_free_mbx_args(&cmd);
1443         return ret;
1444 }
1445
1446 void qlcnic_vf_add_mc_list(struct net_device *netdev, u16 vlan)
1447 {
1448         struct qlcnic_adapter *adapter = netdev_priv(netdev);
1449         struct qlcnic_mac_list_s *cur;
1450         struct list_head *head, tmp_list;
1451
1452         INIT_LIST_HEAD(&tmp_list);
1453         head = &adapter->vf_mc_list;
1454         netif_addr_lock_bh(netdev);
1455
1456         while (!list_empty(head)) {
1457                 cur = list_entry(head->next, struct qlcnic_mac_list_s, list);
1458                 list_move(&cur->list, &tmp_list);
1459         }
1460
1461         netif_addr_unlock_bh(netdev);
1462
1463         while (!list_empty(&tmp_list)) {
1464                 cur = list_entry((&tmp_list)->next,
1465                                  struct qlcnic_mac_list_s, list);
1466                 qlcnic_nic_add_mac(adapter, cur->mac_addr, vlan);
1467                 list_del(&cur->list);
1468                 kfree(cur);
1469         }
1470 }
1471
1472 void qlcnic_sriov_cleanup_async_list(struct qlcnic_back_channel *bc)
1473 {
1474         struct list_head *head = &bc->async_list;
1475         struct qlcnic_async_work_list *entry;
1476
1477         while (!list_empty(head)) {
1478                 entry = list_entry(head->next, struct qlcnic_async_work_list,
1479                                    list);
1480                 cancel_work_sync(&entry->work);
1481                 list_del(&entry->list);
1482                 kfree(entry);
1483         }
1484 }
1485
1486 static void qlcnic_sriov_vf_set_multi(struct net_device *netdev)
1487 {
1488         struct qlcnic_adapter *adapter = netdev_priv(netdev);
1489         u16 vlan;
1490
1491         if (!test_bit(__QLCNIC_FW_ATTACHED, &adapter->state))
1492                 return;
1493
1494         vlan = adapter->ahw->sriov->vlan;
1495         __qlcnic_set_multi(netdev, vlan);
1496 }
1497
1498 static void qlcnic_sriov_handle_async_multi(struct work_struct *work)
1499 {
1500         struct qlcnic_async_work_list *entry;
1501         struct net_device *netdev;
1502
1503         entry = container_of(work, struct qlcnic_async_work_list, work);
1504         netdev = (struct net_device *)entry->ptr;
1505
1506         qlcnic_sriov_vf_set_multi(netdev);
1507         return;
1508 }
1509
1510 static struct qlcnic_async_work_list *
1511 qlcnic_sriov_get_free_node_async_work(struct qlcnic_back_channel *bc)
1512 {
1513         struct list_head *node;
1514         struct qlcnic_async_work_list *entry = NULL;
1515         u8 empty = 0;
1516
1517         list_for_each(node, &bc->async_list) {
1518                 entry = list_entry(node, struct qlcnic_async_work_list, list);
1519                 if (!work_pending(&entry->work)) {
1520                         empty = 1;
1521                         break;
1522                 }
1523         }
1524
1525         if (!empty) {
1526                 entry = kzalloc(sizeof(struct qlcnic_async_work_list),
1527                                 GFP_ATOMIC);
1528                 if (entry == NULL)
1529                         return NULL;
1530                 list_add_tail(&entry->list, &bc->async_list);
1531         }
1532
1533         return entry;
1534 }
1535
1536 static void qlcnic_sriov_schedule_bc_async_work(struct qlcnic_back_channel *bc,
1537                                                 work_func_t func, void *data)
1538 {
1539         struct qlcnic_async_work_list *entry = NULL;
1540
1541         entry = qlcnic_sriov_get_free_node_async_work(bc);
1542         if (!entry)
1543                 return;
1544
1545         entry->ptr = data;
1546         INIT_WORK(&entry->work, func);
1547         queue_work(bc->bc_async_wq, &entry->work);
1548 }
1549
1550 void qlcnic_sriov_vf_schedule_multi(struct net_device *netdev)
1551 {
1552
1553         struct qlcnic_adapter *adapter = netdev_priv(netdev);
1554         struct qlcnic_back_channel *bc = &adapter->ahw->sriov->bc;
1555
1556         if (adapter->need_fw_reset)
1557                 return;
1558
1559         qlcnic_sriov_schedule_bc_async_work(bc, qlcnic_sriov_handle_async_multi,
1560                                             netdev);
1561 }
1562
1563 static int qlcnic_sriov_vf_reinit_driver(struct qlcnic_adapter *adapter)
1564 {
1565         int err;
1566
1567         adapter->need_fw_reset = 0;
1568         qlcnic_83xx_reinit_mbx_work(adapter->ahw->mailbox);
1569         qlcnic_83xx_enable_mbx_interrupt(adapter);
1570
1571         err = qlcnic_sriov_cfg_bc_intr(adapter, 1);
1572         if (err)
1573                 return err;
1574
1575         err = qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_INIT);
1576         if (err)
1577                 goto err_out_cleanup_bc_intr;
1578
1579         err = qlcnic_sriov_vf_init_driver(adapter);
1580         if (err)
1581                 goto err_out_term_channel;
1582
1583         qlcnic_dcb_get_info(adapter->dcb);
1584
1585         return 0;
1586
1587 err_out_term_channel:
1588         qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_TERM);
1589
1590 err_out_cleanup_bc_intr:
1591         qlcnic_sriov_cfg_bc_intr(adapter, 0);
1592         return err;
1593 }
1594
1595 static void qlcnic_sriov_vf_attach(struct qlcnic_adapter *adapter)
1596 {
1597         struct net_device *netdev = adapter->netdev;
1598
1599         if (netif_running(netdev)) {
1600                 if (!qlcnic_up(adapter, netdev))
1601                         qlcnic_restore_indev_addr(netdev, NETDEV_UP);
1602         }
1603
1604         netif_device_attach(netdev);
1605 }
1606
1607 static void qlcnic_sriov_vf_detach(struct qlcnic_adapter *adapter)
1608 {
1609         struct qlcnic_hardware_context *ahw = adapter->ahw;
1610         struct qlcnic_intrpt_config *intr_tbl = ahw->intr_tbl;
1611         struct net_device *netdev = adapter->netdev;
1612         u8 i, max_ints = ahw->num_msix - 1;
1613
1614         netif_device_detach(netdev);
1615         qlcnic_83xx_detach_mailbox_work(adapter);
1616         qlcnic_83xx_disable_mbx_intr(adapter);
1617
1618         if (netif_running(netdev))
1619                 qlcnic_down(adapter, netdev);
1620
1621         for (i = 0; i < max_ints; i++) {
1622                 intr_tbl[i].id = i;
1623                 intr_tbl[i].enabled = 0;
1624                 intr_tbl[i].src = 0;
1625         }
1626         ahw->reset_context = 0;
1627 }
1628
1629 static int qlcnic_sriov_vf_handle_dev_ready(struct qlcnic_adapter *adapter)
1630 {
1631         struct qlcnic_hardware_context *ahw = adapter->ahw;
1632         struct device *dev = &adapter->pdev->dev;
1633         struct qlc_83xx_idc *idc = &ahw->idc;
1634         u8 func = ahw->pci_func;
1635         u32 state;
1636
1637         if ((idc->prev_state == QLC_83XX_IDC_DEV_NEED_RESET) ||
1638             (idc->prev_state == QLC_83XX_IDC_DEV_INIT)) {
1639                 if (!qlcnic_sriov_vf_reinit_driver(adapter)) {
1640                         qlcnic_sriov_vf_attach(adapter);
1641                         adapter->fw_fail_cnt = 0;
1642                         dev_info(dev,
1643                                  "%s: Reinitialization of VF 0x%x done after FW reset\n",
1644                                  __func__, func);
1645                 } else {
1646                         dev_err(dev,
1647                                 "%s: Reinitialization of VF 0x%x failed after FW reset\n",
1648                                 __func__, func);
1649                         state = QLCRDX(ahw, QLC_83XX_IDC_DEV_STATE);
1650                         dev_info(dev, "Current state 0x%x after FW reset\n",
1651                                  state);
1652                 }
1653         }
1654
1655         return 0;
1656 }
1657
1658 static int qlcnic_sriov_vf_handle_context_reset(struct qlcnic_adapter *adapter)
1659 {
1660         struct qlcnic_hardware_context *ahw = adapter->ahw;
1661         struct qlcnic_mailbox *mbx = ahw->mailbox;
1662         struct device *dev = &adapter->pdev->dev;
1663         struct qlc_83xx_idc *idc = &ahw->idc;
1664         u8 func = ahw->pci_func;
1665         u32 state;
1666
1667         adapter->reset_ctx_cnt++;
1668
1669         /* Skip the context reset and check if FW is hung */
1670         if (adapter->reset_ctx_cnt < 3) {
1671                 adapter->need_fw_reset = 1;
1672                 clear_bit(QLC_83XX_MBX_READY, &mbx->status);
1673                 dev_info(dev,
1674                          "Resetting context, wait here to check if FW is in failed state\n");
1675                 return 0;
1676         }
1677
1678         /* Check if number of resets exceed the threshold.
1679          * If it exceeds the threshold just fail the VF.
1680          */
1681         if (adapter->reset_ctx_cnt > QLC_83XX_VF_RESET_FAIL_THRESH) {
1682                 clear_bit(QLC_83XX_MODULE_LOADED, &idc->status);
1683                 adapter->tx_timeo_cnt = 0;
1684                 adapter->fw_fail_cnt = 0;
1685                 adapter->reset_ctx_cnt = 0;
1686                 qlcnic_sriov_vf_detach(adapter);
1687                 dev_err(dev,
1688                         "Device context resets have exceeded the threshold, device interface will be shutdown\n");
1689                 return -EIO;
1690         }
1691
1692         dev_info(dev, "Resetting context of VF 0x%x\n", func);
1693         dev_info(dev, "%s: Context reset count %d for VF 0x%x\n",
1694                  __func__, adapter->reset_ctx_cnt, func);
1695         set_bit(__QLCNIC_RESETTING, &adapter->state);
1696         adapter->need_fw_reset = 1;
1697         clear_bit(QLC_83XX_MBX_READY, &mbx->status);
1698         qlcnic_sriov_vf_detach(adapter);
1699         adapter->need_fw_reset = 0;
1700
1701         if (!qlcnic_sriov_vf_reinit_driver(adapter)) {
1702                 qlcnic_sriov_vf_attach(adapter);
1703                 adapter->tx_timeo_cnt = 0;
1704                 adapter->reset_ctx_cnt = 0;
1705                 adapter->fw_fail_cnt = 0;
1706                 dev_info(dev, "Done resetting context for VF 0x%x\n", func);
1707         } else {
1708                 dev_err(dev, "%s: Reinitialization of VF 0x%x failed\n",
1709                         __func__, func);
1710                 state = QLCRDX(ahw, QLC_83XX_IDC_DEV_STATE);
1711                 dev_info(dev, "%s: Current state 0x%x\n", __func__, state);
1712         }
1713
1714         return 0;
1715 }
1716
1717 static int qlcnic_sriov_vf_idc_ready_state(struct qlcnic_adapter *adapter)
1718 {
1719         struct qlcnic_hardware_context *ahw = adapter->ahw;
1720         int ret = 0;
1721
1722         if (ahw->idc.prev_state != QLC_83XX_IDC_DEV_READY)
1723                 ret = qlcnic_sriov_vf_handle_dev_ready(adapter);
1724         else if (ahw->reset_context)
1725                 ret = qlcnic_sriov_vf_handle_context_reset(adapter);
1726
1727         clear_bit(__QLCNIC_RESETTING, &adapter->state);
1728         return ret;
1729 }
1730
1731 static int qlcnic_sriov_vf_idc_failed_state(struct qlcnic_adapter *adapter)
1732 {
1733         struct qlc_83xx_idc *idc = &adapter->ahw->idc;
1734
1735         dev_err(&adapter->pdev->dev, "Device is in failed state\n");
1736         if (idc->prev_state == QLC_83XX_IDC_DEV_READY)
1737                 qlcnic_sriov_vf_detach(adapter);
1738
1739         clear_bit(QLC_83XX_MODULE_LOADED, &idc->status);
1740         clear_bit(__QLCNIC_RESETTING, &adapter->state);
1741         return -EIO;
1742 }
1743
1744 static int
1745 qlcnic_sriov_vf_idc_need_quiescent_state(struct qlcnic_adapter *adapter)
1746 {
1747         struct qlcnic_mailbox *mbx = adapter->ahw->mailbox;
1748         struct qlc_83xx_idc *idc = &adapter->ahw->idc;
1749
1750         dev_info(&adapter->pdev->dev, "Device is in quiescent state\n");
1751         if (idc->prev_state == QLC_83XX_IDC_DEV_READY) {
1752                 set_bit(__QLCNIC_RESETTING, &adapter->state);
1753                 adapter->tx_timeo_cnt = 0;
1754                 adapter->reset_ctx_cnt = 0;
1755                 clear_bit(QLC_83XX_MBX_READY, &mbx->status);
1756                 qlcnic_sriov_vf_detach(adapter);
1757         }
1758
1759         return 0;
1760 }
1761
1762 static int qlcnic_sriov_vf_idc_init_reset_state(struct qlcnic_adapter *adapter)
1763 {
1764         struct qlcnic_mailbox *mbx = adapter->ahw->mailbox;
1765         struct qlc_83xx_idc *idc = &adapter->ahw->idc;
1766         u8 func = adapter->ahw->pci_func;
1767
1768         if (idc->prev_state == QLC_83XX_IDC_DEV_READY) {
1769                 dev_err(&adapter->pdev->dev,
1770                         "Firmware hang detected by VF 0x%x\n", func);
1771                 set_bit(__QLCNIC_RESETTING, &adapter->state);
1772                 adapter->tx_timeo_cnt = 0;
1773                 adapter->reset_ctx_cnt = 0;
1774                 clear_bit(QLC_83XX_MBX_READY, &mbx->status);
1775                 qlcnic_sriov_vf_detach(adapter);
1776         }
1777         return 0;
1778 }
1779
1780 static int qlcnic_sriov_vf_idc_unknown_state(struct qlcnic_adapter *adapter)
1781 {
1782         dev_err(&adapter->pdev->dev, "%s: Device in unknown state\n", __func__);
1783         return 0;
1784 }
1785
1786 static void qlcnic_sriov_vf_poll_dev_state(struct work_struct *work)
1787 {
1788         struct qlcnic_adapter *adapter;
1789         struct qlc_83xx_idc *idc;
1790         int ret = 0;
1791
1792         adapter = container_of(work, struct qlcnic_adapter, fw_work.work);
1793         idc = &adapter->ahw->idc;
1794         idc->curr_state = QLCRDX(adapter->ahw, QLC_83XX_IDC_DEV_STATE);
1795
1796         switch (idc->curr_state) {
1797         case QLC_83XX_IDC_DEV_READY:
1798                 ret = qlcnic_sriov_vf_idc_ready_state(adapter);
1799                 break;
1800         case QLC_83XX_IDC_DEV_NEED_RESET:
1801         case QLC_83XX_IDC_DEV_INIT:
1802                 ret = qlcnic_sriov_vf_idc_init_reset_state(adapter);
1803                 break;
1804         case QLC_83XX_IDC_DEV_NEED_QUISCENT:
1805                 ret = qlcnic_sriov_vf_idc_need_quiescent_state(adapter);
1806                 break;
1807         case QLC_83XX_IDC_DEV_FAILED:
1808                 ret = qlcnic_sriov_vf_idc_failed_state(adapter);
1809                 break;
1810         case QLC_83XX_IDC_DEV_QUISCENT:
1811                 break;
1812         default:
1813                 ret = qlcnic_sriov_vf_idc_unknown_state(adapter);
1814         }
1815
1816         idc->prev_state = idc->curr_state;
1817         if (!ret && test_bit(QLC_83XX_MODULE_LOADED, &idc->status))
1818                 qlcnic_schedule_work(adapter, qlcnic_sriov_vf_poll_dev_state,
1819                                      idc->delay);
1820 }
1821
1822 static void qlcnic_sriov_vf_cancel_fw_work(struct qlcnic_adapter *adapter)
1823 {
1824         while (test_and_set_bit(__QLCNIC_RESETTING, &adapter->state))
1825                 msleep(20);
1826
1827         clear_bit(QLC_83XX_MODULE_LOADED, &adapter->ahw->idc.status);
1828         clear_bit(__QLCNIC_RESETTING, &adapter->state);
1829         cancel_delayed_work_sync(&adapter->fw_work);
1830 }
1831
1832 static int qlcnic_sriov_validate_vlan_cfg(struct qlcnic_sriov *sriov,
1833                                           u16 vid, u8 enable)
1834 {
1835         u16 vlan = sriov->vlan;
1836         u8 allowed = 0;
1837         int i;
1838
1839         if (sriov->vlan_mode != QLC_GUEST_VLAN_MODE)
1840                 return -EINVAL;
1841
1842         if (enable) {
1843                 if (vlan)
1844                         return -EINVAL;
1845
1846                 if (sriov->any_vlan) {
1847                         for (i = 0; i < sriov->num_allowed_vlans; i++) {
1848                                 if (sriov->allowed_vlans[i] == vid)
1849                                         allowed = 1;
1850                         }
1851
1852                         if (!allowed)
1853                                 return -EINVAL;
1854                 }
1855         } else {
1856                 if (!vlan || vlan != vid)
1857                         return -EINVAL;
1858         }
1859
1860         return 0;
1861 }
1862
1863 int qlcnic_sriov_cfg_vf_guest_vlan(struct qlcnic_adapter *adapter,
1864                                    u16 vid, u8 enable)
1865 {
1866         struct qlcnic_sriov *sriov = adapter->ahw->sriov;
1867         struct qlcnic_cmd_args cmd;
1868         int ret;
1869
1870         if (vid == 0)
1871                 return 0;
1872
1873         ret = qlcnic_sriov_validate_vlan_cfg(sriov, vid, enable);
1874         if (ret)
1875                 return ret;
1876
1877         ret = qlcnic_sriov_alloc_bc_mbx_args(&cmd,
1878                                              QLCNIC_BC_CMD_CFG_GUEST_VLAN);
1879         if (ret)
1880                 return ret;
1881
1882         cmd.req.arg[1] = (enable & 1) | vid << 16;
1883
1884         qlcnic_sriov_cleanup_async_list(&sriov->bc);
1885         ret = qlcnic_issue_cmd(adapter, &cmd);
1886         if (ret) {
1887                 dev_err(&adapter->pdev->dev,
1888                         "Failed to configure guest VLAN, err=%d\n", ret);
1889         } else {
1890                 qlcnic_free_mac_list(adapter);
1891
1892                 if (enable)
1893                         sriov->vlan = vid;
1894                 else
1895                         sriov->vlan = 0;
1896
1897                 qlcnic_sriov_vf_set_multi(adapter->netdev);
1898         }
1899
1900         qlcnic_free_mbx_args(&cmd);
1901         return ret;
1902 }
1903
1904 static void qlcnic_sriov_vf_free_mac_list(struct qlcnic_adapter *adapter)
1905 {
1906         struct list_head *head = &adapter->mac_list;
1907         struct qlcnic_mac_list_s *cur;
1908         u16 vlan;
1909
1910         vlan = adapter->ahw->sriov->vlan;
1911
1912         while (!list_empty(head)) {
1913                 cur = list_entry(head->next, struct qlcnic_mac_list_s, list);
1914                 qlcnic_sre_macaddr_change(adapter, cur->mac_addr,
1915                                           vlan, QLCNIC_MAC_DEL);
1916                 list_del(&cur->list);
1917                 kfree(cur);
1918         }
1919 }
1920
1921 int qlcnic_sriov_vf_shutdown(struct pci_dev *pdev)
1922 {
1923         struct qlcnic_adapter *adapter = pci_get_drvdata(pdev);
1924         struct net_device *netdev = adapter->netdev;
1925         int retval;
1926
1927         netif_device_detach(netdev);
1928         qlcnic_cancel_idc_work(adapter);
1929
1930         if (netif_running(netdev))
1931                 qlcnic_down(adapter, netdev);
1932
1933         qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_TERM);
1934         qlcnic_sriov_cfg_bc_intr(adapter, 0);
1935         qlcnic_83xx_disable_mbx_intr(adapter);
1936         cancel_delayed_work_sync(&adapter->idc_aen_work);
1937
1938         retval = pci_save_state(pdev);
1939         if (retval)
1940                 return retval;
1941
1942         return 0;
1943 }
1944
1945 int qlcnic_sriov_vf_resume(struct qlcnic_adapter *adapter)
1946 {
1947         struct qlc_83xx_idc *idc = &adapter->ahw->idc;
1948         struct net_device *netdev = adapter->netdev;
1949         int err;
1950
1951         set_bit(QLC_83XX_MODULE_LOADED, &idc->status);
1952         qlcnic_83xx_enable_mbx_interrupt(adapter);
1953         err = qlcnic_sriov_cfg_bc_intr(adapter, 1);
1954         if (err)
1955                 return err;
1956
1957         err = qlcnic_sriov_channel_cfg_cmd(adapter, QLCNIC_BC_CMD_CHANNEL_INIT);
1958         if (!err) {
1959                 if (netif_running(netdev)) {
1960                         err = qlcnic_up(adapter, netdev);
1961                         if (!err)
1962                                 qlcnic_restore_indev_addr(netdev, NETDEV_UP);
1963                 }
1964         }
1965
1966         netif_device_attach(netdev);
1967         qlcnic_schedule_work(adapter, qlcnic_sriov_vf_poll_dev_state,
1968                              idc->delay);
1969         return err;
1970 }