drivers/nvme/host/nvme.h

   1 /*
   2  * Copyright (c) 2011-2014, Intel Corporation.
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms and conditions of the GNU General Public License,
   6  * version 2, as published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope it will be useful, but WITHOUT
   9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  11  * more details.
  12  */
  13
  14 #ifndef _NVME_H
  15 #define _NVME_H
  16
  17 #include <linux/nvme.h>
  18 #include <linux/pci.h>
  19 #include <linux/kref.h>
  20 #include <linux/blk-mq.h>
  21 #include <linux/lightnvm.h>
  22 #include <linux/sed-opal.h>
  23
  24 extern unsigned char nvme_io_timeout;
  25 #define NVME_IO_TIMEOUT (nvme_io_timeout * HZ)
  26
  27 extern unsigned char admin_timeout;
  28 #define ADMIN_TIMEOUT   (admin_timeout * HZ)
  29
  30 extern unsigned char shutdown_timeout;
  31 #define SHUTDOWN_TIMEOUT        (shutdown_timeout * HZ)
  32
  33 #define NVME_DEFAULT_KATO       5
  34 #define NVME_KATO_GRACE         10
  35
  36 enum {
  37         NVME_NS_LBA             = 0,
  38         NVME_NS_LIGHTNVM        = 1,
  39 };
  40
  41 /*
  42  * List of workarounds for devices that required behavior not specified in
  43  * the standard.
  44  */
  45 enum nvme_quirks {
  46         /*
  47          * Prefers I/O aligned to a stripe size specified in a vendor
  48          * specific Identify field.
  49          */
  50         NVME_QUIRK_STRIPE_SIZE                  = (1 << 0),
  51
  52         /*
  53          * The controller doesn't handle Identify value others than 0 or 1
  54          * correctly.
  55          */
  56         NVME_QUIRK_IDENTIFY_CNS                 = (1 << 1),
  57
  58         /*
  59          * The controller deterministically returns O's on reads to
  60          * logical blocks that deallocate was called on.
  61          */
  62         NVME_QUIRK_DEALLOCATE_ZEROES            = (1 << 2),
  63
  64         /*
  65          * The controller needs a delay before starts checking the device
  66          * readiness, which is done by reading the NVME_CSTS_RDY bit.
  67          */
  68         NVME_QUIRK_DELAY_BEFORE_CHK_RDY         = (1 << 3),
  69
  70         /*
  71          * APST should not be used.
  72          */
  73         NVME_QUIRK_NO_APST                      = (1 << 4),
  74
  75         /*
  76          * The deepest sleep state should not be used.
  77          */
  78         NVME_QUIRK_NO_DEEPEST_PS                = (1 << 5),
  79 };
  80
  81 /*
  82  * Common request structure for NVMe passthrough.  All drivers must have
  83  * this structure as the first member of their request-private data.
  84  */
  85 struct nvme_request {
  86         struct nvme_command     *cmd;
  87         union nvme_result       result;
  88         u8                      retries;
  89         u8                      flags;
  90         u16                     status;
  91 };
  92
  93 enum {
  94         NVME_REQ_CANCELLED              = (1 << 0),
  95 };
  96
  97 static inline struct nvme_request *nvme_req(struct request *req)
  98 {
  99         return blk_mq_rq_to_pdu(req);
 100 }
 101
 102 /* The below value is the specific amount of delay needed before checking
 103  * readiness in case of the PCI_DEVICE(0x1c58, 0x0003), which needs the
 104  * NVME_QUIRK_DELAY_BEFORE_CHK_RDY quirk enabled. The value (in ms) was
 105  * found empirically.
 106  */
 107 #define NVME_QUIRK_DELAY_AMOUNT         2000
 108
 109 enum nvme_ctrl_state {
 110         NVME_CTRL_NEW,
 111         NVME_CTRL_LIVE,
 112         NVME_CTRL_RESETTING,
 113         NVME_CTRL_RECONNECTING,
 114         NVME_CTRL_DELETING,
 115         NVME_CTRL_DEAD,
 116 };
 117
 118 struct nvme_ctrl {
 119         enum nvme_ctrl_state state;
 120         bool identified;
 121         spinlock_t lock;
 122         const struct nvme_ctrl_ops *ops;
 123         struct request_queue *admin_q;
 124         struct request_queue *connect_q;
 125         struct device *dev;
 126         struct kref kref;
 127         int instance;
 128         struct blk_mq_tag_set *tagset;
 129         struct list_head namespaces;
 130         struct mutex namespaces_mutex;
 131         struct device *device;  /* char device */
 132         struct list_head node;
 133         struct ida ns_ida;
 134
 135         struct opal_dev *opal_dev;
 136
 137         char name[12];
 138         char serial[20];
 139         char model[40];
 140         char firmware_rev[8];
 141         u16 cntlid;
 142
 143         u32 ctrl_config;
 144
 145         u32 page_size;
 146         u32 max_hw_sectors;
 147         u16 oncs;
 148         u16 vid;
 149         u16 oacs;
 150         atomic_t abort_limit;
 151         u8 event_limit;
 152         u8 vwc;
 153         u32 vs;
 154         u32 sgls;
 155         u16 kas;
 156         u8 npss;
 157         u8 apsta;
 158         unsigned int kato;
 159         bool subsystem;
 160         unsigned long quirks;
 161         struct nvme_id_power_state psd[32];
 162         struct work_struct scan_work;
 163         struct work_struct async_event_work;
 164         struct delayed_work ka_work;
 165
 166         /* Power saving configuration */
 167         u64 ps_max_latency_us;
 168
 169         /* Fabrics only */
 170         u16 sqsize;
 171         u32 ioccsz;
 172         u32 iorcsz;
 173         u16 icdoff;
 174         u16 maxcmd;
 175         struct nvmf_ctrl_options *opts;
 176 };
 177
 178 /*
 179  * An NVM Express namespace is equivalent to a SCSI LUN
 180  */
 181 struct nvme_ns {
 182         struct list_head list;
 183
 184         struct nvme_ctrl *ctrl;
 185         struct request_queue *queue;
 186         struct gendisk *disk;
 187         struct nvm_dev *ndev;
 188         struct kref kref;
 189         int instance;
 190
 191         u8 eui[8];
 192         u8 uuid[16];
 193
 194         unsigned ns_id;
 195         int lba_shift;
 196         u16 ms;
 197         bool ext;
 198         u8 pi_type;
 199         unsigned long flags;
 200
 201 #define NVME_NS_REMOVING 0
 202 #define NVME_NS_DEAD     1
 203
 204         u64 mode_select_num_blocks;
 205         u32 mode_select_block_len;
 206 };
 207
 208 struct nvme_ctrl_ops {
 209         const char *name;
 210         struct module *module;
 211         unsigned int flags;
 212 #define NVME_F_FABRICS                  (1 << 0)
 213 #define NVME_F_METADATA_SUPPORTED       (1 << 1)
 214         int (*reg_read32)(struct nvme_ctrl *ctrl, u32 off, u32 *val);
 215         int (*reg_write32)(struct nvme_ctrl *ctrl, u32 off, u32 val);
 216         int (*reg_read64)(struct nvme_ctrl *ctrl, u32 off, u64 *val);
 217         int (*reset_ctrl)(struct nvme_ctrl *ctrl);
 218         void (*free_ctrl)(struct nvme_ctrl *ctrl);
 219         void (*submit_async_event)(struct nvme_ctrl *ctrl, int aer_idx);
 220         int (*delete_ctrl)(struct nvme_ctrl *ctrl);
 221         const char *(*get_subsysnqn)(struct nvme_ctrl *ctrl);
 222         int (*get_address)(struct nvme_ctrl *ctrl, char *buf, int size);
 223 };
 224
 225 static inline bool nvme_ctrl_ready(struct nvme_ctrl *ctrl)
 226 {
 227         u32 val = 0;
 228
 229         if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &val))
 230                 return false;
 231         return val & NVME_CSTS_RDY;
 232 }
 233
 234 static inline int nvme_reset_subsystem(struct nvme_ctrl *ctrl)
 235 {
 236         if (!ctrl->subsystem)
 237                 return -ENOTTY;
 238         return ctrl->ops->reg_write32(ctrl, NVME_REG_NSSR, 0x4E564D65);
 239 }
 240
 241 static inline u64 nvme_block_nr(struct nvme_ns *ns, sector_t sector)
 242 {
 243         return (sector >> (ns->lba_shift - 9));
 244 }
 245
 246 static inline void nvme_cleanup_cmd(struct request *req)
 247 {
 248         if (req->rq_flags & RQF_SPECIAL_PAYLOAD) {
 249                 kfree(page_address(req->special_vec.bv_page) +
 250                       req->special_vec.bv_offset);
 251         }
 252 }
 253
 254 static inline void nvme_end_request(struct request *req, __le16 status,
 255                 union nvme_result result)
 256 {
 257         struct nvme_request *rq = nvme_req(req);
 258
 259         rq->status = le16_to_cpu(status) >> 1;
 260         rq->result = result;
 261         blk_mq_complete_request(req);
 262 }
 263
 264 void nvme_complete_rq(struct request *req);
 265 void nvme_cancel_request(struct request *req, void *data, bool reserved);
 266 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
 267                 enum nvme_ctrl_state new_state);
 268 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, u64 cap);
 269 int nvme_enable_ctrl(struct nvme_ctrl *ctrl, u64 cap);
 270 int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl);
 271 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
 272                 const struct nvme_ctrl_ops *ops, unsigned long quirks);
 273 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl);
 274 void nvme_put_ctrl(struct nvme_ctrl *ctrl);
 275 int nvme_init_identify(struct nvme_ctrl *ctrl);
 276
 277 void nvme_queue_scan(struct nvme_ctrl *ctrl);
 278 void nvme_remove_namespaces(struct nvme_ctrl *ctrl);
 279
 280 int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len,
 281                 bool send);
 282
 283 #define NVME_NR_AERS    1
 284 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status,
 285                 union nvme_result *res);
 286 void nvme_queue_async_events(struct nvme_ctrl *ctrl);
 287
 288 void nvme_stop_queues(struct nvme_ctrl *ctrl);
 289 void nvme_start_queues(struct nvme_ctrl *ctrl);
 290 void nvme_kill_queues(struct nvme_ctrl *ctrl);
 291 void nvme_unfreeze(struct nvme_ctrl *ctrl);
 292 void nvme_wait_freeze(struct nvme_ctrl *ctrl);
 293 void nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout);
 294 void nvme_start_freeze(struct nvme_ctrl *ctrl);
 295
 296 #define NVME_QID_ANY -1
 297 struct request *nvme_alloc_request(struct request_queue *q,
 298                 struct nvme_command *cmd, unsigned int flags, int qid);
 299 int nvme_setup_cmd(struct nvme_ns *ns, struct request *req,
 300                 struct nvme_command *cmd);
 301 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
 302                 void *buf, unsigned bufflen);
 303 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
 304                 union nvme_result *result, void *buffer, unsigned bufflen,
 305                 unsigned timeout, int qid, int at_head, int flags);
 306 int nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd,
 307                 void __user *ubuffer, unsigned bufflen, u32 *result,
 308                 unsigned timeout);
 309 int __nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd,
 310                 void __user *ubuffer, unsigned bufflen,
 311                 void __user *meta_buffer, unsigned meta_len, u32 meta_seed,
 312                 u32 *result, unsigned timeout);
 313 int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id);
 314 int nvme_identify_ns(struct nvme_ctrl *dev, unsigned nsid,
 315                 struct nvme_id_ns **id);
 316 int nvme_get_log_page(struct nvme_ctrl *dev, struct nvme_smart_log **log);
 317 int nvme_get_features(struct nvme_ctrl *dev, unsigned fid, unsigned nsid,
 318                       void *buffer, size_t buflen, u32 *result);
 319 int nvme_set_features(struct nvme_ctrl *dev, unsigned fid, unsigned dword11,
 320                       void *buffer, size_t buflen, u32 *result);
 321 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count);
 322 void nvme_start_keep_alive(struct nvme_ctrl *ctrl);
 323 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl);
 324
 325 struct sg_io_hdr;
 326
 327 int nvme_sg_io(struct nvme_ns *ns, struct sg_io_hdr __user *u_hdr);
 328 int nvme_sg_io32(struct nvme_ns *ns, unsigned long arg);
 329 int nvme_sg_get_version_num(int __user *ip);
 330
 331 #ifdef CONFIG_NVM
 332 int nvme_nvm_ns_supported(struct nvme_ns *ns, struct nvme_id_ns *id);
 333 int nvme_nvm_register(struct nvme_ns *ns, char *disk_name, int node);
 334 void nvme_nvm_unregister(struct nvme_ns *ns);
 335 int nvme_nvm_register_sysfs(struct nvme_ns *ns);
 336 void nvme_nvm_unregister_sysfs(struct nvme_ns *ns);
 337 int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd, unsigned long arg);
 338 #else
 339 static inline int nvme_nvm_register(struct nvme_ns *ns, char *disk_name,
 340                                     int node)
 341 {
 342         return 0;
 343 }
 344
 345 static inline void nvme_nvm_unregister(struct nvme_ns *ns) {};
 346 static inline int nvme_nvm_register_sysfs(struct nvme_ns *ns)
 347 {
 348         return 0;
 349 }
 350 static inline void nvme_nvm_unregister_sysfs(struct nvme_ns *ns) {};
 351 static inline int nvme_nvm_ns_supported(struct nvme_ns *ns, struct nvme_id_ns *id)
 352 {
 353         return 0;
 354 }
 355 static inline int nvme_nvm_ioctl(struct nvme_ns *ns, unsigned int cmd,
 356                                                         unsigned long arg)
 357 {
 358         return -ENOTTY;
 359 }
 360 #endif /* CONFIG_NVM */
 361
 362 static inline struct nvme_ns *nvme_get_ns_from_dev(struct device *dev)
 363 {
 364         return dev_to_disk(dev)->private_data;
 365 }
 366
 367 int __init nvme_core_init(void);
 368 void nvme_core_exit(void);
 369
 370 #endif /* _NVME_H */