drivers/regulator/qcom_smd-regulator.c

   1 /*
   2  * Copyright (c) 2015, Sony Mobile Communications AB.
   3  * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License version 2 and
   7  * only version 2 as published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  */
  14
  15 #include <linux/module.h>
  16 #include <linux/of.h>
  17 #include <linux/of_device.h>
  18 #include <linux/platform_device.h>
  19 #include <linux/regulator/driver.h>
  20 #include <linux/regulator/machine.h>
  21 #include <linux/regulator/of_regulator.h>
  22 #include <linux/soc/qcom/smd-rpm.h>
  23 #include <linux/regulator/qcom_smd-regulator.h>
  24
  25 #include "internal.h"
  26
  27 struct qcom_rpm_reg {
  28         struct device *dev;
  29
  30         struct qcom_smd_rpm *rpm;
  31
  32         u32 type;
  33         u32 id;
  34
  35         struct regulator_desc desc;
  36
  37         int is_enabled;
  38         int uV;
  39 };
  40
  41 struct rpm_regulator_req {
  42         __le32 key;
  43         __le32 nbytes;
  44         __le32 value;
  45 };
  46
  47 #define RPM_KEY_SWEN    0x6e657773 /* "swen" */
  48 #define RPM_KEY_UV      0x00007675 /* "uv" */
  49 #define RPM_KEY_MA      0x0000616d /* "ma" */
  50 #define RPM_KEY_FLOOR   0x00636676 /* "vfc" */
  51 #define RPM_KEY_CORNER  0x6e726f63 /* "corn" */
  52
  53 #define RPM_MIN_FLOOR_CORNER    0
  54 #define RPM_MAX_FLOOR_CORNER    6
  55
  56 static int rpm_reg_write_active(struct qcom_rpm_reg *vreg,
  57                                 struct rpm_regulator_req *req,
  58                                 size_t size)
  59 {
  60         return qcom_rpm_smd_write(vreg->rpm,
  61                                   QCOM_SMD_RPM_ACTIVE_STATE,
  62                                   vreg->type,
  63                                   vreg->id,
  64                                   req, size);
  65 }
  66
  67 int qcom_rpm_set_floor(struct regulator *regulator, int floor)
  68 {
  69         struct regulator_dev *rdev = regulator->rdev;
  70         struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
  71         struct rpm_regulator_req req;
  72         int ret;
  73
  74         req.key = RPM_KEY_FLOOR;
  75         req.nbytes = sizeof(u32);
  76         req.value = floor;
  77
  78         if (floor < RPM_MIN_FLOOR_CORNER || floor > RPM_MAX_FLOOR_CORNER)
  79                 return -EINVAL;
  80
  81         ret = rpm_reg_write_active(vreg, &req, sizeof(req));
  82         if (ret)
  83                 dev_err(rdev_get_dev(rdev), "Failed to set floor %d\n", floor);
  84
  85         return ret;
  86 }
  87 EXPORT_SYMBOL(qcom_rpm_set_floor);
  88
  89 int qcom_rpm_set_corner(struct regulator *regulator, int corner)
  90 {
  91         struct regulator_dev *rdev = regulator->rdev;
  92         struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
  93         struct rpm_regulator_req req;
  94         int ret;
  95
  96         req.key = RPM_KEY_CORNER;
  97         req.nbytes = sizeof(u32);
  98         req.value = corner;
  99
 100         if (corner < RPM_MIN_FLOOR_CORNER || corner > RPM_MAX_FLOOR_CORNER)
 101                 return -EINVAL;
 102
 103         ret = rpm_reg_write_active(vreg, &req, sizeof(req));
 104         if (ret)
 105                 dev_err(rdev_get_dev(rdev), "Failed to set corner %d\n", corner);
 106
 107         return ret;
 108 }
 109 EXPORT_SYMBOL(qcom_rpm_set_corner);
 110
 111 static int rpm_reg_enable(struct regulator_dev *rdev)
 112 {
 113         struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
 114         struct rpm_regulator_req req;
 115         int ret;
 116
 117         req.key = cpu_to_le32(RPM_KEY_SWEN);
 118         req.nbytes = cpu_to_le32(sizeof(u32));
 119         req.value = cpu_to_le32(1);
 120
 121         ret = rpm_reg_write_active(vreg, &req, sizeof(req));
 122         if (!ret)
 123                 vreg->is_enabled = 1;
 124
 125         return ret;
 126 }
 127
 128 static int rpm_reg_is_enabled(struct regulator_dev *rdev)
 129 {
 130         struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
 131
 132         return vreg->is_enabled;
 133 }
 134
 135 static int rpm_reg_disable(struct regulator_dev *rdev)
 136 {
 137         struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
 138         struct rpm_regulator_req req;
 139         int ret;
 140
 141         req.key = cpu_to_le32(RPM_KEY_SWEN);
 142         req.nbytes = cpu_to_le32(sizeof(u32));
 143         req.value = 0;
 144
 145         ret = rpm_reg_write_active(vreg, &req, sizeof(req));
 146         if (!ret)
 147                 vreg->is_enabled = 0;
 148
 149         return ret;
 150 }
 151
 152 static int rpm_reg_get_voltage(struct regulator_dev *rdev)
 153 {
 154         struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
 155
 156         return vreg->uV;
 157 }
 158
 159 static int rpm_reg_set_voltage(struct regulator_dev *rdev,
 160                                int min_uV,
 161                                int max_uV,
 162                                unsigned *selector)
 163 {
 164         struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
 165         struct rpm_regulator_req req;
 166         int ret = 0;
 167
 168         req.key = cpu_to_le32(RPM_KEY_UV);
 169         req.nbytes = cpu_to_le32(sizeof(u32));
 170         req.value = cpu_to_le32(min_uV);
 171
 172         ret = rpm_reg_write_active(vreg, &req, sizeof(req));
 173         if (!ret)
 174                 vreg->uV = min_uV;
 175
 176         return ret;
 177 }
 178
 179 static int rpm_reg_set_load(struct regulator_dev *rdev, int load_uA)
 180 {
 181         struct qcom_rpm_reg *vreg = rdev_get_drvdata(rdev);
 182         struct rpm_regulator_req req;
 183
 184         req.key = cpu_to_le32(RPM_KEY_MA);
 185         req.nbytes = cpu_to_le32(sizeof(u32));
 186         req.value = cpu_to_le32(load_uA / 1000);
 187
 188         return rpm_reg_write_active(vreg, &req, sizeof(req));
 189 }
 190
 191 static const struct regulator_ops rpm_smps_ldo_ops = {
 192         .enable = rpm_reg_enable,
 193         .disable = rpm_reg_disable,
 194         .is_enabled = rpm_reg_is_enabled,
 195         .list_voltage = regulator_list_voltage_linear_range,
 196
 197         .get_voltage = rpm_reg_get_voltage,
 198         .set_voltage = rpm_reg_set_voltage,
 199
 200         .set_load = rpm_reg_set_load,
 201 };
 202
 203 static const struct regulator_ops rpm_smps_ldo_ops_fixed = {
 204         .enable = rpm_reg_enable,
 205         .disable = rpm_reg_disable,
 206         .is_enabled = rpm_reg_is_enabled,
 207
 208         .get_voltage = rpm_reg_get_voltage,
 209         .set_voltage = rpm_reg_set_voltage,
 210
 211         .set_load = rpm_reg_set_load,
 212 };
 213
 214 static const struct regulator_ops rpm_switch_ops = {
 215         .enable = rpm_reg_enable,
 216         .disable = rpm_reg_disable,
 217         .is_enabled = rpm_reg_is_enabled,
 218 };
 219
 220 static const struct regulator_desc pma8084_hfsmps = {
 221         .linear_ranges = (struct regulator_linear_range[]) {
 222                 REGULATOR_LINEAR_RANGE(375000,  0,  95, 12500),
 223                 REGULATOR_LINEAR_RANGE(1550000, 96, 158, 25000),
 224         },
 225         .n_linear_ranges = 2,
 226         .n_voltages = 159,
 227         .ops = &rpm_smps_ldo_ops,
 228 };
 229
 230 static const struct regulator_desc pma8084_ftsmps = {
 231         .linear_ranges = (struct regulator_linear_range[]) {
 232                 REGULATOR_LINEAR_RANGE(350000,  0, 184, 5000),
 233                 REGULATOR_LINEAR_RANGE(700000, 185, 339, 10000),
 234         },
 235         .n_linear_ranges = 2,
 236         .n_voltages = 340,
 237         .ops = &rpm_smps_ldo_ops,
 238 };
 239
 240 static const struct regulator_desc pma8084_pldo = {
 241         .linear_ranges = (struct regulator_linear_range[]) {
 242                 REGULATOR_LINEAR_RANGE(750000,  0,  30, 25000),
 243                 REGULATOR_LINEAR_RANGE(1500000, 31, 99, 50000),
 244         },
 245         .n_linear_ranges = 2,
 246         .n_voltages = 100,
 247         .ops = &rpm_smps_ldo_ops,
 248 };
 249
 250 static const struct regulator_desc pma8084_nldo = {
 251         .linear_ranges = (struct regulator_linear_range[]) {
 252                 REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
 253         },
 254         .n_linear_ranges = 1,
 255         .n_voltages = 64,
 256         .ops = &rpm_smps_ldo_ops,
 257 };
 258
 259 static const struct regulator_desc pma8084_switch = {
 260         .ops = &rpm_switch_ops,
 261 };
 262
 263 static const struct regulator_desc pm8x41_hfsmps = {
 264         .linear_ranges = (struct regulator_linear_range[]) {
 265                 REGULATOR_LINEAR_RANGE( 375000,  0,  95, 12500),
 266                 REGULATOR_LINEAR_RANGE(1550000, 96, 158, 25000),
 267         },
 268         .n_linear_ranges = 2,
 269         .n_voltages = 159,
 270         .ops = &rpm_smps_ldo_ops,
 271 };
 272
 273 static const struct regulator_desc pm8841_ftsmps = {
 274         .linear_ranges = (struct regulator_linear_range[]) {
 275                 REGULATOR_LINEAR_RANGE(350000,  0, 184, 5000),
 276                 REGULATOR_LINEAR_RANGE(700000, 185, 339, 10000),
 277         },
 278         .n_linear_ranges = 2,
 279         .n_voltages = 340,
 280         .ops = &rpm_smps_ldo_ops,
 281 };
 282
 283 static const struct regulator_desc pm8941_boost = {
 284         .linear_ranges = (struct regulator_linear_range[]) {
 285                 REGULATOR_LINEAR_RANGE(4000000, 0, 15, 100000),
 286         },
 287         .n_linear_ranges = 1,
 288         .n_voltages = 16,
 289         .ops = &rpm_smps_ldo_ops,
 290 };
 291
 292 static const struct regulator_desc pm8941_pldo = {
 293         .linear_ranges = (struct regulator_linear_range[]) {
 294                 REGULATOR_LINEAR_RANGE( 750000,  0,  30, 25000),
 295                 REGULATOR_LINEAR_RANGE(1500000, 31, 99, 50000),
 296         },
 297         .n_linear_ranges = 2,
 298         .n_voltages = 100,
 299         .ops = &rpm_smps_ldo_ops,
 300 };
 301
 302 static const struct regulator_desc pm8941_nldo = {
 303         .linear_ranges = (struct regulator_linear_range[]) {
 304                 REGULATOR_LINEAR_RANGE(750000, 0, 63, 12500),
 305         },
 306         .n_linear_ranges = 1,
 307         .n_voltages = 64,
 308         .ops = &rpm_smps_ldo_ops,
 309 };
 310
 311 static const struct regulator_desc pm8941_lnldo = {
 312         .fixed_uV = 1740000,
 313         .n_voltages = 1,
 314         .ops = &rpm_smps_ldo_ops_fixed,
 315 };
 316
 317 static const struct regulator_desc pm8941_switch = {
 318         .ops = &rpm_switch_ops,
 319 };
 320
 321 static const struct regulator_desc pm8916_pldo = {
 322         .linear_ranges = (struct regulator_linear_range[]) {
 323                 REGULATOR_LINEAR_RANGE(750000, 0, 208, 12500),
 324         },
 325         .n_linear_ranges = 1,
 326         .n_voltages = 209,
 327         .ops = &rpm_smps_ldo_ops,
 328 };
 329
 330 static const struct regulator_desc pm8916_nldo = {
 331         .linear_ranges = (struct regulator_linear_range[]) {
 332                 REGULATOR_LINEAR_RANGE(375000, 0, 93, 12500),
 333         },
 334         .n_linear_ranges = 1,
 335         .n_voltages = 94,
 336         .ops = &rpm_smps_ldo_ops,
 337 };
 338
 339 static const struct regulator_desc pm8916_buck_lvo_smps = {
 340         .linear_ranges = (struct regulator_linear_range[]) {
 341                 REGULATOR_LINEAR_RANGE(375000, 0, 95, 12500),
 342                 REGULATOR_LINEAR_RANGE(750000, 96, 127, 25000),
 343         },
 344         .n_linear_ranges = 2,
 345         .n_voltages = 128,
 346         .ops = &rpm_smps_ldo_ops,
 347 };
 348
 349 static const struct regulator_desc pm8916_buck_hvo_smps = {
 350         .linear_ranges = (struct regulator_linear_range[]) {
 351                 REGULATOR_LINEAR_RANGE(1550000, 0, 31, 25000),
 352         },
 353         .n_linear_ranges = 1,
 354         .n_voltages = 32,
 355         .ops = &rpm_smps_ldo_ops,
 356 };
 357
 358 struct rpm_regulator_data {
 359         const char *name;
 360         u32 type;
 361         u32 id;
 362         const struct regulator_desc *desc;
 363         const char *supply;
 364 };
 365
 366 static const struct rpm_regulator_data rpm_pm8841_regulators[] = {
 367         { "s1", QCOM_SMD_RPM_SMPB, 1, &pm8x41_hfsmps, "vdd_s1" },
 368         { "s2", QCOM_SMD_RPM_SMPB, 2, &pm8841_ftsmps, "vdd_s2" },
 369         { "s3", QCOM_SMD_RPM_SMPB, 3, &pm8x41_hfsmps, "vdd_s3" },
 370         { "s4", QCOM_SMD_RPM_SMPB, 4, &pm8841_ftsmps, "vdd_s4" },
 371         { "s5", QCOM_SMD_RPM_SMPB, 5, &pm8841_ftsmps, "vdd_s5" },
 372         { "s6", QCOM_SMD_RPM_SMPB, 6, &pm8841_ftsmps, "vdd_s6" },
 373         { "s7", QCOM_SMD_RPM_SMPB, 7, &pm8841_ftsmps, "vdd_s7" },
 374         { "s8", QCOM_SMD_RPM_SMPB, 8, &pm8841_ftsmps, "vdd_s8" },
 375         {}
 376 };
 377
 378 static const struct rpm_regulator_data rpm_pm8916_regulators[] = {
 379         { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8916_buck_lvo_smps, "vdd_s1" },
 380         { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8916_buck_lvo_smps, "vdd_s2" },
 381         { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8916_buck_lvo_smps, "vdd_s3" },
 382         { "s4", QCOM_SMD_RPM_SMPA, 4, &pm8916_buck_hvo_smps, "vdd_s4" },
 383         { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8916_nldo, "vdd_l1_l2_l3" },
 384         { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8916_nldo, "vdd_l1_l2_l3" },
 385         { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8916_nldo, "vdd_l1_l2_l3" },
 386         { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8916_pldo, "vdd_l4_l5_l6" },
 387         { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8916_pldo, "vdd_l4_l5_l6" },
 388         { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8916_pldo, "vdd_l4_l5_l6" },
 389         { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8916_pldo, "vdd_l7" },
 390         { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8916_pldo, "vdd_l8__l18" },
 391         { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8916_pldo, "vdd_l8__l18" },
 392         { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8916_pldo, "vdd_l8__l18"},
 393         { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8916_pldo, "vdd_l8__l18"},
 394         { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8916_pldo, "vdd_l8__l18"},
 395         { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8916_pldo, "vdd_l8__l18"},
 396         { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8916_pldo, "vdd_l8__l18"},
 397         { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8916_pldo, "vdd_l8__l18"},
 398         { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8916_pldo, "vdd_l8__l18"},
 399         { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8916_pldo, "vdd_l8__l18"},
 400         { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8916_pldo, "vdd_l8__l18"},
 401         {}
 402 };
 403
 404 static const struct rpm_regulator_data rpm_pm8941_regulators[] = {
 405         { "s1", QCOM_SMD_RPM_SMPA, 1, &pm8x41_hfsmps, "vdd_s1" },
 406         { "s2", QCOM_SMD_RPM_SMPA, 2, &pm8x41_hfsmps, "vdd_s2" },
 407         { "s3", QCOM_SMD_RPM_SMPA, 3, &pm8x41_hfsmps, "vdd_s3" },
 408         { "s4", QCOM_SMD_RPM_BOOST, 1, &pm8941_boost },
 409
 410         { "l1", QCOM_SMD_RPM_LDOA, 1, &pm8941_nldo, "vdd_l1_l3" },
 411         { "l2", QCOM_SMD_RPM_LDOA, 2, &pm8941_nldo, "vdd_l2_lvs1_2_3" },
 412         { "l3", QCOM_SMD_RPM_LDOA, 3, &pm8941_nldo, "vdd_l1_l3" },
 413         { "l4", QCOM_SMD_RPM_LDOA, 4, &pm8941_nldo, "vdd_l4_l11" },
 414         { "l5", QCOM_SMD_RPM_LDOA, 5, &pm8941_lnldo, "vdd_l5_l7" },
 415         { "l6", QCOM_SMD_RPM_LDOA, 6, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
 416         { "l7", QCOM_SMD_RPM_LDOA, 7, &pm8941_lnldo, "vdd_l5_l7" },
 417         { "l8", QCOM_SMD_RPM_LDOA, 8, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
 418         { "l9", QCOM_SMD_RPM_LDOA, 9, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
 419         { "l10", QCOM_SMD_RPM_LDOA, 10, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
 420         { "l11", QCOM_SMD_RPM_LDOA, 11, &pm8941_nldo, "vdd_l4_l11" },
 421         { "l12", QCOM_SMD_RPM_LDOA, 12, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
 422         { "l13", QCOM_SMD_RPM_LDOA, 13, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
 423         { "l14", QCOM_SMD_RPM_LDOA, 14, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
 424         { "l15", QCOM_SMD_RPM_LDOA, 15, &pm8941_pldo, "vdd_l6_l12_l14_l15" },
 425         { "l16", QCOM_SMD_RPM_LDOA, 16, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
 426         { "l17", QCOM_SMD_RPM_LDOA, 17, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
 427         { "l18", QCOM_SMD_RPM_LDOA, 18, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
 428         { "l19", QCOM_SMD_RPM_LDOA, 19, &pm8941_pldo, "vdd_l8_l16_l18_l19" },
 429         { "l20", QCOM_SMD_RPM_LDOA, 20, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
 430         { "l21", QCOM_SMD_RPM_LDOA, 21, &pm8941_pldo, "vdd_l21" },
 431         { "l22", QCOM_SMD_RPM_LDOA, 22, &pm8941_pldo, "vdd_l9_l10_l17_l22" },
 432         { "l23", QCOM_SMD_RPM_LDOA, 23, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
 433         { "l24", QCOM_SMD_RPM_LDOA, 24, &pm8941_pldo, "vdd_l13_l20_l23_l24" },
 434
 435         { "lvs1", QCOM_SMD_RPM_VSA, 1, &pm8941_switch, "vdd_l2_lvs1_2_3" },
 436         { "lvs2", QCOM_SMD_RPM_VSA, 2, &pm8941_switch, "vdd_l2_lvs1_2_3" },
 437         { "lvs3", QCOM_SMD_RPM_VSA, 3, &pm8941_switch, "vdd_l2_lvs1_2_3" },
 438
 439         { "5vs1", QCOM_SMD_RPM_VSA, 4, &pm8941_switch, "vin_5vs" },
 440         { "5vs2", QCOM_SMD_RPM_VSA, 5, &pm8941_switch, "vin_5vs" },
 441
 442         {}
 443 };
 444
 445 static const struct rpm_regulator_data rpm_pma8084_regulators[] = {
 446         { "s1", QCOM_SMD_RPM_SMPA, 1, &pma8084_ftsmps, "vdd_s1" },
 447         { "s2", QCOM_SMD_RPM_SMPA, 2, &pma8084_ftsmps, "vdd_s2" },
 448         { "s3", QCOM_SMD_RPM_SMPA, 3, &pma8084_hfsmps, "vdd_s3" },
 449         { "s4", QCOM_SMD_RPM_SMPA, 4, &pma8084_hfsmps, "vdd_s4" },
 450         { "s5", QCOM_SMD_RPM_SMPA, 5, &pma8084_hfsmps, "vdd_s5" },
 451         { "s6", QCOM_SMD_RPM_SMPA, 6, &pma8084_ftsmps, "vdd_s6" },
 452         { "s7", QCOM_SMD_RPM_SMPA, 7, &pma8084_ftsmps, "vdd_s7" },
 453         { "s8", QCOM_SMD_RPM_SMPA, 8, &pma8084_ftsmps, "vdd_s8" },
 454         { "s9", QCOM_SMD_RPM_SMPA, 9, &pma8084_ftsmps, "vdd_s9" },
 455         { "s10", QCOM_SMD_RPM_SMPA, 10, &pma8084_ftsmps, "vdd_s10" },
 456         { "s11", QCOM_SMD_RPM_SMPA, 11, &pma8084_ftsmps, "vdd_s11" },
 457         { "s12", QCOM_SMD_RPM_SMPA, 12, &pma8084_ftsmps, "vdd_s12" },
 458
 459         { "l1", QCOM_SMD_RPM_LDOA, 1, &pma8084_nldo, "vdd_l1_l11" },
 460         { "l2", QCOM_SMD_RPM_LDOA, 2, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
 461         { "l3", QCOM_SMD_RPM_LDOA, 3, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
 462         { "l4", QCOM_SMD_RPM_LDOA, 4, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
 463         { "l5", QCOM_SMD_RPM_LDOA, 5, &pma8084_pldo, "vdd_l5_l7" },
 464         { "l6", QCOM_SMD_RPM_LDOA, 6, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
 465         { "l7", QCOM_SMD_RPM_LDOA, 7, &pma8084_pldo, "vdd_l5_l7" },
 466         { "l8", QCOM_SMD_RPM_LDOA, 8, &pma8084_pldo, "vdd_l8" },
 467         { "l9", QCOM_SMD_RPM_LDOA, 9, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
 468         { "l10", QCOM_SMD_RPM_LDOA, 10, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
 469         { "l11", QCOM_SMD_RPM_LDOA, 11, &pma8084_nldo, "vdd_l1_l11" },
 470         { "l12", QCOM_SMD_RPM_LDOA, 12, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
 471         { "l13", QCOM_SMD_RPM_LDOA, 13, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
 472         { "l14", QCOM_SMD_RPM_LDOA, 14, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
 473         { "l15", QCOM_SMD_RPM_LDOA, 15, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
 474         { "l16", QCOM_SMD_RPM_LDOA, 16, &pma8084_pldo, "vdd_l16_l25" },
 475         { "l17", QCOM_SMD_RPM_LDOA, 17, &pma8084_pldo, "vdd_l17" },
 476         { "l18", QCOM_SMD_RPM_LDOA, 18, &pma8084_pldo, "vdd_l18" },
 477         { "l19", QCOM_SMD_RPM_LDOA, 19, &pma8084_pldo, "vdd_l19" },
 478         { "l20", QCOM_SMD_RPM_LDOA, 20, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
 479         { "l21", QCOM_SMD_RPM_LDOA, 21, &pma8084_pldo, "vdd_l21" },
 480         { "l22", QCOM_SMD_RPM_LDOA, 22, &pma8084_pldo, "vdd_l22" },
 481         { "l23", QCOM_SMD_RPM_LDOA, 23, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
 482         { "l24", QCOM_SMD_RPM_LDOA, 24, &pma8084_pldo, "vdd_l9_l10_l13_l20_l23_l24" },
 483         { "l25", QCOM_SMD_RPM_LDOA, 25, &pma8084_pldo, "vdd_l16_l25" },
 484         { "l26", QCOM_SMD_RPM_LDOA, 26, &pma8084_pldo, "vdd_l6_l12_l14_l15_l26" },
 485         { "l27", QCOM_SMD_RPM_LDOA, 27, &pma8084_nldo, "vdd_l2_l3_l4_l27" },
 486
 487         { "lvs1", QCOM_SMD_RPM_VSA, 1, &pma8084_switch },
 488         { "lvs2", QCOM_SMD_RPM_VSA, 2, &pma8084_switch },
 489         { "lvs3", QCOM_SMD_RPM_VSA, 3, &pma8084_switch },
 490         { "lvs4", QCOM_SMD_RPM_VSA, 4, &pma8084_switch },
 491         { "5vs1", QCOM_SMD_RPM_VSA, 5, &pma8084_switch },
 492
 493         {}
 494 };
 495
 496 static const struct of_device_id rpm_of_match[] = {
 497         { .compatible = "qcom,rpm-pm8841-regulators", .data = &rpm_pm8841_regulators },
 498         { .compatible = "qcom,rpm-pm8916-regulators", .data = &rpm_pm8916_regulators },
 499         { .compatible = "qcom,rpm-pm8941-regulators", .data = &rpm_pm8941_regulators },
 500         { .compatible = "qcom,rpm-pma8084-regulators", .data = &rpm_pma8084_regulators },
 501         {}
 502 };
 503 MODULE_DEVICE_TABLE(of, rpm_of_match);
 504
 505 static int rpm_reg_probe(struct platform_device *pdev)
 506 {
 507         const struct rpm_regulator_data *reg;
 508         const struct of_device_id *match;
 509         struct regulator_config config = { };
 510         struct regulator_dev *rdev;
 511         struct qcom_rpm_reg *vreg;
 512         struct qcom_smd_rpm *rpm;
 513
 514         rpm = dev_get_drvdata(pdev->dev.parent);
 515         if (!rpm) {
 516                 dev_err(&pdev->dev, "unable to retrieve handle to rpm\n");
 517                 return -ENODEV;
 518         }
 519
 520         match = of_match_device(rpm_of_match, &pdev->dev);
 521         for (reg = match->data; reg->name; reg++) {
 522                 vreg = devm_kzalloc(&pdev->dev, sizeof(*vreg), GFP_KERNEL);
 523                 if (!vreg)
 524                         return -ENOMEM;
 525
 526                 vreg->dev = &pdev->dev;
 527                 vreg->type = reg->type;
 528                 vreg->id = reg->id;
 529                 vreg->rpm = rpm;
 530
 531                 memcpy(&vreg->desc, reg->desc, sizeof(vreg->desc));
 532
 533                 vreg->desc.id = -1;
 534                 vreg->desc.owner = THIS_MODULE;
 535                 vreg->desc.type = REGULATOR_VOLTAGE;
 536                 vreg->desc.name = reg->name;
 537                 vreg->desc.supply_name = reg->supply;
 538                 vreg->desc.of_match = reg->name;
 539
 540                 config.dev = &pdev->dev;
 541                 config.driver_data = vreg;
 542                 rdev = devm_regulator_register(&pdev->dev, &vreg->desc, &config);
 543                 if (IS_ERR(rdev)) {
 544                         dev_err(&pdev->dev, "failed to register %s\n", reg->name);
 545                         return PTR_ERR(rdev);
 546                 }
 547         }
 548
 549         return 0;
 550 }
 551
 552 static struct platform_driver rpm_reg_driver = {
 553         .probe = rpm_reg_probe,
 554         .driver = {
 555                 .name  = "qcom_rpm_smd_regulator",
 556                 .of_match_table = rpm_of_match,
 557         },
 558 };
 559
 560 static int __init rpm_reg_init(void)
 561 {
 562         return platform_driver_register(&rpm_reg_driver);
 563 }
 564 subsys_initcall(rpm_reg_init);
 565
 566 static void __exit rpm_reg_exit(void)
 567 {
 568         platform_driver_unregister(&rpm_reg_driver);
 569 }
 570 module_exit(rpm_reg_exit)
 571
 572 MODULE_DESCRIPTION("Qualcomm RPM regulator driver");
 573 MODULE_LICENSE("GPL v2");