drivers/staging/rdma/hfi1/rc.c

   1 /*
   2  *
   3  * This file is provided under a dual BSD/GPLv2 license.  When using or
   4  * redistributing this file, you may do so under either license.
   5  *
   6  * GPL LICENSE SUMMARY
   7  *
   8  * Copyright(c) 2015 Intel Corporation.
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of version 2 of the GNU General Public License as
  12  * published by the Free Software Foundation.
  13  *
  14  * This program is distributed in the hope that it will be useful, but
  15  * WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  17  * General Public License for more details.
  18  *
  19  * BSD LICENSE
  20  *
  21  * Copyright(c) 2015 Intel Corporation.
  22  *
  23  * Redistribution and use in source and binary forms, with or without
  24  * modification, are permitted provided that the following conditions
  25  * are met:
  26  *
  27  *  - Redistributions of source code must retain the above copyright
  28  *    notice, this list of conditions and the following disclaimer.
  29  *  - Redistributions in binary form must reproduce the above copyright
  30  *    notice, this list of conditions and the following disclaimer in
  31  *    the documentation and/or other materials provided with the
  32  *    distribution.
  33  *  - Neither the name of Intel Corporation nor the names of its
  34  *    contributors may be used to endorse or promote products derived
  35  *    from this software without specific prior written permission.
  36  *
  37  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  38  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  39  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  40  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  41  * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  42  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  43  * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  44  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  45  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  46  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  47  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  48  *
  49  */
  50
  51 #include <linux/io.h>
  52
  53 #include "hfi.h"
  54 #include "qp.h"
  55 #include "sdma.h"
  56 #include "trace.h"
  57
  58 /* cut down ridiculously long IB macro names */
  59 #define OP(x) IB_OPCODE_RC_##x
  60
  61 static void rc_timeout(unsigned long arg);
  62
  63 static u32 restart_sge(struct hfi1_sge_state *ss, struct hfi1_swqe *wqe,
  64                        u32 psn, u32 pmtu)
  65 {
  66         u32 len;
  67
  68         len = delta_psn(psn, wqe->psn) * pmtu;
  69         ss->sge = wqe->sg_list[0];
  70         ss->sg_list = wqe->sg_list + 1;
  71         ss->num_sge = wqe->wr.num_sge;
  72         ss->total_len = wqe->length;
  73         hfi1_skip_sge(ss, len, 0);
  74         return wqe->length - len;
  75 }
  76
  77 static void start_timer(struct hfi1_qp *qp)
  78 {
  79         qp->s_flags |= HFI1_S_TIMER;
  80         qp->s_timer.function = rc_timeout;
  81         /* 4.096 usec. * (1 << qp->timeout) */
  82         qp->s_timer.expires = jiffies + qp->timeout_jiffies;
  83         add_timer(&qp->s_timer);
  84 }
  85
  86 /**
  87  * make_rc_ack - construct a response packet (ACK, NAK, or RDMA read)
  88  * @dev: the device for this QP
  89  * @qp: a pointer to the QP
  90  * @ohdr: a pointer to the IB header being constructed
  91  * @pmtu: the path MTU
  92  *
  93  * Return 1 if constructed; otherwise, return 0.
  94  * Note that we are in the responder's side of the QP context.
  95  * Note the QP s_lock must be held.
  96  */
  97 static int make_rc_ack(struct hfi1_ibdev *dev, struct hfi1_qp *qp,
  98                        struct hfi1_other_headers *ohdr, u32 pmtu)
  99 {
 100         struct hfi1_ack_entry *e;
 101         u32 hwords;
 102         u32 len;
 103         u32 bth0;
 104         u32 bth2;
 105         int middle = 0;
 106
 107         /* Don't send an ACK if we aren't supposed to. */
 108         if (!(ib_hfi1_state_ops[qp->state] & HFI1_PROCESS_RECV_OK))
 109                 goto bail;
 110
 111         /* header size in 32-bit words LRH+BTH = (8+12)/4. */
 112         hwords = 5;
 113
 114         switch (qp->s_ack_state) {
 115         case OP(RDMA_READ_RESPONSE_LAST):
 116         case OP(RDMA_READ_RESPONSE_ONLY):
 117                 e = &qp->s_ack_queue[qp->s_tail_ack_queue];
 118                 if (e->rdma_sge.mr) {
 119                         hfi1_put_mr(e->rdma_sge.mr);
 120                         e->rdma_sge.mr = NULL;
 121                 }
 122                 /* FALLTHROUGH */
 123         case OP(ATOMIC_ACKNOWLEDGE):
 124                 /*
 125                  * We can increment the tail pointer now that the last
 126                  * response has been sent instead of only being
 127                  * constructed.
 128                  */
 129                 if (++qp->s_tail_ack_queue > HFI1_MAX_RDMA_ATOMIC)
 130                         qp->s_tail_ack_queue = 0;
 131                 /* FALLTHROUGH */
 132         case OP(SEND_ONLY):
 133         case OP(ACKNOWLEDGE):
 134                 /* Check for no next entry in the queue. */
 135                 if (qp->r_head_ack_queue == qp->s_tail_ack_queue) {
 136                         if (qp->s_flags & HFI1_S_ACK_PENDING)
 137                                 goto normal;
 138                         goto bail;
 139                 }
 140
 141                 e = &qp->s_ack_queue[qp->s_tail_ack_queue];
 142                 if (e->opcode == OP(RDMA_READ_REQUEST)) {
 143                         /*
 144                          * If a RDMA read response is being resent and
 145                          * we haven't seen the duplicate request yet,
 146                          * then stop sending the remaining responses the
 147                          * responder has seen until the requester re-sends it.
 148                          */
 149                         len = e->rdma_sge.sge_length;
 150                         if (len && !e->rdma_sge.mr) {
 151                                 qp->s_tail_ack_queue = qp->r_head_ack_queue;
 152                                 goto bail;
 153                         }
 154                         /* Copy SGE state in case we need to resend */
 155                         qp->s_rdma_mr = e->rdma_sge.mr;
 156                         if (qp->s_rdma_mr)
 157                                 hfi1_get_mr(qp->s_rdma_mr);
 158                         qp->s_ack_rdma_sge.sge = e->rdma_sge;
 159                         qp->s_ack_rdma_sge.num_sge = 1;
 160                         qp->s_cur_sge = &qp->s_ack_rdma_sge;
 161                         if (len > pmtu) {
 162                                 len = pmtu;
 163                                 qp->s_ack_state = OP(RDMA_READ_RESPONSE_FIRST);
 164                         } else {
 165                                 qp->s_ack_state = OP(RDMA_READ_RESPONSE_ONLY);
 166                                 e->sent = 1;
 167                         }
 168                         ohdr->u.aeth = hfi1_compute_aeth(qp);
 169                         hwords++;
 170                         qp->s_ack_rdma_psn = e->psn;
 171                         bth2 = mask_psn(qp->s_ack_rdma_psn++);
 172                 } else {
 173                         /* COMPARE_SWAP or FETCH_ADD */
 174                         qp->s_cur_sge = NULL;
 175                         len = 0;
 176                         qp->s_ack_state = OP(ATOMIC_ACKNOWLEDGE);
 177                         ohdr->u.at.aeth = hfi1_compute_aeth(qp);
 178                         ohdr->u.at.atomic_ack_eth[0] =
 179                                 cpu_to_be32(e->atomic_data >> 32);
 180                         ohdr->u.at.atomic_ack_eth[1] =
 181                                 cpu_to_be32(e->atomic_data);
 182                         hwords += sizeof(ohdr->u.at) / sizeof(u32);
 183                         bth2 = mask_psn(e->psn);
 184                         e->sent = 1;
 185                 }
 186                 bth0 = qp->s_ack_state << 24;
 187                 break;
 188
 189         case OP(RDMA_READ_RESPONSE_FIRST):
 190                 qp->s_ack_state = OP(RDMA_READ_RESPONSE_MIDDLE);
 191                 /* FALLTHROUGH */
 192         case OP(RDMA_READ_RESPONSE_MIDDLE):
 193                 qp->s_cur_sge = &qp->s_ack_rdma_sge;
 194                 qp->s_rdma_mr = qp->s_ack_rdma_sge.sge.mr;
 195                 if (qp->s_rdma_mr)
 196                         hfi1_get_mr(qp->s_rdma_mr);
 197                 len = qp->s_ack_rdma_sge.sge.sge_length;
 198                 if (len > pmtu) {
 199                         len = pmtu;
 200                         middle = HFI1_CAP_IS_KSET(SDMA_AHG);
 201                 } else {
 202                         ohdr->u.aeth = hfi1_compute_aeth(qp);
 203                         hwords++;
 204                         qp->s_ack_state = OP(RDMA_READ_RESPONSE_LAST);
 205                         e = &qp->s_ack_queue[qp->s_tail_ack_queue];
 206                         e->sent = 1;
 207                 }
 208                 bth0 = qp->s_ack_state << 24;
 209                 bth2 = mask_psn(qp->s_ack_rdma_psn++);
 210                 break;
 211
 212         default:
 213 normal:
 214                 /*
 215                  * Send a regular ACK.
 216                  * Set the s_ack_state so we wait until after sending
 217                  * the ACK before setting s_ack_state to ACKNOWLEDGE
 218                  * (see above).
 219                  */
 220                 qp->s_ack_state = OP(SEND_ONLY);
 221                 qp->s_flags &= ~HFI1_S_ACK_PENDING;
 222                 qp->s_cur_sge = NULL;
 223                 if (qp->s_nak_state)
 224                         ohdr->u.aeth =
 225                                 cpu_to_be32((qp->r_msn & HFI1_MSN_MASK) |
 226                                             (qp->s_nak_state <<
 227                                              HFI1_AETH_CREDIT_SHIFT));
 228                 else
 229                         ohdr->u.aeth = hfi1_compute_aeth(qp);
 230                 hwords++;
 231                 len = 0;
 232                 bth0 = OP(ACKNOWLEDGE) << 24;
 233                 bth2 = mask_psn(qp->s_ack_psn);
 234         }
 235         qp->s_rdma_ack_cnt++;
 236         qp->s_hdrwords = hwords;
 237         qp->s_cur_size = len;
 238         hfi1_make_ruc_header(qp, ohdr, bth0, bth2, middle);
 239         return 1;
 240
 241 bail:
 242         qp->s_ack_state = OP(ACKNOWLEDGE);
 243         /*
 244          * Ensure s_rdma_ack_cnt changes are committed prior to resetting
 245          * HFI1_S_RESP_PENDING
 246          */
 247         smp_wmb();
 248         qp->s_flags &= ~(HFI1_S_RESP_PENDING
 249                                 | HFI1_S_ACK_PENDING
 250                                 | HFI1_S_AHG_VALID);
 251         return 0;
 252 }
 253
 254 /**
 255  * hfi1_make_rc_req - construct a request packet (SEND, RDMA r/w, ATOMIC)
 256  * @qp: a pointer to the QP
 257  *
 258  * Return 1 if constructed; otherwise, return 0.
 259  */
 260 int hfi1_make_rc_req(struct hfi1_qp *qp)
 261 {
 262         struct hfi1_ibdev *dev = to_idev(qp->ibqp.device);
 263         struct hfi1_other_headers *ohdr;
 264         struct hfi1_sge_state *ss;
 265         struct hfi1_swqe *wqe;
 266         /* header size in 32-bit words LRH+BTH = (8+12)/4. */
 267         u32 hwords = 5;
 268         u32 len;
 269         u32 bth0 = 0;
 270         u32 bth2;
 271         u32 pmtu = qp->pmtu;
 272         char newreq;
 273         unsigned long flags;
 274         int ret = 0;
 275         int middle = 0;
 276         int delta;
 277
 278         ohdr = &qp->s_hdr->ibh.u.oth;
 279         if (qp->remote_ah_attr.ah_flags & IB_AH_GRH)
 280                 ohdr = &qp->s_hdr->ibh.u.l.oth;
 281
 282         /*
 283          * The lock is needed to synchronize between the sending tasklet,
 284          * the receive interrupt handler, and timeout re-sends.
 285          */
 286         spin_lock_irqsave(&qp->s_lock, flags);
 287
 288         /* Sending responses has higher priority over sending requests. */
 289         if ((qp->s_flags & HFI1_S_RESP_PENDING) &&
 290             make_rc_ack(dev, qp, ohdr, pmtu))
 291                 goto done;
 292
 293         if (!(ib_hfi1_state_ops[qp->state] & HFI1_PROCESS_SEND_OK)) {
 294                 if (!(ib_hfi1_state_ops[qp->state] & HFI1_FLUSH_SEND))
 295                         goto bail;
 296                 /* We are in the error state, flush the work request. */
 297                 if (qp->s_last == qp->s_head)
 298                         goto bail;
 299                 /* If DMAs are in progress, we can't flush immediately. */
 300                 if (atomic_read(&qp->s_iowait.sdma_busy)) {
 301                         qp->s_flags |= HFI1_S_WAIT_DMA;
 302                         goto bail;
 303                 }
 304                 clear_ahg(qp);
 305                 wqe = get_swqe_ptr(qp, qp->s_last);
 306                 hfi1_send_complete(qp, wqe, qp->s_last != qp->s_acked ?
 307                         IB_WC_SUCCESS : IB_WC_WR_FLUSH_ERR);
 308                 /* will get called again */
 309                 goto done;
 310         }
 311
 312         if (qp->s_flags & (HFI1_S_WAIT_RNR | HFI1_S_WAIT_ACK))
 313                 goto bail;
 314
 315         if (cmp_psn(qp->s_psn, qp->s_sending_hpsn) <= 0) {
 316                 if (cmp_psn(qp->s_sending_psn, qp->s_sending_hpsn) <= 0) {
 317                         qp->s_flags |= HFI1_S_WAIT_PSN;
 318                         goto bail;
 319                 }
 320                 qp->s_sending_psn = qp->s_psn;
 321                 qp->s_sending_hpsn = qp->s_psn - 1;
 322         }
 323
 324         /* Send a request. */
 325         wqe = get_swqe_ptr(qp, qp->s_cur);
 326         switch (qp->s_state) {
 327         default:
 328                 if (!(ib_hfi1_state_ops[qp->state] & HFI1_PROCESS_NEXT_SEND_OK))
 329                         goto bail;
 330                 /*
 331                  * Resend an old request or start a new one.
 332                  *
 333                  * We keep track of the current SWQE so that
 334                  * we don't reset the "furthest progress" state
 335                  * if we need to back up.
 336                  */
 337                 newreq = 0;
 338                 if (qp->s_cur == qp->s_tail) {
 339                         /* Check if send work queue is empty. */
 340                         if (qp->s_tail == qp->s_head) {
 341                                 clear_ahg(qp);
 342                                 goto bail;
 343                         }
 344                         /*
 345                          * If a fence is requested, wait for previous
 346                          * RDMA read and atomic operations to finish.
 347                          */
 348                         if ((wqe->wr.send_flags & IB_SEND_FENCE) &&
 349                             qp->s_num_rd_atomic) {
 350                                 qp->s_flags |= HFI1_S_WAIT_FENCE;
 351                                 goto bail;
 352                         }
 353                         wqe->psn = qp->s_next_psn;
 354                         newreq = 1;
 355                 }
 356                 /*
 357                  * Note that we have to be careful not to modify the
 358                  * original work request since we may need to resend
 359                  * it.
 360                  */
 361                 len = wqe->length;
 362                 ss = &qp->s_sge;
 363                 bth2 = mask_psn(qp->s_psn);
 364                 switch (wqe->wr.opcode) {
 365                 case IB_WR_SEND:
 366                 case IB_WR_SEND_WITH_IMM:
 367                         /* If no credit, return. */
 368                         if (!(qp->s_flags & HFI1_S_UNLIMITED_CREDIT) &&
 369                             cmp_msn(wqe->ssn, qp->s_lsn + 1) > 0) {
 370                                 qp->s_flags |= HFI1_S_WAIT_SSN_CREDIT;
 371                                 goto bail;
 372                         }
 373                         wqe->lpsn = wqe->psn;
 374                         if (len > pmtu) {
 375                                 wqe->lpsn += (len - 1) / pmtu;
 376                                 qp->s_state = OP(SEND_FIRST);
 377                                 len = pmtu;
 378                                 break;
 379                         }
 380                         if (wqe->wr.opcode == IB_WR_SEND)
 381                                 qp->s_state = OP(SEND_ONLY);
 382                         else {
 383                                 qp->s_state = OP(SEND_ONLY_WITH_IMMEDIATE);
 384                                 /* Immediate data comes after the BTH */
 385                                 ohdr->u.imm_data = wqe->wr.ex.imm_data;
 386                                 hwords += 1;
 387                         }
 388                         if (wqe->wr.send_flags & IB_SEND_SOLICITED)
 389                                 bth0 |= IB_BTH_SOLICITED;
 390                         bth2 |= IB_BTH_REQ_ACK;
 391                         if (++qp->s_cur == qp->s_size)
 392                                 qp->s_cur = 0;
 393                         break;
 394
 395                 case IB_WR_RDMA_WRITE:
 396                         if (newreq && !(qp->s_flags & HFI1_S_UNLIMITED_CREDIT))
 397                                 qp->s_lsn++;
 398                         /* FALLTHROUGH */
 399                 case IB_WR_RDMA_WRITE_WITH_IMM:
 400                         /* If no credit, return. */
 401                         if (!(qp->s_flags & HFI1_S_UNLIMITED_CREDIT) &&
 402                             cmp_msn(wqe->ssn, qp->s_lsn + 1) > 0) {
 403                                 qp->s_flags |= HFI1_S_WAIT_SSN_CREDIT;
 404                                 goto bail;
 405                         }
 406                         ohdr->u.rc.reth.vaddr =
 407                                 cpu_to_be64(wqe->wr.wr.rdma.remote_addr);
 408                         ohdr->u.rc.reth.rkey =
 409                                 cpu_to_be32(wqe->wr.wr.rdma.rkey);
 410                         ohdr->u.rc.reth.length = cpu_to_be32(len);
 411                         hwords += sizeof(struct ib_reth) / sizeof(u32);
 412                         wqe->lpsn = wqe->psn;
 413                         if (len > pmtu) {
 414                                 wqe->lpsn += (len - 1) / pmtu;
 415                                 qp->s_state = OP(RDMA_WRITE_FIRST);
 416                                 len = pmtu;
 417                                 break;
 418                         }
 419                         if (wqe->wr.opcode == IB_WR_RDMA_WRITE)
 420                                 qp->s_state = OP(RDMA_WRITE_ONLY);
 421                         else {
 422                                 qp->s_state =
 423                                         OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE);
 424                                 /* Immediate data comes after RETH */
 425                                 ohdr->u.rc.imm_data = wqe->wr.ex.imm_data;
 426                                 hwords += 1;
 427                                 if (wqe->wr.send_flags & IB_SEND_SOLICITED)
 428                                         bth0 |= IB_BTH_SOLICITED;
 429                         }
 430                         bth2 |= IB_BTH_REQ_ACK;
 431                         if (++qp->s_cur == qp->s_size)
 432                                 qp->s_cur = 0;
 433                         break;
 434
 435                 case IB_WR_RDMA_READ:
 436                         /*
 437                          * Don't allow more operations to be started
 438                          * than the QP limits allow.
 439                          */
 440                         if (newreq) {
 441                                 if (qp->s_num_rd_atomic >=
 442                                     qp->s_max_rd_atomic) {
 443                                         qp->s_flags |= HFI1_S_WAIT_RDMAR;
 444                                         goto bail;
 445                                 }
 446                                 qp->s_num_rd_atomic++;
 447                                 if (!(qp->s_flags & HFI1_S_UNLIMITED_CREDIT))
 448                                         qp->s_lsn++;
 449                                 /*
 450                                  * Adjust s_next_psn to count the
 451                                  * expected number of responses.
 452                                  */
 453                                 if (len > pmtu)
 454                                         qp->s_next_psn += (len - 1) / pmtu;
 455                                 wqe->lpsn = qp->s_next_psn++;
 456                         }
 457                         ohdr->u.rc.reth.vaddr =
 458                                 cpu_to_be64(wqe->wr.wr.rdma.remote_addr);
 459                         ohdr->u.rc.reth.rkey =
 460                                 cpu_to_be32(wqe->wr.wr.rdma.rkey);
 461                         ohdr->u.rc.reth.length = cpu_to_be32(len);
 462                         qp->s_state = OP(RDMA_READ_REQUEST);
 463                         hwords += sizeof(ohdr->u.rc.reth) / sizeof(u32);
 464                         ss = NULL;
 465                         len = 0;
 466                         bth2 |= IB_BTH_REQ_ACK;
 467                         if (++qp->s_cur == qp->s_size)
 468                                 qp->s_cur = 0;
 469                         break;
 470
 471                 case IB_WR_ATOMIC_CMP_AND_SWP:
 472                 case IB_WR_ATOMIC_FETCH_AND_ADD:
 473                         /*
 474                          * Don't allow more operations to be started
 475                          * than the QP limits allow.
 476                          */
 477                         if (newreq) {
 478                                 if (qp->s_num_rd_atomic >=
 479                                     qp->s_max_rd_atomic) {
 480                                         qp->s_flags |= HFI1_S_WAIT_RDMAR;
 481                                         goto bail;
 482                                 }
 483                                 qp->s_num_rd_atomic++;
 484                                 if (!(qp->s_flags & HFI1_S_UNLIMITED_CREDIT))
 485                                         qp->s_lsn++;
 486                                 wqe->lpsn = wqe->psn;
 487                         }
 488                         if (wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP) {
 489                                 qp->s_state = OP(COMPARE_SWAP);
 490                                 ohdr->u.atomic_eth.swap_data = cpu_to_be64(
 491                                         wqe->wr.wr.atomic.swap);
 492                                 ohdr->u.atomic_eth.compare_data = cpu_to_be64(
 493                                         wqe->wr.wr.atomic.compare_add);
 494                         } else {
 495                                 qp->s_state = OP(FETCH_ADD);
 496                                 ohdr->u.atomic_eth.swap_data = cpu_to_be64(
 497                                         wqe->wr.wr.atomic.compare_add);
 498                                 ohdr->u.atomic_eth.compare_data = 0;
 499                         }
 500                         ohdr->u.atomic_eth.vaddr[0] = cpu_to_be32(
 501                                 wqe->wr.wr.atomic.remote_addr >> 32);
 502                         ohdr->u.atomic_eth.vaddr[1] = cpu_to_be32(
 503                                 wqe->wr.wr.atomic.remote_addr);
 504                         ohdr->u.atomic_eth.rkey = cpu_to_be32(
 505                                 wqe->wr.wr.atomic.rkey);
 506                         hwords += sizeof(struct ib_atomic_eth) / sizeof(u32);
 507                         ss = NULL;
 508                         len = 0;
 509                         bth2 |= IB_BTH_REQ_ACK;
 510                         if (++qp->s_cur == qp->s_size)
 511                                 qp->s_cur = 0;
 512                         break;
 513
 514                 default:
 515                         goto bail;
 516                 }
 517                 qp->s_sge.sge = wqe->sg_list[0];
 518                 qp->s_sge.sg_list = wqe->sg_list + 1;
 519                 qp->s_sge.num_sge = wqe->wr.num_sge;
 520                 qp->s_sge.total_len = wqe->length;
 521                 qp->s_len = wqe->length;
 522                 if (newreq) {
 523                         qp->s_tail++;
 524                         if (qp->s_tail >= qp->s_size)
 525                                 qp->s_tail = 0;
 526                 }
 527                 if (wqe->wr.opcode == IB_WR_RDMA_READ)
 528                         qp->s_psn = wqe->lpsn + 1;
 529                 else {
 530                         qp->s_psn++;
 531                         if (cmp_psn(qp->s_psn, qp->s_next_psn) > 0)
 532                                 qp->s_next_psn = qp->s_psn;
 533                 }
 534                 break;
 535
 536         case OP(RDMA_READ_RESPONSE_FIRST):
 537                 /*
 538                  * qp->s_state is normally set to the opcode of the
 539                  * last packet constructed for new requests and therefore
 540                  * is never set to RDMA read response.
 541                  * RDMA_READ_RESPONSE_FIRST is used by the ACK processing
 542                  * thread to indicate a SEND needs to be restarted from an
 543                  * earlier PSN without interfering with the sending thread.
 544                  * See restart_rc().
 545                  */
 546                 qp->s_len = restart_sge(&qp->s_sge, wqe, qp->s_psn, pmtu);
 547                 /* FALLTHROUGH */
 548         case OP(SEND_FIRST):
 549                 qp->s_state = OP(SEND_MIDDLE);
 550                 /* FALLTHROUGH */
 551         case OP(SEND_MIDDLE):
 552                 bth2 = mask_psn(qp->s_psn++);
 553                 if (cmp_psn(qp->s_psn, qp->s_next_psn) > 0)
 554                         qp->s_next_psn = qp->s_psn;
 555                 ss = &qp->s_sge;
 556                 len = qp->s_len;
 557                 if (len > pmtu) {
 558                         len = pmtu;
 559                         middle = HFI1_CAP_IS_KSET(SDMA_AHG);
 560                         break;
 561                 }
 562                 if (wqe->wr.opcode == IB_WR_SEND)
 563                         qp->s_state = OP(SEND_LAST);
 564                 else {
 565                         qp->s_state = OP(SEND_LAST_WITH_IMMEDIATE);
 566                         /* Immediate data comes after the BTH */
 567                         ohdr->u.imm_data = wqe->wr.ex.imm_data;
 568                         hwords += 1;
 569                 }
 570                 if (wqe->wr.send_flags & IB_SEND_SOLICITED)
 571                         bth0 |= IB_BTH_SOLICITED;
 572                 bth2 |= IB_BTH_REQ_ACK;
 573                 qp->s_cur++;
 574                 if (qp->s_cur >= qp->s_size)
 575                         qp->s_cur = 0;
 576                 break;
 577
 578         case OP(RDMA_READ_RESPONSE_LAST):
 579                 /*
 580                  * qp->s_state is normally set to the opcode of the
 581                  * last packet constructed for new requests and therefore
 582                  * is never set to RDMA read response.
 583                  * RDMA_READ_RESPONSE_LAST is used by the ACK processing
 584                  * thread to indicate a RDMA write needs to be restarted from
 585                  * an earlier PSN without interfering with the sending thread.
 586                  * See restart_rc().
 587                  */
 588                 qp->s_len = restart_sge(&qp->s_sge, wqe, qp->s_psn, pmtu);
 589                 /* FALLTHROUGH */
 590         case OP(RDMA_WRITE_FIRST):
 591                 qp->s_state = OP(RDMA_WRITE_MIDDLE);
 592                 /* FALLTHROUGH */
 593         case OP(RDMA_WRITE_MIDDLE):
 594                 bth2 = mask_psn(qp->s_psn++);
 595                 if (cmp_psn(qp->s_psn, qp->s_next_psn) > 0)
 596                         qp->s_next_psn = qp->s_psn;
 597                 ss = &qp->s_sge;
 598                 len = qp->s_len;
 599                 if (len > pmtu) {
 600                         len = pmtu;
 601                         middle = HFI1_CAP_IS_KSET(SDMA_AHG);
 602                         break;
 603                 }
 604                 if (wqe->wr.opcode == IB_WR_RDMA_WRITE)
 605                         qp->s_state = OP(RDMA_WRITE_LAST);
 606                 else {
 607                         qp->s_state = OP(RDMA_WRITE_LAST_WITH_IMMEDIATE);
 608                         /* Immediate data comes after the BTH */
 609                         ohdr->u.imm_data = wqe->wr.ex.imm_data;
 610                         hwords += 1;
 611                         if (wqe->wr.send_flags & IB_SEND_SOLICITED)
 612                                 bth0 |= IB_BTH_SOLICITED;
 613                 }
 614                 bth2 |= IB_BTH_REQ_ACK;
 615                 qp->s_cur++;
 616                 if (qp->s_cur >= qp->s_size)
 617                         qp->s_cur = 0;
 618                 break;
 619
 620         case OP(RDMA_READ_RESPONSE_MIDDLE):
 621                 /*
 622                  * qp->s_state is normally set to the opcode of the
 623                  * last packet constructed for new requests and therefore
 624                  * is never set to RDMA read response.
 625                  * RDMA_READ_RESPONSE_MIDDLE is used by the ACK processing
 626                  * thread to indicate a RDMA read needs to be restarted from
 627                  * an earlier PSN without interfering with the sending thread.
 628                  * See restart_rc().
 629                  */
 630                 len = (delta_psn(qp->s_psn, wqe->psn)) * pmtu;
 631                 ohdr->u.rc.reth.vaddr =
 632                         cpu_to_be64(wqe->wr.wr.rdma.remote_addr + len);
 633                 ohdr->u.rc.reth.rkey =
 634                         cpu_to_be32(wqe->wr.wr.rdma.rkey);
 635                 ohdr->u.rc.reth.length = cpu_to_be32(wqe->length - len);
 636                 qp->s_state = OP(RDMA_READ_REQUEST);
 637                 hwords += sizeof(ohdr->u.rc.reth) / sizeof(u32);
 638                 bth2 = mask_psn(qp->s_psn) | IB_BTH_REQ_ACK;
 639                 qp->s_psn = wqe->lpsn + 1;
 640                 ss = NULL;
 641                 len = 0;
 642                 qp->s_cur++;
 643                 if (qp->s_cur == qp->s_size)
 644                         qp->s_cur = 0;
 645                 break;
 646         }
 647         qp->s_sending_hpsn = bth2;
 648         delta = delta_psn(bth2, wqe->psn);
 649         if (delta && delta % HFI1_PSN_CREDIT == 0)
 650                 bth2 |= IB_BTH_REQ_ACK;
 651         if (qp->s_flags & HFI1_S_SEND_ONE) {
 652                 qp->s_flags &= ~HFI1_S_SEND_ONE;
 653                 qp->s_flags |= HFI1_S_WAIT_ACK;
 654                 bth2 |= IB_BTH_REQ_ACK;
 655         }
 656         qp->s_len -= len;
 657         qp->s_hdrwords = hwords;
 658         qp->s_cur_sge = ss;
 659         qp->s_cur_size = len;
 660         hfi1_make_ruc_header(
 661                 qp,
 662                 ohdr,
 663                 bth0 | (qp->s_state << 24),
 664                 bth2,
 665                 middle);
 666 done:
 667         ret = 1;
 668         goto unlock;
 669
 670 bail:
 671         qp->s_flags &= ~HFI1_S_BUSY;
 672 unlock:
 673         spin_unlock_irqrestore(&qp->s_lock, flags);
 674         return ret;
 675 }
 676
 677 /**
 678  * hfi1_send_rc_ack - Construct an ACK packet and send it
 679  * @qp: a pointer to the QP
 680  *
 681  * This is called from hfi1_rc_rcv() and handle_receive_interrupt().
 682  * Note that RDMA reads and atomics are handled in the
 683  * send side QP state and tasklet.
 684  */
 685 void hfi1_send_rc_ack(struct hfi1_ctxtdata *rcd, struct hfi1_qp *qp,
 686                       int is_fecn)
 687 {
 688         struct hfi1_ibport *ibp = to_iport(qp->ibqp.device, qp->port_num);
 689         struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
 690         u64 pbc, pbc_flags = 0;
 691         u16 lrh0;
 692         u16 sc5;
 693         u32 bth0;
 694         u32 hwords;
 695         u32 vl, plen;
 696         struct send_context *sc;
 697         struct pio_buf *pbuf;
 698         struct hfi1_ib_header hdr;
 699         struct hfi1_other_headers *ohdr;
 700         unsigned long flags;
 701
 702         /* Don't send ACK or NAK if a RDMA read or atomic is pending. */
 703         if (qp->s_flags & HFI1_S_RESP_PENDING)
 704                 goto queue_ack;
 705
 706         /* Ensure s_rdma_ack_cnt changes are committed */
 707         smp_read_barrier_depends();
 708         if (qp->s_rdma_ack_cnt)
 709                 goto queue_ack;
 710
 711         /* Construct the header */
 712         /* header size in 32-bit words LRH+BTH+AETH = (8+12+4)/4 */
 713         hwords = 6;
 714         if (unlikely(qp->remote_ah_attr.ah_flags & IB_AH_GRH)) {
 715                 hwords += hfi1_make_grh(ibp, &hdr.u.l.grh,
 716                                        &qp->remote_ah_attr.grh, hwords, 0);
 717                 ohdr = &hdr.u.l.oth;
 718                 lrh0 = HFI1_LRH_GRH;
 719         } else {
 720                 ohdr = &hdr.u.oth;
 721                 lrh0 = HFI1_LRH_BTH;
 722         }
 723         /* read pkey_index w/o lock (its atomic) */
 724         bth0 = hfi1_get_pkey(ibp, qp->s_pkey_index) | (OP(ACKNOWLEDGE) << 24);
 725         if (qp->s_mig_state == IB_MIG_MIGRATED)
 726                 bth0 |= IB_BTH_MIG_REQ;
 727         if (qp->r_nak_state)
 728                 ohdr->u.aeth = cpu_to_be32((qp->r_msn & HFI1_MSN_MASK) |
 729                                             (qp->r_nak_state <<
 730                                              HFI1_AETH_CREDIT_SHIFT));
 731         else
 732                 ohdr->u.aeth = hfi1_compute_aeth(qp);
 733         sc5 = ibp->sl_to_sc[qp->remote_ah_attr.sl];
 734         /* set PBC_DC_INFO bit (aka SC[4]) in pbc_flags */
 735         pbc_flags |= ((!!(sc5 & 0x10)) << PBC_DC_INFO_SHIFT);
 736         lrh0 |= (sc5 & 0xf) << 12 | (qp->remote_ah_attr.sl & 0xf) << 4;
 737         hdr.lrh[0] = cpu_to_be16(lrh0);
 738         hdr.lrh[1] = cpu_to_be16(qp->remote_ah_attr.dlid);
 739         hdr.lrh[2] = cpu_to_be16(hwords + SIZE_OF_CRC);
 740         hdr.lrh[3] = cpu_to_be16(ppd->lid | qp->remote_ah_attr.src_path_bits);
 741         ohdr->bth[0] = cpu_to_be32(bth0);
 742         ohdr->bth[1] = cpu_to_be32(qp->remote_qpn);
 743         ohdr->bth[1] |= cpu_to_be32((!!is_fecn) << HFI1_BECN_SHIFT);
 744         ohdr->bth[2] = cpu_to_be32(mask_psn(qp->r_ack_psn));
 745
 746         /* Don't try to send ACKs if the link isn't ACTIVE */
 747         if (driver_lstate(ppd) != IB_PORT_ACTIVE)
 748                 return;
 749
 750         sc = rcd->sc;
 751         plen = 2 /* PBC */ + hwords;
 752         vl = sc_to_vlt(ppd->dd, sc5);
 753         pbc = create_pbc(ppd, pbc_flags, qp->srate_mbps, vl, plen);
 754
 755         pbuf = sc_buffer_alloc(sc, plen, NULL, NULL);
 756         if (!pbuf) {
 757                 /*
 758                  * We have no room to send at the moment.  Pass
 759                  * responsibility for sending the ACK to the send tasklet
 760                  * so that when enough buffer space becomes available,
 761                  * the ACK is sent ahead of other outgoing packets.
 762                  */
 763                 goto queue_ack;
 764         }
 765
 766         trace_output_ibhdr(dd_from_ibdev(qp->ibqp.device), &hdr);
 767
 768         /* write the pbc and data */
 769         ppd->dd->pio_inline_send(ppd->dd, pbuf, pbc, &hdr, hwords);
 770
 771         return;
 772
 773 queue_ack:
 774         this_cpu_inc(*ibp->rc_qacks);
 775         spin_lock_irqsave(&qp->s_lock, flags);
 776         qp->s_flags |= HFI1_S_ACK_PENDING | HFI1_S_RESP_PENDING;
 777         qp->s_nak_state = qp->r_nak_state;
 778         qp->s_ack_psn = qp->r_ack_psn;
 779         if (is_fecn)
 780                 qp->s_flags |= HFI1_S_ECN;
 781
 782         /* Schedule the send tasklet. */
 783         hfi1_schedule_send(qp);
 784         spin_unlock_irqrestore(&qp->s_lock, flags);
 785 }
 786
 787 /**
 788  * reset_psn - reset the QP state to send starting from PSN
 789  * @qp: the QP
 790  * @psn: the packet sequence number to restart at
 791  *
 792  * This is called from hfi1_rc_rcv() to process an incoming RC ACK
 793  * for the given QP.
 794  * Called at interrupt level with the QP s_lock held.
 795  */
 796 static void reset_psn(struct hfi1_qp *qp, u32 psn)
 797 {
 798         u32 n = qp->s_acked;
 799         struct hfi1_swqe *wqe = get_swqe_ptr(qp, n);
 800         u32 opcode;
 801
 802         qp->s_cur = n;
 803
 804         /*
 805          * If we are starting the request from the beginning,
 806          * let the normal send code handle initialization.
 807          */
 808         if (cmp_psn(psn, wqe->psn) <= 0) {
 809                 qp->s_state = OP(SEND_LAST);
 810                 goto done;
 811         }
 812
 813         /* Find the work request opcode corresponding to the given PSN. */
 814         opcode = wqe->wr.opcode;
 815         for (;;) {
 816                 int diff;
 817
 818                 if (++n == qp->s_size)
 819                         n = 0;
 820                 if (n == qp->s_tail)
 821                         break;
 822                 wqe = get_swqe_ptr(qp, n);
 823                 diff = cmp_psn(psn, wqe->psn);
 824                 if (diff < 0)
 825                         break;
 826                 qp->s_cur = n;
 827                 /*
 828                  * If we are starting the request from the beginning,
 829                  * let the normal send code handle initialization.
 830                  */
 831                 if (diff == 0) {
 832                         qp->s_state = OP(SEND_LAST);
 833                         goto done;
 834                 }
 835                 opcode = wqe->wr.opcode;
 836         }
 837
 838         /*
 839          * Set the state to restart in the middle of a request.
 840          * Don't change the s_sge, s_cur_sge, or s_cur_size.
 841          * See hfi1_make_rc_req().
 842          */
 843         switch (opcode) {
 844         case IB_WR_SEND:
 845         case IB_WR_SEND_WITH_IMM:
 846                 qp->s_state = OP(RDMA_READ_RESPONSE_FIRST);
 847                 break;
 848
 849         case IB_WR_RDMA_WRITE:
 850         case IB_WR_RDMA_WRITE_WITH_IMM:
 851                 qp->s_state = OP(RDMA_READ_RESPONSE_LAST);
 852                 break;
 853
 854         case IB_WR_RDMA_READ:
 855                 qp->s_state = OP(RDMA_READ_RESPONSE_MIDDLE);
 856                 break;
 857
 858         default:
 859                 /*
 860                  * This case shouldn't happen since its only
 861                  * one PSN per req.
 862                  */
 863                 qp->s_state = OP(SEND_LAST);
 864         }
 865 done:
 866         qp->s_psn = psn;
 867         /*
 868          * Set HFI1_S_WAIT_PSN as rc_complete() may start the timer
 869          * asynchronously before the send tasklet can get scheduled.
 870          * Doing it in hfi1_make_rc_req() is too late.
 871          */
 872         if ((cmp_psn(qp->s_psn, qp->s_sending_hpsn) <= 0) &&
 873             (cmp_psn(qp->s_sending_psn, qp->s_sending_hpsn) <= 0))
 874                 qp->s_flags |= HFI1_S_WAIT_PSN;
 875         qp->s_flags &= ~HFI1_S_AHG_VALID;
 876 }
 877
 878 /*
 879  * Back up requester to resend the last un-ACKed request.
 880  * The QP r_lock and s_lock should be held and interrupts disabled.
 881  */
 882 static void restart_rc(struct hfi1_qp *qp, u32 psn, int wait)
 883 {
 884         struct hfi1_swqe *wqe = get_swqe_ptr(qp, qp->s_acked);
 885         struct hfi1_ibport *ibp;
 886
 887         if (qp->s_retry == 0) {
 888                 if (qp->s_mig_state == IB_MIG_ARMED) {
 889                         hfi1_migrate_qp(qp);
 890                         qp->s_retry = qp->s_retry_cnt;
 891                 } else if (qp->s_last == qp->s_acked) {
 892                         hfi1_send_complete(qp, wqe, IB_WC_RETRY_EXC_ERR);
 893                         hfi1_error_qp(qp, IB_WC_WR_FLUSH_ERR);
 894                         return;
 895                 } else /* need to handle delayed completion */
 896                         return;
 897         } else
 898                 qp->s_retry--;
 899
 900         ibp = to_iport(qp->ibqp.device, qp->port_num);
 901         if (wqe->wr.opcode == IB_WR_RDMA_READ)
 902                 ibp->n_rc_resends++;
 903         else
 904                 ibp->n_rc_resends += delta_psn(qp->s_psn, psn);
 905
 906         qp->s_flags &= ~(HFI1_S_WAIT_FENCE | HFI1_S_WAIT_RDMAR |
 907                          HFI1_S_WAIT_SSN_CREDIT | HFI1_S_WAIT_PSN |
 908                          HFI1_S_WAIT_ACK);
 909         if (wait)
 910                 qp->s_flags |= HFI1_S_SEND_ONE;
 911         reset_psn(qp, psn);
 912 }
 913
 914 /*
 915  * This is called from s_timer for missing responses.
 916  */
 917 static void rc_timeout(unsigned long arg)
 918 {
 919         struct hfi1_qp *qp = (struct hfi1_qp *)arg;
 920         struct hfi1_ibport *ibp;
 921         unsigned long flags;
 922
 923         spin_lock_irqsave(&qp->r_lock, flags);
 924         spin_lock(&qp->s_lock);
 925         if (qp->s_flags & HFI1_S_TIMER) {
 926                 ibp = to_iport(qp->ibqp.device, qp->port_num);
 927                 ibp->n_rc_timeouts++;
 928                 qp->s_flags &= ~HFI1_S_TIMER;
 929                 del_timer(&qp->s_timer);
 930                 restart_rc(qp, qp->s_last_psn + 1, 1);
 931                 hfi1_schedule_send(qp);
 932         }
 933         spin_unlock(&qp->s_lock);
 934         spin_unlock_irqrestore(&qp->r_lock, flags);
 935 }
 936
 937 /*
 938  * This is called from s_timer for RNR timeouts.
 939  */
 940 void hfi1_rc_rnr_retry(unsigned long arg)
 941 {
 942         struct hfi1_qp *qp = (struct hfi1_qp *)arg;
 943         unsigned long flags;
 944
 945         spin_lock_irqsave(&qp->s_lock, flags);
 946         if (qp->s_flags & HFI1_S_WAIT_RNR) {
 947                 qp->s_flags &= ~HFI1_S_WAIT_RNR;
 948                 del_timer(&qp->s_timer);
 949                 hfi1_schedule_send(qp);
 950         }
 951         spin_unlock_irqrestore(&qp->s_lock, flags);
 952 }
 953
 954 /*
 955  * Set qp->s_sending_psn to the next PSN after the given one.
 956  * This would be psn+1 except when RDMA reads are present.
 957  */
 958 static void reset_sending_psn(struct hfi1_qp *qp, u32 psn)
 959 {
 960         struct hfi1_swqe *wqe;
 961         u32 n = qp->s_last;
 962
 963         /* Find the work request corresponding to the given PSN. */
 964         for (;;) {
 965                 wqe = get_swqe_ptr(qp, n);
 966                 if (cmp_psn(psn, wqe->lpsn) <= 0) {
 967                         if (wqe->wr.opcode == IB_WR_RDMA_READ)
 968                                 qp->s_sending_psn = wqe->lpsn + 1;
 969                         else
 970                                 qp->s_sending_psn = psn + 1;
 971                         break;
 972                 }
 973                 if (++n == qp->s_size)
 974                         n = 0;
 975                 if (n == qp->s_tail)
 976                         break;
 977         }
 978 }
 979
 980 /*
 981  * This should be called with the QP s_lock held and interrupts disabled.
 982  */
 983 void hfi1_rc_send_complete(struct hfi1_qp *qp, struct hfi1_ib_header *hdr)
 984 {
 985         struct hfi1_other_headers *ohdr;
 986         struct hfi1_swqe *wqe;
 987         struct ib_wc wc;
 988         unsigned i;
 989         u32 opcode;
 990         u32 psn;
 991
 992         if (!(ib_hfi1_state_ops[qp->state] & HFI1_PROCESS_OR_FLUSH_SEND))
 993                 return;
 994
 995         /* Find out where the BTH is */
 996         if ((be16_to_cpu(hdr->lrh[0]) & 3) == HFI1_LRH_BTH)
 997                 ohdr = &hdr->u.oth;
 998         else
 999                 ohdr = &hdr->u.l.oth;
1000
1001         opcode = be32_to_cpu(ohdr->bth[0]) >> 24;
1002         if (opcode >= OP(RDMA_READ_RESPONSE_FIRST) &&
1003             opcode <= OP(ATOMIC_ACKNOWLEDGE)) {
1004                 WARN_ON(!qp->s_rdma_ack_cnt);
1005                 qp->s_rdma_ack_cnt--;
1006                 return;
1007         }
1008
1009         psn = be32_to_cpu(ohdr->bth[2]);
1010         reset_sending_psn(qp, psn);
1011
1012         /*
1013          * Start timer after a packet requesting an ACK has been sent and
1014          * there are still requests that haven't been acked.
1015          */
1016         if ((psn & IB_BTH_REQ_ACK) && qp->s_acked != qp->s_tail &&
1017             !(qp->s_flags &
1018                 (HFI1_S_TIMER | HFI1_S_WAIT_RNR | HFI1_S_WAIT_PSN)) &&
1019                 (ib_hfi1_state_ops[qp->state] & HFI1_PROCESS_RECV_OK))
1020                 start_timer(qp);
1021
1022         while (qp->s_last != qp->s_acked) {
1023                 wqe = get_swqe_ptr(qp, qp->s_last);
1024                 if (cmp_psn(wqe->lpsn, qp->s_sending_psn) >= 0 &&
1025                     cmp_psn(qp->s_sending_psn, qp->s_sending_hpsn) <= 0)
1026                         break;
1027                 for (i = 0; i < wqe->wr.num_sge; i++) {
1028                         struct hfi1_sge *sge = &wqe->sg_list[i];
1029
1030                         hfi1_put_mr(sge->mr);
1031                 }
1032                 /* Post a send completion queue entry if requested. */
1033                 if (!(qp->s_flags & HFI1_S_SIGNAL_REQ_WR) ||
1034                     (wqe->wr.send_flags & IB_SEND_SIGNALED)) {
1035                         memset(&wc, 0, sizeof(wc));
1036                         wc.wr_id = wqe->wr.wr_id;
1037                         wc.status = IB_WC_SUCCESS;
1038                         wc.opcode = ib_hfi1_wc_opcode[wqe->wr.opcode];
1039                         wc.byte_len = wqe->length;
1040                         wc.qp = &qp->ibqp;
1041                         hfi1_cq_enter(to_icq(qp->ibqp.send_cq), &wc, 0);
1042                 }
1043                 if (++qp->s_last >= qp->s_size)
1044                         qp->s_last = 0;
1045         }
1046         /*
1047          * If we were waiting for sends to complete before re-sending,
1048          * and they are now complete, restart sending.
1049          */
1050         trace_hfi1_rc_sendcomplete(qp, psn);
1051         if (qp->s_flags & HFI1_S_WAIT_PSN &&
1052             cmp_psn(qp->s_sending_psn, qp->s_sending_hpsn) > 0) {
1053                 qp->s_flags &= ~HFI1_S_WAIT_PSN;
1054                 qp->s_sending_psn = qp->s_psn;
1055                 qp->s_sending_hpsn = qp->s_psn - 1;
1056                 hfi1_schedule_send(qp);
1057         }
1058 }
1059
1060 static inline void update_last_psn(struct hfi1_qp *qp, u32 psn)
1061 {
1062         qp->s_last_psn = psn;
1063 }
1064
1065 /*
1066  * Generate a SWQE completion.
1067  * This is similar to hfi1_send_complete but has to check to be sure
1068  * that the SGEs are not being referenced if the SWQE is being resent.
1069  */
1070 static struct hfi1_swqe *do_rc_completion(struct hfi1_qp *qp,
1071                                           struct hfi1_swqe *wqe,
1072                                           struct hfi1_ibport *ibp)
1073 {
1074         struct ib_wc wc;
1075         unsigned i;
1076
1077         /*
1078          * Don't decrement refcount and don't generate a
1079          * completion if the SWQE is being resent until the send
1080          * is finished.
1081          */
1082         if (cmp_psn(wqe->lpsn, qp->s_sending_psn) < 0 ||
1083             cmp_psn(qp->s_sending_psn, qp->s_sending_hpsn) > 0) {
1084                 for (i = 0; i < wqe->wr.num_sge; i++) {
1085                         struct hfi1_sge *sge = &wqe->sg_list[i];
1086
1087                         hfi1_put_mr(sge->mr);
1088                 }
1089                 /* Post a send completion queue entry if requested. */
1090                 if (!(qp->s_flags & HFI1_S_SIGNAL_REQ_WR) ||
1091                     (wqe->wr.send_flags & IB_SEND_SIGNALED)) {
1092                         memset(&wc, 0, sizeof(wc));
1093                         wc.wr_id = wqe->wr.wr_id;
1094                         wc.status = IB_WC_SUCCESS;
1095                         wc.opcode = ib_hfi1_wc_opcode[wqe->wr.opcode];
1096                         wc.byte_len = wqe->length;
1097                         wc.qp = &qp->ibqp;
1098                         hfi1_cq_enter(to_icq(qp->ibqp.send_cq), &wc, 0);
1099                 }
1100                 if (++qp->s_last >= qp->s_size)
1101                         qp->s_last = 0;
1102         } else {
1103                 struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
1104
1105                 this_cpu_inc(*ibp->rc_delayed_comp);
1106                 /*
1107                  * If send progress not running attempt to progress
1108                  * SDMA queue.
1109                  */
1110                 if (ppd->dd->flags & HFI1_HAS_SEND_DMA) {
1111                         struct sdma_engine *engine;
1112                         u8 sc5;
1113
1114                         /* For now use sc to find engine */
1115                         sc5 = ibp->sl_to_sc[qp->remote_ah_attr.sl];
1116                         engine = qp_to_sdma_engine(qp, sc5);
1117                         sdma_engine_progress_schedule(engine);
1118                 }
1119         }
1120
1121         qp->s_retry = qp->s_retry_cnt;
1122         update_last_psn(qp, wqe->lpsn);
1123
1124         /*
1125          * If we are completing a request which is in the process of
1126          * being resent, we can stop re-sending it since we know the
1127          * responder has already seen it.
1128          */
1129         if (qp->s_acked == qp->s_cur) {
1130                 if (++qp->s_cur >= qp->s_size)
1131                         qp->s_cur = 0;
1132                 qp->s_acked = qp->s_cur;
1133                 wqe = get_swqe_ptr(qp, qp->s_cur);
1134                 if (qp->s_acked != qp->s_tail) {
1135                         qp->s_state = OP(SEND_LAST);
1136                         qp->s_psn = wqe->psn;
1137                 }
1138         } else {
1139                 if (++qp->s_acked >= qp->s_size)
1140                         qp->s_acked = 0;
1141                 if (qp->state == IB_QPS_SQD && qp->s_acked == qp->s_cur)
1142                         qp->s_draining = 0;
1143                 wqe = get_swqe_ptr(qp, qp->s_acked);
1144         }
1145         return wqe;
1146 }
1147
1148 /**
1149  * do_rc_ack - process an incoming RC ACK
1150  * @qp: the QP the ACK came in on
1151  * @psn: the packet sequence number of the ACK
1152  * @opcode: the opcode of the request that resulted in the ACK
1153  *
1154  * This is called from rc_rcv_resp() to process an incoming RC ACK
1155  * for the given QP.
1156  * May be called at interrupt level, with the QP s_lock held.
1157  * Returns 1 if OK, 0 if current operation should be aborted (NAK).
1158  */
1159 static int do_rc_ack(struct hfi1_qp *qp, u32 aeth, u32 psn, int opcode,
1160                      u64 val, struct hfi1_ctxtdata *rcd)
1161 {
1162         struct hfi1_ibport *ibp;
1163         enum ib_wc_status status;
1164         struct hfi1_swqe *wqe;
1165         int ret = 0;
1166         u32 ack_psn;
1167         int diff;
1168
1169         /* Remove QP from retry timer */
1170         if (qp->s_flags & (HFI1_S_TIMER | HFI1_S_WAIT_RNR)) {
1171                 qp->s_flags &= ~(HFI1_S_TIMER | HFI1_S_WAIT_RNR);
1172                 del_timer(&qp->s_timer);
1173         }
1174
1175         /*
1176          * Note that NAKs implicitly ACK outstanding SEND and RDMA write
1177          * requests and implicitly NAK RDMA read and atomic requests issued
1178          * before the NAK'ed request.  The MSN won't include the NAK'ed
1179          * request but will include an ACK'ed request(s).
1180          */
1181         ack_psn = psn;
1182         if (aeth >> 29)
1183                 ack_psn--;
1184         wqe = get_swqe_ptr(qp, qp->s_acked);
1185         ibp = to_iport(qp->ibqp.device, qp->port_num);
1186
1187         /*
1188          * The MSN might be for a later WQE than the PSN indicates so
1189          * only complete WQEs that the PSN finishes.
1190          */
1191         while ((diff = delta_psn(ack_psn, wqe->lpsn)) >= 0) {
1192                 /*
1193                  * RDMA_READ_RESPONSE_ONLY is a special case since
1194                  * we want to generate completion events for everything
1195                  * before the RDMA read, copy the data, then generate
1196                  * the completion for the read.
1197                  */
1198                 if (wqe->wr.opcode == IB_WR_RDMA_READ &&
1199                     opcode == OP(RDMA_READ_RESPONSE_ONLY) &&
1200                     diff == 0) {
1201                         ret = 1;
1202                         goto bail;
1203                 }
1204                 /*
1205                  * If this request is a RDMA read or atomic, and the ACK is
1206                  * for a later operation, this ACK NAKs the RDMA read or
1207                  * atomic.  In other words, only a RDMA_READ_LAST or ONLY
1208                  * can ACK a RDMA read and likewise for atomic ops.  Note
1209                  * that the NAK case can only happen if relaxed ordering is
1210                  * used and requests are sent after an RDMA read or atomic
1211                  * is sent but before the response is received.
1212                  */
1213                 if ((wqe->wr.opcode == IB_WR_RDMA_READ &&
1214                      (opcode != OP(RDMA_READ_RESPONSE_LAST) || diff != 0)) ||
1215                     ((wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
1216                       wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD) &&
1217                      (opcode != OP(ATOMIC_ACKNOWLEDGE) || diff != 0))) {
1218                         /* Retry this request. */
1219                         if (!(qp->r_flags & HFI1_R_RDMAR_SEQ)) {
1220                                 qp->r_flags |= HFI1_R_RDMAR_SEQ;
1221                                 restart_rc(qp, qp->s_last_psn + 1, 0);
1222                                 if (list_empty(&qp->rspwait)) {
1223                                         qp->r_flags |= HFI1_R_RSP_SEND;
1224                                         atomic_inc(&qp->refcount);
1225                                         list_add_tail(&qp->rspwait,
1226                                                       &rcd->qp_wait_list);
1227                                 }
1228                         }
1229                         /*
1230                          * No need to process the ACK/NAK since we are
1231                          * restarting an earlier request.
1232                          */
1233                         goto bail;
1234                 }
1235                 if (wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
1236                     wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD) {
1237                         u64 *vaddr = wqe->sg_list[0].vaddr;
1238                         *vaddr = val;
1239                 }
1240                 if (qp->s_num_rd_atomic &&
1241                     (wqe->wr.opcode == IB_WR_RDMA_READ ||
1242                      wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
1243                      wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD)) {
1244                         qp->s_num_rd_atomic--;
1245                         /* Restart sending task if fence is complete */
1246                         if ((qp->s_flags & HFI1_S_WAIT_FENCE) &&
1247                             !qp->s_num_rd_atomic) {
1248                                 qp->s_flags &= ~(HFI1_S_WAIT_FENCE |
1249                                                  HFI1_S_WAIT_ACK);
1250                                 hfi1_schedule_send(qp);
1251                         } else if (qp->s_flags & HFI1_S_WAIT_RDMAR) {
1252                                 qp->s_flags &= ~(HFI1_S_WAIT_RDMAR |
1253                                                  HFI1_S_WAIT_ACK);
1254                                 hfi1_schedule_send(qp);
1255                         }
1256                 }
1257                 wqe = do_rc_completion(qp, wqe, ibp);
1258                 if (qp->s_acked == qp->s_tail)
1259                         break;
1260         }
1261
1262         switch (aeth >> 29) {
1263         case 0:         /* ACK */
1264                 this_cpu_inc(*ibp->rc_acks);
1265                 if (qp->s_acked != qp->s_tail) {
1266                         /*
1267                          * We are expecting more ACKs so
1268                          * reset the re-transmit timer.
1269                          */
1270                         start_timer(qp);
1271                         /*
1272                          * We can stop re-sending the earlier packets and
1273                          * continue with the next packet the receiver wants.
1274                          */
1275                         if (cmp_psn(qp->s_psn, psn) <= 0)
1276                                 reset_psn(qp, psn + 1);
1277                 } else if (cmp_psn(qp->s_psn, psn) <= 0) {
1278                         qp->s_state = OP(SEND_LAST);
1279                         qp->s_psn = psn + 1;
1280                 }
1281                 if (qp->s_flags & HFI1_S_WAIT_ACK) {
1282                         qp->s_flags &= ~HFI1_S_WAIT_ACK;
1283                         hfi1_schedule_send(qp);
1284                 }
1285                 hfi1_get_credit(qp, aeth);
1286                 qp->s_rnr_retry = qp->s_rnr_retry_cnt;
1287                 qp->s_retry = qp->s_retry_cnt;
1288                 update_last_psn(qp, psn);
1289                 ret = 1;
1290                 goto bail;
1291
1292         case 1:         /* RNR NAK */
1293                 ibp->n_rnr_naks++;
1294                 if (qp->s_acked == qp->s_tail)
1295                         goto bail;
1296                 if (qp->s_flags & HFI1_S_WAIT_RNR)
1297                         goto bail;
1298                 if (qp->s_rnr_retry == 0) {
1299                         status = IB_WC_RNR_RETRY_EXC_ERR;
1300                         goto class_b;
1301                 }
1302                 if (qp->s_rnr_retry_cnt < 7)
1303                         qp->s_rnr_retry--;
1304
1305                 /* The last valid PSN is the previous PSN. */
1306                 update_last_psn(qp, psn - 1);
1307
1308                 ibp->n_rc_resends += delta_psn(qp->s_psn, psn);
1309
1310                 reset_psn(qp, psn);
1311
1312                 qp->s_flags &= ~(HFI1_S_WAIT_SSN_CREDIT | HFI1_S_WAIT_ACK);
1313                 qp->s_flags |= HFI1_S_WAIT_RNR;
1314                 qp->s_timer.function = hfi1_rc_rnr_retry;
1315                 qp->s_timer.expires = jiffies + usecs_to_jiffies(
1316                         ib_hfi1_rnr_table[(aeth >> HFI1_AETH_CREDIT_SHIFT) &
1317                                            HFI1_AETH_CREDIT_MASK]);
1318                 add_timer(&qp->s_timer);
1319                 goto bail;
1320
1321         case 3:         /* NAK */
1322                 if (qp->s_acked == qp->s_tail)
1323                         goto bail;
1324                 /* The last valid PSN is the previous PSN. */
1325                 update_last_psn(qp, psn - 1);
1326                 switch ((aeth >> HFI1_AETH_CREDIT_SHIFT) &
1327                         HFI1_AETH_CREDIT_MASK) {
1328                 case 0: /* PSN sequence error */
1329                         ibp->n_seq_naks++;
1330                         /*
1331                          * Back up to the responder's expected PSN.
1332                          * Note that we might get a NAK in the middle of an
1333                          * RDMA READ response which terminates the RDMA
1334                          * READ.
1335                          */
1336                         restart_rc(qp, psn, 0);
1337                         hfi1_schedule_send(qp);
1338                         break;
1339
1340                 case 1: /* Invalid Request */
1341                         status = IB_WC_REM_INV_REQ_ERR;
1342                         ibp->n_other_naks++;
1343                         goto class_b;
1344
1345                 case 2: /* Remote Access Error */
1346                         status = IB_WC_REM_ACCESS_ERR;
1347                         ibp->n_other_naks++;
1348                         goto class_b;
1349
1350                 case 3: /* Remote Operation Error */
1351                         status = IB_WC_REM_OP_ERR;
1352                         ibp->n_other_naks++;
1353 class_b:
1354                         if (qp->s_last == qp->s_acked) {
1355                                 hfi1_send_complete(qp, wqe, status);
1356                                 hfi1_error_qp(qp, IB_WC_WR_FLUSH_ERR);
1357                         }
1358                         break;
1359
1360                 default:
1361                         /* Ignore other reserved NAK error codes */
1362                         goto reserved;
1363                 }
1364                 qp->s_retry = qp->s_retry_cnt;
1365                 qp->s_rnr_retry = qp->s_rnr_retry_cnt;
1366                 goto bail;
1367
1368         default:                /* 2: reserved */
1369 reserved:
1370                 /* Ignore reserved NAK codes. */
1371                 goto bail;
1372         }
1373
1374 bail:
1375         return ret;
1376 }
1377
1378 /*
1379  * We have seen an out of sequence RDMA read middle or last packet.
1380  * This ACKs SENDs and RDMA writes up to the first RDMA read or atomic SWQE.
1381  */
1382 static void rdma_seq_err(struct hfi1_qp *qp, struct hfi1_ibport *ibp, u32 psn,
1383                          struct hfi1_ctxtdata *rcd)
1384 {
1385         struct hfi1_swqe *wqe;
1386
1387         /* Remove QP from retry timer */
1388         if (qp->s_flags & (HFI1_S_TIMER | HFI1_S_WAIT_RNR)) {
1389                 qp->s_flags &= ~(HFI1_S_TIMER | HFI1_S_WAIT_RNR);
1390                 del_timer(&qp->s_timer);
1391         }
1392
1393         wqe = get_swqe_ptr(qp, qp->s_acked);
1394
1395         while (cmp_psn(psn, wqe->lpsn) > 0) {
1396                 if (wqe->wr.opcode == IB_WR_RDMA_READ ||
1397                     wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
1398                     wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD)
1399                         break;
1400                 wqe = do_rc_completion(qp, wqe, ibp);
1401         }
1402
1403         ibp->n_rdma_seq++;
1404         qp->r_flags |= HFI1_R_RDMAR_SEQ;
1405         restart_rc(qp, qp->s_last_psn + 1, 0);
1406         if (list_empty(&qp->rspwait)) {
1407                 qp->r_flags |= HFI1_R_RSP_SEND;
1408                 atomic_inc(&qp->refcount);
1409                 list_add_tail(&qp->rspwait, &rcd->qp_wait_list);
1410         }
1411 }
1412
1413 /**
1414  * rc_rcv_resp - process an incoming RC response packet
1415  * @ibp: the port this packet came in on
1416  * @ohdr: the other headers for this packet
1417  * @data: the packet data
1418  * @tlen: the packet length
1419  * @qp: the QP for this packet
1420  * @opcode: the opcode for this packet
1421  * @psn: the packet sequence number for this packet
1422  * @hdrsize: the header length
1423  * @pmtu: the path MTU
1424  *
1425  * This is called from hfi1_rc_rcv() to process an incoming RC response
1426  * packet for the given QP.
1427  * Called at interrupt level.
1428  */
1429 static void rc_rcv_resp(struct hfi1_ibport *ibp,
1430                         struct hfi1_other_headers *ohdr,
1431                         void *data, u32 tlen, struct hfi1_qp *qp,
1432                         u32 opcode, u32 psn, u32 hdrsize, u32 pmtu,
1433                         struct hfi1_ctxtdata *rcd)
1434 {
1435         struct hfi1_swqe *wqe;
1436         enum ib_wc_status status;
1437         unsigned long flags;
1438         int diff;
1439         u32 pad;
1440         u32 aeth;
1441         u64 val;
1442
1443         spin_lock_irqsave(&qp->s_lock, flags);
1444
1445         /* Ignore invalid responses. */
1446         if (cmp_psn(psn, qp->s_next_psn) >= 0)
1447                 goto ack_done;
1448
1449         /* Ignore duplicate responses. */
1450         diff = cmp_psn(psn, qp->s_last_psn);
1451         if (unlikely(diff <= 0)) {
1452                 /* Update credits for "ghost" ACKs */
1453                 if (diff == 0 && opcode == OP(ACKNOWLEDGE)) {
1454                         aeth = be32_to_cpu(ohdr->u.aeth);
1455                         if ((aeth >> 29) == 0)
1456                                 hfi1_get_credit(qp, aeth);
1457                 }
1458                 goto ack_done;
1459         }
1460
1461         /*
1462          * Skip everything other than the PSN we expect, if we are waiting
1463          * for a reply to a restarted RDMA read or atomic op.
1464          */
1465         if (qp->r_flags & HFI1_R_RDMAR_SEQ) {
1466                 if (cmp_psn(psn, qp->s_last_psn + 1) != 0)
1467                         goto ack_done;
1468                 qp->r_flags &= ~HFI1_R_RDMAR_SEQ;
1469         }
1470
1471         if (unlikely(qp->s_acked == qp->s_tail))
1472                 goto ack_done;
1473         wqe = get_swqe_ptr(qp, qp->s_acked);
1474         status = IB_WC_SUCCESS;
1475
1476         switch (opcode) {
1477         case OP(ACKNOWLEDGE):
1478         case OP(ATOMIC_ACKNOWLEDGE):
1479         case OP(RDMA_READ_RESPONSE_FIRST):
1480                 aeth = be32_to_cpu(ohdr->u.aeth);
1481                 if (opcode == OP(ATOMIC_ACKNOWLEDGE)) {
1482                         __be32 *p = ohdr->u.at.atomic_ack_eth;
1483
1484                         val = ((u64) be32_to_cpu(p[0]) << 32) |
1485                                 be32_to_cpu(p[1]);
1486                 } else
1487                         val = 0;
1488                 if (!do_rc_ack(qp, aeth, psn, opcode, val, rcd) ||
1489                     opcode != OP(RDMA_READ_RESPONSE_FIRST))
1490                         goto ack_done;
1491                 wqe = get_swqe_ptr(qp, qp->s_acked);
1492                 if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
1493                         goto ack_op_err;
1494                 /*
1495                  * If this is a response to a resent RDMA read, we
1496                  * have to be careful to copy the data to the right
1497                  * location.
1498                  */
1499                 qp->s_rdma_read_len = restart_sge(&qp->s_rdma_read_sge,
1500                                                   wqe, psn, pmtu);
1501                 goto read_middle;
1502
1503         case OP(RDMA_READ_RESPONSE_MIDDLE):
1504                 /* no AETH, no ACK */
1505                 if (unlikely(cmp_psn(psn, qp->s_last_psn + 1)))
1506                         goto ack_seq_err;
1507                 if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
1508                         goto ack_op_err;
1509 read_middle:
1510                 if (unlikely(tlen != (hdrsize + pmtu + 4)))
1511                         goto ack_len_err;
1512                 if (unlikely(pmtu >= qp->s_rdma_read_len))
1513                         goto ack_len_err;
1514
1515                 /*
1516                  * We got a response so update the timeout.
1517                  * 4.096 usec. * (1 << qp->timeout)
1518                  */
1519                 qp->s_flags |= HFI1_S_TIMER;
1520                 mod_timer(&qp->s_timer, jiffies + qp->timeout_jiffies);
1521                 if (qp->s_flags & HFI1_S_WAIT_ACK) {
1522                         qp->s_flags &= ~HFI1_S_WAIT_ACK;
1523                         hfi1_schedule_send(qp);
1524                 }
1525
1526                 if (opcode == OP(RDMA_READ_RESPONSE_MIDDLE))
1527                         qp->s_retry = qp->s_retry_cnt;
1528
1529                 /*
1530                  * Update the RDMA receive state but do the copy w/o
1531                  * holding the locks and blocking interrupts.
1532                  */
1533                 qp->s_rdma_read_len -= pmtu;
1534                 update_last_psn(qp, psn);
1535                 spin_unlock_irqrestore(&qp->s_lock, flags);
1536                 hfi1_copy_sge(&qp->s_rdma_read_sge, data, pmtu, 0);
1537                 goto bail;
1538
1539         case OP(RDMA_READ_RESPONSE_ONLY):
1540                 aeth = be32_to_cpu(ohdr->u.aeth);
1541                 if (!do_rc_ack(qp, aeth, psn, opcode, 0, rcd))
1542                         goto ack_done;
1543                 /* Get the number of bytes the message was padded by. */
1544                 pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3;
1545                 /*
1546                  * Check that the data size is >= 0 && <= pmtu.
1547                  * Remember to account for ICRC (4).
1548                  */
1549                 if (unlikely(tlen < (hdrsize + pad + 4)))
1550                         goto ack_len_err;
1551                 /*
1552                  * If this is a response to a resent RDMA read, we
1553                  * have to be careful to copy the data to the right
1554                  * location.
1555                  */
1556                 wqe = get_swqe_ptr(qp, qp->s_acked);
1557                 qp->s_rdma_read_len = restart_sge(&qp->s_rdma_read_sge,
1558                                                   wqe, psn, pmtu);
1559                 goto read_last;
1560
1561         case OP(RDMA_READ_RESPONSE_LAST):
1562                 /* ACKs READ req. */
1563                 if (unlikely(cmp_psn(psn, qp->s_last_psn + 1)))
1564                         goto ack_seq_err;
1565                 if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
1566                         goto ack_op_err;
1567                 /* Get the number of bytes the message was padded by. */
1568                 pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3;
1569                 /*
1570                  * Check that the data size is >= 1 && <= pmtu.
1571                  * Remember to account for ICRC (4).
1572                  */
1573                 if (unlikely(tlen <= (hdrsize + pad + 4)))
1574                         goto ack_len_err;
1575 read_last:
1576                 tlen -= hdrsize + pad + 4;
1577                 if (unlikely(tlen != qp->s_rdma_read_len))
1578                         goto ack_len_err;
1579                 aeth = be32_to_cpu(ohdr->u.aeth);
1580                 hfi1_copy_sge(&qp->s_rdma_read_sge, data, tlen, 0);
1581                 WARN_ON(qp->s_rdma_read_sge.num_sge);
1582                 (void) do_rc_ack(qp, aeth, psn,
1583                                  OP(RDMA_READ_RESPONSE_LAST), 0, rcd);
1584                 goto ack_done;
1585         }
1586
1587 ack_op_err:
1588         status = IB_WC_LOC_QP_OP_ERR;
1589         goto ack_err;
1590
1591 ack_seq_err:
1592         rdma_seq_err(qp, ibp, psn, rcd);
1593         goto ack_done;
1594
1595 ack_len_err:
1596         status = IB_WC_LOC_LEN_ERR;
1597 ack_err:
1598         if (qp->s_last == qp->s_acked) {
1599                 hfi1_send_complete(qp, wqe, status);
1600                 hfi1_error_qp(qp, IB_WC_WR_FLUSH_ERR);
1601         }
1602 ack_done:
1603         spin_unlock_irqrestore(&qp->s_lock, flags);
1604 bail:
1605         return;
1606 }
1607
1608 /**
1609  * rc_rcv_error - process an incoming duplicate or error RC packet
1610  * @ohdr: the other headers for this packet
1611  * @data: the packet data
1612  * @qp: the QP for this packet
1613  * @opcode: the opcode for this packet
1614  * @psn: the packet sequence number for this packet
1615  * @diff: the difference between the PSN and the expected PSN
1616  *
1617  * This is called from hfi1_rc_rcv() to process an unexpected
1618  * incoming RC packet for the given QP.
1619  * Called at interrupt level.
1620  * Return 1 if no more processing is needed; otherwise return 0 to
1621  * schedule a response to be sent.
1622  */
1623 static noinline int rc_rcv_error(struct hfi1_other_headers *ohdr, void *data,
1624                         struct hfi1_qp *qp, u32 opcode, u32 psn, int diff,
1625                         struct hfi1_ctxtdata *rcd)
1626 {
1627         struct hfi1_ibport *ibp = to_iport(qp->ibqp.device, qp->port_num);
1628         struct hfi1_ack_entry *e;
1629         unsigned long flags;
1630         u8 i, prev;
1631         int old_req;
1632
1633         if (diff > 0) {
1634                 /*
1635                  * Packet sequence error.
1636                  * A NAK will ACK earlier sends and RDMA writes.
1637                  * Don't queue the NAK if we already sent one.
1638                  */
1639                 if (!qp->r_nak_state) {
1640                         ibp->n_rc_seqnak++;
1641                         qp->r_nak_state = IB_NAK_PSN_ERROR;
1642                         /* Use the expected PSN. */
1643                         qp->r_ack_psn = qp->r_psn;
1644                         /*
1645                          * Wait to send the sequence NAK until all packets
1646                          * in the receive queue have been processed.
1647                          * Otherwise, we end up propagating congestion.
1648                          */
1649                         if (list_empty(&qp->rspwait)) {
1650                                 qp->r_flags |= HFI1_R_RSP_NAK;
1651                                 atomic_inc(&qp->refcount);
1652                                 list_add_tail(&qp->rspwait, &rcd->qp_wait_list);
1653                         }
1654                 }
1655                 goto done;
1656         }
1657
1658         /*
1659          * Handle a duplicate request.  Don't re-execute SEND, RDMA
1660          * write or atomic op.  Don't NAK errors, just silently drop
1661          * the duplicate request.  Note that r_sge, r_len, and
1662          * r_rcv_len may be in use so don't modify them.
1663          *
1664          * We are supposed to ACK the earliest duplicate PSN but we
1665          * can coalesce an outstanding duplicate ACK.  We have to
1666          * send the earliest so that RDMA reads can be restarted at
1667          * the requester's expected PSN.
1668          *
1669          * First, find where this duplicate PSN falls within the
1670          * ACKs previously sent.
1671          * old_req is true if there is an older response that is scheduled
1672          * to be sent before sending this one.
1673          */
1674         e = NULL;
1675         old_req = 1;
1676         ibp->n_rc_dupreq++;
1677
1678         spin_lock_irqsave(&qp->s_lock, flags);
1679
1680         for (i = qp->r_head_ack_queue; ; i = prev) {
1681                 if (i == qp->s_tail_ack_queue)
1682                         old_req = 0;
1683                 if (i)
1684                         prev = i - 1;
1685                 else
1686                         prev = HFI1_MAX_RDMA_ATOMIC;
1687                 if (prev == qp->r_head_ack_queue) {
1688                         e = NULL;
1689                         break;
1690                 }
1691                 e = &qp->s_ack_queue[prev];
1692                 if (!e->opcode) {
1693                         e = NULL;
1694                         break;
1695                 }
1696                 if (cmp_psn(psn, e->psn) >= 0) {
1697                         if (prev == qp->s_tail_ack_queue &&
1698                             cmp_psn(psn, e->lpsn) <= 0)
1699                                 old_req = 0;
1700                         break;
1701                 }
1702         }
1703         switch (opcode) {
1704         case OP(RDMA_READ_REQUEST): {
1705                 struct ib_reth *reth;
1706                 u32 offset;
1707                 u32 len;
1708
1709                 /*
1710                  * If we didn't find the RDMA read request in the ack queue,
1711                  * we can ignore this request.
1712                  */
1713                 if (!e || e->opcode != OP(RDMA_READ_REQUEST))
1714                         goto unlock_done;
1715                 /* RETH comes after BTH */
1716                 reth = &ohdr->u.rc.reth;
1717                 /*
1718                  * Address range must be a subset of the original
1719                  * request and start on pmtu boundaries.
1720                  * We reuse the old ack_queue slot since the requester
1721                  * should not back up and request an earlier PSN for the
1722                  * same request.
1723                  */
1724                 offset = delta_psn(psn, e->psn) * qp->pmtu;
1725                 len = be32_to_cpu(reth->length);
1726                 if (unlikely(offset + len != e->rdma_sge.sge_length))
1727                         goto unlock_done;
1728                 if (e->rdma_sge.mr) {
1729                         hfi1_put_mr(e->rdma_sge.mr);
1730                         e->rdma_sge.mr = NULL;
1731                 }
1732                 if (len != 0) {
1733                         u32 rkey = be32_to_cpu(reth->rkey);
1734                         u64 vaddr = be64_to_cpu(reth->vaddr);
1735                         int ok;
1736
1737                         ok = hfi1_rkey_ok(qp, &e->rdma_sge, len, vaddr, rkey,
1738                                           IB_ACCESS_REMOTE_READ);
1739                         if (unlikely(!ok))
1740                                 goto unlock_done;
1741                 } else {
1742                         e->rdma_sge.vaddr = NULL;
1743                         e->rdma_sge.length = 0;
1744                         e->rdma_sge.sge_length = 0;
1745                 }
1746                 e->psn = psn;
1747                 if (old_req)
1748                         goto unlock_done;
1749                 qp->s_tail_ack_queue = prev;
1750                 break;
1751         }
1752
1753         case OP(COMPARE_SWAP):
1754         case OP(FETCH_ADD): {
1755                 /*
1756                  * If we didn't find the atomic request in the ack queue
1757                  * or the send tasklet is already backed up to send an
1758                  * earlier entry, we can ignore this request.
1759                  */
1760                 if (!e || e->opcode != (u8) opcode || old_req)
1761                         goto unlock_done;
1762                 qp->s_tail_ack_queue = prev;
1763                 break;
1764         }
1765
1766         default:
1767                 /*
1768                  * Ignore this operation if it doesn't request an ACK
1769                  * or an earlier RDMA read or atomic is going to be resent.
1770                  */
1771                 if (!(psn & IB_BTH_REQ_ACK) || old_req)
1772                         goto unlock_done;
1773                 /*
1774                  * Resend the most recent ACK if this request is
1775                  * after all the previous RDMA reads and atomics.
1776                  */
1777                 if (i == qp->r_head_ack_queue) {
1778                         spin_unlock_irqrestore(&qp->s_lock, flags);
1779                         qp->r_nak_state = 0;
1780                         qp->r_ack_psn = qp->r_psn - 1;
1781                         goto send_ack;
1782                 }
1783
1784                 /*
1785                  * Resend the RDMA read or atomic op which
1786                  * ACKs this duplicate request.
1787                  */
1788                 qp->s_tail_ack_queue = i;
1789                 break;
1790         }
1791         qp->s_ack_state = OP(ACKNOWLEDGE);
1792         qp->s_flags |= HFI1_S_RESP_PENDING;
1793         qp->r_nak_state = 0;
1794         hfi1_schedule_send(qp);
1795
1796 unlock_done:
1797         spin_unlock_irqrestore(&qp->s_lock, flags);
1798 done:
1799         return 1;
1800
1801 send_ack:
1802         return 0;
1803 }
1804
1805 void hfi1_rc_error(struct hfi1_qp *qp, enum ib_wc_status err)
1806 {
1807         unsigned long flags;
1808         int lastwqe;
1809
1810         spin_lock_irqsave(&qp->s_lock, flags);
1811         lastwqe = hfi1_error_qp(qp, err);
1812         spin_unlock_irqrestore(&qp->s_lock, flags);
1813
1814         if (lastwqe) {
1815                 struct ib_event ev;
1816
1817                 ev.device = qp->ibqp.device;
1818                 ev.element.qp = &qp->ibqp;
1819                 ev.event = IB_EVENT_QP_LAST_WQE_REACHED;
1820                 qp->ibqp.event_handler(&ev, qp->ibqp.qp_context);
1821         }
1822 }
1823
1824 static inline void update_ack_queue(struct hfi1_qp *qp, unsigned n)
1825 {
1826         unsigned next;
1827
1828         next = n + 1;
1829         if (next > HFI1_MAX_RDMA_ATOMIC)
1830                 next = 0;
1831         qp->s_tail_ack_queue = next;
1832         qp->s_ack_state = OP(ACKNOWLEDGE);
1833 }
1834
1835 static void log_cca_event(struct hfi1_pportdata *ppd, u8 sl, u32 rlid,
1836                           u32 lqpn, u32 rqpn, u8 svc_type)
1837 {
1838         struct opa_hfi1_cong_log_event_internal *cc_event;
1839         unsigned long flags;
1840
1841         if (sl >= OPA_MAX_SLS)
1842                 return;
1843
1844         spin_lock_irqsave(&ppd->cc_log_lock, flags);
1845
1846         ppd->threshold_cong_event_map[sl/8] |= 1 << (sl % 8);
1847         ppd->threshold_event_counter++;
1848
1849         cc_event = &ppd->cc_events[ppd->cc_log_idx++];
1850         if (ppd->cc_log_idx == OPA_CONG_LOG_ELEMS)
1851                 ppd->cc_log_idx = 0;
1852         cc_event->lqpn = lqpn & HFI1_QPN_MASK;
1853         cc_event->rqpn = rqpn & HFI1_QPN_MASK;
1854         cc_event->sl = sl;
1855         cc_event->svc_type = svc_type;
1856         cc_event->rlid = rlid;
1857         /* keep timestamp in units of 1.024 usec */
1858         cc_event->timestamp = ktime_to_ns(ktime_get()) / 1024;
1859
1860         spin_unlock_irqrestore(&ppd->cc_log_lock, flags);
1861 }
1862
1863 void process_becn(struct hfi1_pportdata *ppd, u8 sl, u16 rlid, u32 lqpn,
1864                   u32 rqpn, u8 svc_type)
1865 {
1866         struct cca_timer *cca_timer;
1867         u16 ccti, ccti_incr, ccti_timer, ccti_limit;
1868         u8 trigger_threshold;
1869         struct cc_state *cc_state;
1870         unsigned long flags;
1871
1872         if (sl >= OPA_MAX_SLS)
1873                 return;
1874
1875         cca_timer = &ppd->cca_timer[sl];
1876
1877         cc_state = get_cc_state(ppd);
1878
1879         if (cc_state == NULL)
1880                 return;
1881
1882         /*
1883          * 1) increase CCTI (for this SL)
1884          * 2) select IPG (i.e., call set_link_ipg())
1885          * 3) start timer
1886          */
1887         ccti_limit = cc_state->cct.ccti_limit;
1888         ccti_incr = cc_state->cong_setting.entries[sl].ccti_increase;
1889         ccti_timer = cc_state->cong_setting.entries[sl].ccti_timer;
1890         trigger_threshold =
1891                 cc_state->cong_setting.entries[sl].trigger_threshold;
1892
1893         spin_lock_irqsave(&ppd->cca_timer_lock, flags);
1894
1895         if (cca_timer->ccti < ccti_limit) {
1896                 if (cca_timer->ccti + ccti_incr <= ccti_limit)
1897                         cca_timer->ccti += ccti_incr;
1898                 else
1899                         cca_timer->ccti = ccti_limit;
1900                 set_link_ipg(ppd);
1901         }
1902
1903         spin_unlock_irqrestore(&ppd->cca_timer_lock, flags);
1904
1905         ccti = cca_timer->ccti;
1906
1907         if (!hrtimer_active(&cca_timer->hrtimer)) {
1908                 /* ccti_timer is in units of 1.024 usec */
1909                 unsigned long nsec = 1024 * ccti_timer;
1910
1911                 hrtimer_start(&cca_timer->hrtimer, ns_to_ktime(nsec),
1912                               HRTIMER_MODE_REL);
1913         }
1914
1915         if ((trigger_threshold != 0) && (ccti >= trigger_threshold))
1916                 log_cca_event(ppd, sl, rlid, lqpn, rqpn, svc_type);
1917 }
1918
1919 /**
1920  * hfi1_rc_rcv - process an incoming RC packet
1921  * @rcd: the context pointer
1922  * @hdr: the header of this packet
1923  * @rcv_flags: flags relevant to rcv processing
1924  * @data: the packet data
1925  * @tlen: the packet length
1926  * @qp: the QP for this packet
1927  *
1928  * This is called from qp_rcv() to process an incoming RC packet
1929  * for the given QP.
1930  * May be called at interrupt level.
1931  */
1932 void hfi1_rc_rcv(struct hfi1_packet *packet)
1933 {
1934         struct hfi1_ctxtdata *rcd = packet->rcd;
1935         struct hfi1_ib_header *hdr = packet->hdr;
1936         u32 rcv_flags = packet->rcv_flags;
1937         void *data = packet->ebuf;
1938         u32 tlen = packet->tlen;
1939         struct hfi1_qp *qp = packet->qp;
1940         struct hfi1_ibport *ibp = to_iport(qp->ibqp.device, qp->port_num);
1941         struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
1942         struct hfi1_other_headers *ohdr = packet->ohdr;
1943         u32 bth0, opcode;
1944         u32 hdrsize = packet->hlen;
1945         u32 psn;
1946         u32 pad;
1947         struct ib_wc wc;
1948         u32 pmtu = qp->pmtu;
1949         int diff;
1950         struct ib_reth *reth;
1951         unsigned long flags;
1952         u32 bth1;
1953         int ret, is_fecn = 0;
1954
1955         bth0 = be32_to_cpu(ohdr->bth[0]);
1956         if (hfi1_ruc_check_hdr(ibp, hdr, rcv_flags & HFI1_HAS_GRH, qp, bth0))
1957                 return;
1958
1959         bth1 = be32_to_cpu(ohdr->bth[1]);
1960         if (unlikely(bth1 & (HFI1_BECN_SMASK | HFI1_FECN_SMASK))) {
1961                 if (bth1 & HFI1_BECN_SMASK) {
1962                         u16 rlid = qp->remote_ah_attr.dlid;
1963                         u32 lqpn, rqpn;
1964
1965                         lqpn = qp->ibqp.qp_num;
1966                         rqpn = qp->remote_qpn;
1967                         process_becn(
1968                                 ppd,
1969                                 qp->remote_ah_attr.sl,
1970                                 rlid, lqpn, rqpn,
1971                                 IB_CC_SVCTYPE_RC);
1972                 }
1973                 is_fecn = bth1 & HFI1_FECN_SMASK;
1974         }
1975
1976         psn = be32_to_cpu(ohdr->bth[2]);
1977         opcode = bth0 >> 24;
1978
1979         /*
1980          * Process responses (ACKs) before anything else.  Note that the
1981          * packet sequence number will be for something in the send work
1982          * queue rather than the expected receive packet sequence number.
1983          * In other words, this QP is the requester.
1984          */
1985         if (opcode >= OP(RDMA_READ_RESPONSE_FIRST) &&
1986             opcode <= OP(ATOMIC_ACKNOWLEDGE)) {
1987                 rc_rcv_resp(ibp, ohdr, data, tlen, qp, opcode, psn,
1988                             hdrsize, pmtu, rcd);
1989                 if (is_fecn)
1990                         goto send_ack;
1991                 return;
1992         }
1993
1994         /* Compute 24 bits worth of difference. */
1995         diff = delta_psn(psn, qp->r_psn);
1996         if (unlikely(diff)) {
1997                 if (rc_rcv_error(ohdr, data, qp, opcode, psn, diff, rcd))
1998                         return;
1999                 goto send_ack;
2000         }
2001
2002         /* Check for opcode sequence errors. */
2003         switch (qp->r_state) {
2004         case OP(SEND_FIRST):
2005         case OP(SEND_MIDDLE):
2006                 if (opcode == OP(SEND_MIDDLE) ||
2007                     opcode == OP(SEND_LAST) ||
2008                     opcode == OP(SEND_LAST_WITH_IMMEDIATE))
2009                         break;
2010                 goto nack_inv;
2011
2012         case OP(RDMA_WRITE_FIRST):
2013         case OP(RDMA_WRITE_MIDDLE):
2014                 if (opcode == OP(RDMA_WRITE_MIDDLE) ||
2015                     opcode == OP(RDMA_WRITE_LAST) ||
2016                     opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE))
2017                         break;
2018                 goto nack_inv;
2019
2020         default:
2021                 if (opcode == OP(SEND_MIDDLE) ||
2022                     opcode == OP(SEND_LAST) ||
2023                     opcode == OP(SEND_LAST_WITH_IMMEDIATE) ||
2024                     opcode == OP(RDMA_WRITE_MIDDLE) ||
2025                     opcode == OP(RDMA_WRITE_LAST) ||
2026                     opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE))
2027                         goto nack_inv;
2028                 /*
2029                  * Note that it is up to the requester to not send a new
2030                  * RDMA read or atomic operation before receiving an ACK
2031                  * for the previous operation.
2032                  */
2033                 break;
2034         }
2035
2036         if (qp->state == IB_QPS_RTR && !(qp->r_flags & HFI1_R_COMM_EST))
2037                 qp_comm_est(qp);
2038
2039         /* OK, process the packet. */
2040         switch (opcode) {
2041         case OP(SEND_FIRST):
2042                 ret = hfi1_get_rwqe(qp, 0);
2043                 if (ret < 0)
2044                         goto nack_op_err;
2045                 if (!ret)
2046                         goto rnr_nak;
2047                 qp->r_rcv_len = 0;
2048                 /* FALLTHROUGH */
2049         case OP(SEND_MIDDLE):
2050         case OP(RDMA_WRITE_MIDDLE):
2051 send_middle:
2052                 /* Check for invalid length PMTU or posted rwqe len. */
2053                 if (unlikely(tlen != (hdrsize + pmtu + 4)))
2054                         goto nack_inv;
2055                 qp->r_rcv_len += pmtu;
2056                 if (unlikely(qp->r_rcv_len > qp->r_len))
2057                         goto nack_inv;
2058                 hfi1_copy_sge(&qp->r_sge, data, pmtu, 1);
2059                 break;
2060
2061         case OP(RDMA_WRITE_LAST_WITH_IMMEDIATE):
2062                 /* consume RWQE */
2063                 ret = hfi1_get_rwqe(qp, 1);
2064                 if (ret < 0)
2065                         goto nack_op_err;
2066                 if (!ret)
2067                         goto rnr_nak;
2068                 goto send_last_imm;
2069
2070         case OP(SEND_ONLY):
2071         case OP(SEND_ONLY_WITH_IMMEDIATE):
2072                 ret = hfi1_get_rwqe(qp, 0);
2073                 if (ret < 0)
2074                         goto nack_op_err;
2075                 if (!ret)
2076                         goto rnr_nak;
2077                 qp->r_rcv_len = 0;
2078                 if (opcode == OP(SEND_ONLY))
2079                         goto no_immediate_data;
2080                 /* FALLTHROUGH for SEND_ONLY_WITH_IMMEDIATE */
2081         case OP(SEND_LAST_WITH_IMMEDIATE):
2082 send_last_imm:
2083                 wc.ex.imm_data = ohdr->u.imm_data;
2084                 wc.wc_flags = IB_WC_WITH_IMM;
2085                 goto send_last;
2086         case OP(SEND_LAST):
2087         case OP(RDMA_WRITE_LAST):
2088 no_immediate_data:
2089                 wc.wc_flags = 0;
2090                 wc.ex.imm_data = 0;
2091 send_last:
2092                 /* Get the number of bytes the message was padded by. */
2093                 pad = (bth0 >> 20) & 3;
2094                 /* Check for invalid length. */
2095                 /* LAST len should be >= 1 */
2096                 if (unlikely(tlen < (hdrsize + pad + 4)))
2097                         goto nack_inv;
2098                 /* Don't count the CRC. */
2099                 tlen -= (hdrsize + pad + 4);
2100                 wc.byte_len = tlen + qp->r_rcv_len;
2101                 if (unlikely(wc.byte_len > qp->r_len))
2102                         goto nack_inv;
2103                 hfi1_copy_sge(&qp->r_sge, data, tlen, 1);
2104                 hfi1_put_ss(&qp->r_sge);
2105                 qp->r_msn++;
2106                 if (!test_and_clear_bit(HFI1_R_WRID_VALID, &qp->r_aflags))
2107                         break;
2108                 wc.wr_id = qp->r_wr_id;
2109                 wc.status = IB_WC_SUCCESS;
2110                 if (opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE) ||
2111                     opcode == OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE))
2112                         wc.opcode = IB_WC_RECV_RDMA_WITH_IMM;
2113                 else
2114                         wc.opcode = IB_WC_RECV;
2115                 wc.qp = &qp->ibqp;
2116                 wc.src_qp = qp->remote_qpn;
2117                 wc.slid = qp->remote_ah_attr.dlid;
2118                 /*
2119                  * It seems that IB mandates the presence of an SL in a
2120                  * work completion only for the UD transport (see section
2121                  * 11.4.2 of IBTA Vol. 1).
2122                  *
2123                  * However, the way the SL is chosen below is consistent
2124                  * with the way that IB/qib works and is trying avoid
2125                  * introducing incompatibilities.
2126                  *
2127                  * See also OPA Vol. 1, section 9.7.6, and table 9-17.
2128                  */
2129                 wc.sl = qp->remote_ah_attr.sl;
2130                 /* zero fields that are N/A */
2131                 wc.vendor_err = 0;
2132                 wc.pkey_index = 0;
2133                 wc.dlid_path_bits = 0;
2134                 wc.port_num = 0;
2135                 /* Signal completion event if the solicited bit is set. */
2136                 hfi1_cq_enter(to_icq(qp->ibqp.recv_cq), &wc,
2137                               (bth0 & IB_BTH_SOLICITED) != 0);
2138                 break;
2139
2140         case OP(RDMA_WRITE_FIRST):
2141         case OP(RDMA_WRITE_ONLY):
2142         case OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE):
2143                 if (unlikely(!(qp->qp_access_flags & IB_ACCESS_REMOTE_WRITE)))
2144                         goto nack_inv;
2145                 /* consume RWQE */
2146                 reth = &ohdr->u.rc.reth;
2147                 qp->r_len = be32_to_cpu(reth->length);
2148                 qp->r_rcv_len = 0;
2149                 qp->r_sge.sg_list = NULL;
2150                 if (qp->r_len != 0) {
2151                         u32 rkey = be32_to_cpu(reth->rkey);
2152                         u64 vaddr = be64_to_cpu(reth->vaddr);
2153                         int ok;
2154
2155                         /* Check rkey & NAK */
2156                         ok = hfi1_rkey_ok(qp, &qp->r_sge.sge, qp->r_len, vaddr,
2157                                           rkey, IB_ACCESS_REMOTE_WRITE);
2158                         if (unlikely(!ok))
2159                                 goto nack_acc;
2160                         qp->r_sge.num_sge = 1;
2161                 } else {
2162                         qp->r_sge.num_sge = 0;
2163                         qp->r_sge.sge.mr = NULL;
2164                         qp->r_sge.sge.vaddr = NULL;
2165                         qp->r_sge.sge.length = 0;
2166                         qp->r_sge.sge.sge_length = 0;
2167                 }
2168                 if (opcode == OP(RDMA_WRITE_FIRST))
2169                         goto send_middle;
2170                 else if (opcode == OP(RDMA_WRITE_ONLY))
2171                         goto no_immediate_data;
2172                 ret = hfi1_get_rwqe(qp, 1);
2173                 if (ret < 0)
2174                         goto nack_op_err;
2175                 if (!ret)
2176                         goto rnr_nak;
2177                 wc.ex.imm_data = ohdr->u.rc.imm_data;
2178                 wc.wc_flags = IB_WC_WITH_IMM;
2179                 goto send_last;
2180
2181         case OP(RDMA_READ_REQUEST): {
2182                 struct hfi1_ack_entry *e;
2183                 u32 len;
2184                 u8 next;
2185
2186                 if (unlikely(!(qp->qp_access_flags & IB_ACCESS_REMOTE_READ)))
2187                         goto nack_inv;
2188                 next = qp->r_head_ack_queue + 1;
2189                 /* s_ack_queue is size HFI1_MAX_RDMA_ATOMIC+1 so use > not >= */
2190                 if (next > HFI1_MAX_RDMA_ATOMIC)
2191                         next = 0;
2192                 spin_lock_irqsave(&qp->s_lock, flags);
2193                 if (unlikely(next == qp->s_tail_ack_queue)) {
2194                         if (!qp->s_ack_queue[next].sent)
2195                                 goto nack_inv_unlck;
2196                         update_ack_queue(qp, next);
2197                 }
2198                 e = &qp->s_ack_queue[qp->r_head_ack_queue];
2199                 if (e->opcode == OP(RDMA_READ_REQUEST) && e->rdma_sge.mr) {
2200                         hfi1_put_mr(e->rdma_sge.mr);
2201                         e->rdma_sge.mr = NULL;
2202                 }
2203                 reth = &ohdr->u.rc.reth;
2204                 len = be32_to_cpu(reth->length);
2205                 if (len) {
2206                         u32 rkey = be32_to_cpu(reth->rkey);
2207                         u64 vaddr = be64_to_cpu(reth->vaddr);
2208                         int ok;
2209
2210                         /* Check rkey & NAK */
2211                         ok = hfi1_rkey_ok(qp, &e->rdma_sge, len, vaddr,
2212                                           rkey, IB_ACCESS_REMOTE_READ);
2213                         if (unlikely(!ok))
2214                                 goto nack_acc_unlck;
2215                         /*
2216                          * Update the next expected PSN.  We add 1 later
2217                          * below, so only add the remainder here.
2218                          */
2219                         if (len > pmtu)
2220                                 qp->r_psn += (len - 1) / pmtu;
2221                 } else {
2222                         e->rdma_sge.mr = NULL;
2223                         e->rdma_sge.vaddr = NULL;
2224                         e->rdma_sge.length = 0;
2225                         e->rdma_sge.sge_length = 0;
2226                 }
2227                 e->opcode = opcode;
2228                 e->sent = 0;
2229                 e->psn = psn;
2230                 e->lpsn = qp->r_psn;
2231                 /*
2232                  * We need to increment the MSN here instead of when we
2233                  * finish sending the result since a duplicate request would
2234                  * increment it more than once.
2235                  */
2236                 qp->r_msn++;
2237                 qp->r_psn++;
2238                 qp->r_state = opcode;
2239                 qp->r_nak_state = 0;
2240                 qp->r_head_ack_queue = next;
2241
2242                 /* Schedule the send tasklet. */
2243                 qp->s_flags |= HFI1_S_RESP_PENDING;
2244                 hfi1_schedule_send(qp);
2245
2246                 spin_unlock_irqrestore(&qp->s_lock, flags);
2247                 if (is_fecn)
2248                         goto send_ack;
2249                 return;
2250         }
2251
2252         case OP(COMPARE_SWAP):
2253         case OP(FETCH_ADD): {
2254                 struct ib_atomic_eth *ateth;
2255                 struct hfi1_ack_entry *e;
2256                 u64 vaddr;
2257                 atomic64_t *maddr;
2258                 u64 sdata;
2259                 u32 rkey;
2260                 u8 next;
2261
2262                 if (unlikely(!(qp->qp_access_flags & IB_ACCESS_REMOTE_ATOMIC)))
2263                         goto nack_inv;
2264                 next = qp->r_head_ack_queue + 1;
2265                 if (next > HFI1_MAX_RDMA_ATOMIC)
2266                         next = 0;
2267                 spin_lock_irqsave(&qp->s_lock, flags);
2268                 if (unlikely(next == qp->s_tail_ack_queue)) {
2269                         if (!qp->s_ack_queue[next].sent)
2270                                 goto nack_inv_unlck;
2271                         update_ack_queue(qp, next);
2272                 }
2273                 e = &qp->s_ack_queue[qp->r_head_ack_queue];
2274                 if (e->opcode == OP(RDMA_READ_REQUEST) && e->rdma_sge.mr) {
2275                         hfi1_put_mr(e->rdma_sge.mr);
2276                         e->rdma_sge.mr = NULL;
2277                 }
2278                 ateth = &ohdr->u.atomic_eth;
2279                 vaddr = ((u64) be32_to_cpu(ateth->vaddr[0]) << 32) |
2280                         be32_to_cpu(ateth->vaddr[1]);
2281                 if (unlikely(vaddr & (sizeof(u64) - 1)))
2282                         goto nack_inv_unlck;
2283                 rkey = be32_to_cpu(ateth->rkey);
2284                 /* Check rkey & NAK */
2285                 if (unlikely(!hfi1_rkey_ok(qp, &qp->r_sge.sge, sizeof(u64),
2286                                            vaddr, rkey,
2287                                            IB_ACCESS_REMOTE_ATOMIC)))
2288                         goto nack_acc_unlck;
2289                 /* Perform atomic OP and save result. */
2290                 maddr = (atomic64_t *) qp->r_sge.sge.vaddr;
2291                 sdata = be64_to_cpu(ateth->swap_data);
2292                 e->atomic_data = (opcode == OP(FETCH_ADD)) ?
2293                         (u64) atomic64_add_return(sdata, maddr) - sdata :
2294                         (u64) cmpxchg((u64 *) qp->r_sge.sge.vaddr,
2295                                       be64_to_cpu(ateth->compare_data),
2296                                       sdata);
2297                 hfi1_put_mr(qp->r_sge.sge.mr);
2298                 qp->r_sge.num_sge = 0;
2299                 e->opcode = opcode;
2300                 e->sent = 0;
2301                 e->psn = psn;
2302                 e->lpsn = psn;
2303                 qp->r_msn++;
2304                 qp->r_psn++;
2305                 qp->r_state = opcode;
2306                 qp->r_nak_state = 0;
2307                 qp->r_head_ack_queue = next;
2308
2309                 /* Schedule the send tasklet. */
2310                 qp->s_flags |= HFI1_S_RESP_PENDING;
2311                 hfi1_schedule_send(qp);
2312
2313                 spin_unlock_irqrestore(&qp->s_lock, flags);
2314                 if (is_fecn)
2315                         goto send_ack;
2316                 return;
2317         }
2318
2319         default:
2320                 /* NAK unknown opcodes. */
2321                 goto nack_inv;
2322         }
2323         qp->r_psn++;
2324         qp->r_state = opcode;
2325         qp->r_ack_psn = psn;
2326         qp->r_nak_state = 0;
2327         /* Send an ACK if requested or required. */
2328         if (psn & (1 << 31))
2329                 goto send_ack;
2330         return;
2331
2332 rnr_nak:
2333         qp->r_nak_state = IB_RNR_NAK | qp->r_min_rnr_timer;
2334         qp->r_ack_psn = qp->r_psn;
2335         /* Queue RNR NAK for later */
2336         if (list_empty(&qp->rspwait)) {
2337                 qp->r_flags |= HFI1_R_RSP_NAK;
2338                 atomic_inc(&qp->refcount);
2339                 list_add_tail(&qp->rspwait, &rcd->qp_wait_list);
2340         }
2341         return;
2342
2343 nack_op_err:
2344         hfi1_rc_error(qp, IB_WC_LOC_QP_OP_ERR);
2345         qp->r_nak_state = IB_NAK_REMOTE_OPERATIONAL_ERROR;
2346         qp->r_ack_psn = qp->r_psn;
2347         /* Queue NAK for later */
2348         if (list_empty(&qp->rspwait)) {
2349                 qp->r_flags |= HFI1_R_RSP_NAK;
2350                 atomic_inc(&qp->refcount);
2351                 list_add_tail(&qp->rspwait, &rcd->qp_wait_list);
2352         }
2353         return;
2354
2355 nack_inv_unlck:
2356         spin_unlock_irqrestore(&qp->s_lock, flags);
2357 nack_inv:
2358         hfi1_rc_error(qp, IB_WC_LOC_QP_OP_ERR);
2359         qp->r_nak_state = IB_NAK_INVALID_REQUEST;
2360         qp->r_ack_psn = qp->r_psn;
2361         /* Queue NAK for later */
2362         if (list_empty(&qp->rspwait)) {
2363                 qp->r_flags |= HFI1_R_RSP_NAK;
2364                 atomic_inc(&qp->refcount);
2365                 list_add_tail(&qp->rspwait, &rcd->qp_wait_list);
2366         }
2367         return;
2368
2369 nack_acc_unlck:
2370         spin_unlock_irqrestore(&qp->s_lock, flags);
2371 nack_acc:
2372         hfi1_rc_error(qp, IB_WC_LOC_PROT_ERR);
2373         qp->r_nak_state = IB_NAK_REMOTE_ACCESS_ERROR;
2374         qp->r_ack_psn = qp->r_psn;
2375 send_ack:
2376         hfi1_send_rc_ack(rcd, qp, is_fecn);
2377 }
2378
2379 void hfi1_rc_hdrerr(
2380         struct hfi1_ctxtdata *rcd,
2381         struct hfi1_ib_header *hdr,
2382         u32 rcv_flags,
2383         struct hfi1_qp *qp)
2384 {
2385         int has_grh = rcv_flags & HFI1_HAS_GRH;
2386         struct hfi1_other_headers *ohdr;
2387         struct hfi1_ibport *ibp = to_iport(qp->ibqp.device, qp->port_num);
2388         int diff;
2389         u32 opcode;
2390         u32 psn;
2391
2392         /* Check for GRH */
2393         ohdr = &hdr->u.oth;
2394         if (has_grh)
2395                 ohdr = &hdr->u.l.oth;
2396
2397         opcode = be32_to_cpu(ohdr->bth[0]);
2398         if (hfi1_ruc_check_hdr(ibp, hdr, has_grh, qp, opcode))
2399                 return;
2400
2401         psn = be32_to_cpu(ohdr->bth[2]);
2402         opcode >>= 24;
2403
2404         /* Only deal with RDMA Writes for now */
2405         if (opcode < IB_OPCODE_RC_RDMA_READ_RESPONSE_FIRST) {
2406                 diff = delta_psn(psn, qp->r_psn);
2407                 if (!qp->r_nak_state && diff >= 0) {
2408                         ibp->n_rc_seqnak++;
2409                         qp->r_nak_state = IB_NAK_PSN_ERROR;
2410                         /* Use the expected PSN. */
2411                         qp->r_ack_psn = qp->r_psn;
2412                         /*
2413                          * Wait to send the sequence
2414                          * NAK until all packets
2415                          * in the receive queue have
2416                          * been processed.
2417                          * Otherwise, we end up
2418                          * propagating congestion.
2419                          */
2420                         if (list_empty(&qp->rspwait)) {
2421                                 qp->r_flags |= HFI1_R_RSP_NAK;
2422                                 atomic_inc(&qp->refcount);
2423                                 list_add_tail(
2424                                         &qp->rspwait,
2425                                         &rcd->qp_wait_list);
2426                                 }
2427                 } /* Out of sequence NAK */
2428         } /* QP Request NAKs */
2429 }