drivers/usb/host/ehci-hcd.c

   1 /*
   2  * Enhanced Host Controller Interface (EHCI) driver for USB.
   3  *
   4  * Maintainer: Alan Stern <stern@rowland.harvard.edu>
   5  *
   6  * Copyright (c) 2000-2004 by David Brownell
   7  *
   8  * This program is free software; you can redistribute it and/or modify it
   9  * under the terms of the GNU General Public License as published by the
  10  * Free Software Foundation; either version 2 of the License, or (at your
  11  * option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful, but
  14  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  15  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  16  * for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software Foundation,
  20  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21  */
  22
  23 #include <linux/module.h>
  24 #include <linux/pci.h>
  25 #include <linux/dmapool.h>
  26 #include <linux/kernel.h>
  27 #include <linux/delay.h>
  28 #include <linux/ioport.h>
  29 #include <linux/sched.h>
  30 #include <linux/vmalloc.h>
  31 #include <linux/errno.h>
  32 #include <linux/init.h>
  33 #include <linux/hrtimer.h>
  34 #include <linux/list.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/usb.h>
  37 #include <linux/usb/hcd.h>
  38 #include <linux/moduleparam.h>
  39 #include <linux/dma-mapping.h>
  40 #include <linux/debugfs.h>
  41 #include <linux/slab.h>
  42
  43 #include <asm/byteorder.h>
  44 #include <asm/io.h>
  45 #include <asm/irq.h>
  46 #include <asm/unaligned.h>
  47
  48 #if defined(CONFIG_PPC_PS3)
  49 #include <asm/firmware.h>
  50 #endif
  51
  52 /*-------------------------------------------------------------------------*/
  53
  54 /*
  55  * EHCI hc_driver implementation ... experimental, incomplete.
  56  * Based on the final 1.0 register interface specification.
  57  *
  58  * USB 2.0 shows up in upcoming www.pcmcia.org technology.
  59  * First was PCMCIA, like ISA; then CardBus, which is PCI.
  60  * Next comes "CardBay", using USB 2.0 signals.
  61  *
  62  * Contains additional contributions by Brad Hards, Rory Bolt, and others.
  63  * Special thanks to Intel and VIA for providing host controllers to
  64  * test this driver on, and Cypress (including In-System Design) for
  65  * providing early devices for those host controllers to talk to!
  66  */
  67
  68 #define DRIVER_AUTHOR "David Brownell"
  69 #define DRIVER_DESC "USB 2.0 'Enhanced' Host Controller (EHCI) Driver"
  70
  71 static const char       hcd_name [] = "ehci_hcd";
  72
  73
  74 #undef EHCI_URB_TRACE
  75
  76 /* magic numbers that can affect system performance */
  77 #define EHCI_TUNE_CERR          3       /* 0-3 qtd retries; 0 == don't stop */
  78 #define EHCI_TUNE_RL_HS         4       /* nak throttle; see 4.9 */
  79 #define EHCI_TUNE_RL_TT         0
  80 #define EHCI_TUNE_MULT_HS       1       /* 1-3 transactions/uframe; 4.10.3 */
  81 #define EHCI_TUNE_MULT_TT       1
  82 /*
  83  * Some drivers think it's safe to schedule isochronous transfers more than
  84  * 256 ms into the future (partly as a result of an old bug in the scheduling
  85  * code).  In an attempt to avoid trouble, we will use a minimum scheduling
  86  * length of 512 frames instead of 256.
  87  */
  88 #define EHCI_TUNE_FLS           1       /* (medium) 512-frame schedule */
  89
  90 /* Initial IRQ latency:  faster than hw default */
  91 static int log2_irq_thresh = 0;         // 0 to 6
  92 module_param (log2_irq_thresh, int, S_IRUGO);
  93 MODULE_PARM_DESC (log2_irq_thresh, "log2 IRQ latency, 1-64 microframes");
  94
  95 /* initial park setting:  slower than hw default */
  96 static unsigned park = 0;
  97 module_param (park, uint, S_IRUGO);
  98 MODULE_PARM_DESC (park, "park setting; 1-3 back-to-back async packets");
  99
 100 /* for flakey hardware, ignore overcurrent indicators */
 101 static bool ignore_oc = 0;
 102 module_param (ignore_oc, bool, S_IRUGO);
 103 MODULE_PARM_DESC (ignore_oc, "ignore bogus hardware overcurrent indications");
 104
 105 #define INTR_MASK (STS_IAA | STS_FATAL | STS_PCD | STS_ERR | STS_INT)
 106
 107 /*-------------------------------------------------------------------------*/
 108
 109 #include "ehci.h"
 110 #include "pci-quirks.h"
 111
 112 static void compute_tt_budget(u8 budget_table[EHCI_BANDWIDTH_SIZE],
 113                 struct ehci_tt *tt);
 114
 115 /*
 116  * The MosChip MCS9990 controller updates its microframe counter
 117  * a little before the frame counter, and occasionally we will read
 118  * the invalid intermediate value.  Avoid problems by checking the
 119  * microframe number (the low-order 3 bits); if they are 0 then
 120  * re-read the register to get the correct value.
 121  */
 122 static unsigned ehci_moschip_read_frame_index(struct ehci_hcd *ehci)
 123 {
 124         unsigned uf;
 125
 126         uf = ehci_readl(ehci, &ehci->regs->frame_index);
 127         if (unlikely((uf & 7) == 0))
 128                 uf = ehci_readl(ehci, &ehci->regs->frame_index);
 129         return uf;
 130 }
 131
 132 static inline unsigned ehci_read_frame_index(struct ehci_hcd *ehci)
 133 {
 134         if (ehci->frame_index_bug)
 135                 return ehci_moschip_read_frame_index(ehci);
 136         return ehci_readl(ehci, &ehci->regs->frame_index);
 137 }
 138
 139 #include "ehci-dbg.c"
 140
 141 /*-------------------------------------------------------------------------*/
 142
 143 /*
 144  * ehci_handshake - spin reading hc until handshake completes or fails
 145  * @ptr: address of hc register to be read
 146  * @mask: bits to look at in result of read
 147  * @done: value of those bits when handshake succeeds
 148  * @usec: timeout in microseconds
 149  *
 150  * Returns negative errno, or zero on success
 151  *
 152  * Success happens when the "mask" bits have the specified value (hardware
 153  * handshake done).  There are two failure modes:  "usec" have passed (major
 154  * hardware flakeout), or the register reads as all-ones (hardware removed).
 155  *
 156  * That last failure should_only happen in cases like physical cardbus eject
 157  * before driver shutdown. But it also seems to be caused by bugs in cardbus
 158  * bridge shutdown:  shutting down the bridge before the devices using it.
 159  */
 160 int ehci_handshake(struct ehci_hcd *ehci, void __iomem *ptr,
 161                    u32 mask, u32 done, int usec)
 162 {
 163         u32     result;
 164
 165         do {
 166                 result = ehci_readl(ehci, ptr);
 167                 if (result == ~(u32)0)          /* card removed */
 168                         return -ENODEV;
 169                 result &= mask;
 170                 if (result == done)
 171                         return 0;
 172                 udelay (1);
 173                 usec--;
 174         } while (usec > 0);
 175         return -ETIMEDOUT;
 176 }
 177 EXPORT_SYMBOL_GPL(ehci_handshake);
 178
 179 /* check TDI/ARC silicon is in host mode */
 180 static int tdi_in_host_mode (struct ehci_hcd *ehci)
 181 {
 182         u32             tmp;
 183
 184         tmp = ehci_readl(ehci, &ehci->regs->usbmode);
 185         return (tmp & 3) == USBMODE_CM_HC;
 186 }
 187
 188 /*
 189  * Force HC to halt state from unknown (EHCI spec section 2.3).
 190  * Must be called with interrupts enabled and the lock not held.
 191  */
 192 static int ehci_halt (struct ehci_hcd *ehci)
 193 {
 194         u32     temp;
 195
 196         spin_lock_irq(&ehci->lock);
 197
 198         /* disable any irqs left enabled by previous code */
 199         ehci_writel(ehci, 0, &ehci->regs->intr_enable);
 200
 201         if (ehci_is_TDI(ehci) && !tdi_in_host_mode(ehci)) {
 202                 spin_unlock_irq(&ehci->lock);
 203                 return 0;
 204         }
 205
 206         /*
 207          * This routine gets called during probe before ehci->command
 208          * has been initialized, so we can't rely on its value.
 209          */
 210         ehci->command &= ~CMD_RUN;
 211         temp = ehci_readl(ehci, &ehci->regs->command);
 212         temp &= ~(CMD_RUN | CMD_IAAD);
 213         ehci_writel(ehci, temp, &ehci->regs->command);
 214
 215         spin_unlock_irq(&ehci->lock);
 216         synchronize_irq(ehci_to_hcd(ehci)->irq);
 217
 218         return ehci_handshake(ehci, &ehci->regs->status,
 219                           STS_HALT, STS_HALT, 16 * 125);
 220 }
 221
 222 /* put TDI/ARC silicon into EHCI mode */
 223 static void tdi_reset (struct ehci_hcd *ehci)
 224 {
 225         u32             tmp;
 226
 227         tmp = ehci_readl(ehci, &ehci->regs->usbmode);
 228         tmp |= USBMODE_CM_HC;
 229         /* The default byte access to MMR space is LE after
 230          * controller reset. Set the required endian mode
 231          * for transfer buffers to match the host microprocessor
 232          */
 233         if (ehci_big_endian_mmio(ehci))
 234                 tmp |= USBMODE_BE;
 235         ehci_writel(ehci, tmp, &ehci->regs->usbmode);
 236 }
 237
 238 /*
 239  * Reset a non-running (STS_HALT == 1) controller.
 240  * Must be called with interrupts enabled and the lock not held.
 241  */
 242 int ehci_reset(struct ehci_hcd *ehci)
 243 {
 244         int     retval;
 245         u32     command = ehci_readl(ehci, &ehci->regs->command);
 246
 247         /* If the EHCI debug controller is active, special care must be
 248          * taken before and after a host controller reset */
 249         if (ehci->debug && !dbgp_reset_prep(ehci_to_hcd(ehci)))
 250                 ehci->debug = NULL;
 251
 252         command |= CMD_RESET;
 253         dbg_cmd (ehci, "reset", command);
 254         ehci_writel(ehci, command, &ehci->regs->command);
 255         ehci->rh_state = EHCI_RH_HALTED;
 256         ehci->next_statechange = jiffies;
 257         retval = ehci_handshake(ehci, &ehci->regs->command,
 258                             CMD_RESET, 0, 250 * 1000);
 259
 260         if (ehci->has_hostpc) {
 261                 ehci_writel(ehci, USBMODE_EX_HC | USBMODE_EX_VBPS,
 262                                 &ehci->regs->usbmode_ex);
 263                 ehci_writel(ehci, TXFIFO_DEFAULT, &ehci->regs->txfill_tuning);
 264         }
 265         if (retval)
 266                 return retval;
 267
 268         if (ehci_is_TDI(ehci))
 269                 tdi_reset (ehci);
 270
 271         if (ehci->debug)
 272                 dbgp_external_startup(ehci_to_hcd(ehci));
 273
 274         ehci->port_c_suspend = ehci->suspended_ports =
 275                         ehci->resuming_ports = 0;
 276         return retval;
 277 }
 278 EXPORT_SYMBOL_GPL(ehci_reset);
 279
 280 /*
 281  * Idle the controller (turn off the schedules).
 282  * Must be called with interrupts enabled and the lock not held.
 283  */
 284 static void ehci_quiesce (struct ehci_hcd *ehci)
 285 {
 286         u32     temp;
 287
 288         if (ehci->rh_state != EHCI_RH_RUNNING)
 289                 return;
 290
 291         /* wait for any schedule enables/disables to take effect */
 292         temp = (ehci->command << 10) & (STS_ASS | STS_PSS);
 293         ehci_handshake(ehci, &ehci->regs->status, STS_ASS | STS_PSS, temp,
 294                         16 * 125);
 295
 296         /* then disable anything that's still active */
 297         spin_lock_irq(&ehci->lock);
 298         ehci->command &= ~(CMD_ASE | CMD_PSE);
 299         ehci_writel(ehci, ehci->command, &ehci->regs->command);
 300         spin_unlock_irq(&ehci->lock);
 301
 302         /* hardware can take 16 microframes to turn off ... */
 303         ehci_handshake(ehci, &ehci->regs->status, STS_ASS | STS_PSS, 0,
 304                         16 * 125);
 305 }
 306
 307 /*-------------------------------------------------------------------------*/
 308
 309 static void end_unlink_async(struct ehci_hcd *ehci);
 310 static void unlink_empty_async(struct ehci_hcd *ehci);
 311 static void unlink_empty_async_suspended(struct ehci_hcd *ehci);
 312 static void ehci_work(struct ehci_hcd *ehci);
 313 static void start_unlink_intr(struct ehci_hcd *ehci, struct ehci_qh *qh);
 314 static void end_unlink_intr(struct ehci_hcd *ehci, struct ehci_qh *qh);
 315 static int ehci_port_power(struct ehci_hcd *ehci, int portnum, bool enable);
 316
 317 #include "ehci-timer.c"
 318 #include "ehci-hub.c"
 319 #include "ehci-mem.c"
 320 #include "ehci-q.c"
 321 #include "ehci-sched.c"
 322 #include "ehci-sysfs.c"
 323
 324 /*-------------------------------------------------------------------------*/
 325
 326 /* On some systems, leaving remote wakeup enabled prevents system shutdown.
 327  * The firmware seems to think that powering off is a wakeup event!
 328  * This routine turns off remote wakeup and everything else, on all ports.
 329  */
 330 static void ehci_turn_off_all_ports(struct ehci_hcd *ehci)
 331 {
 332         int     port = HCS_N_PORTS(ehci->hcs_params);
 333
 334         while (port--) {
 335                 ehci_writel(ehci, PORT_RWC_BITS,
 336                                 &ehci->regs->port_status[port]);
 337                 spin_unlock_irq(&ehci->lock);
 338                 ehci_port_power(ehci, port, false);
 339                 spin_lock_irq(&ehci->lock);
 340         }
 341 }
 342
 343 /*
 344  * Halt HC, turn off all ports, and let the BIOS use the companion controllers.
 345  * Must be called with interrupts enabled and the lock not held.
 346  */
 347 static void ehci_silence_controller(struct ehci_hcd *ehci)
 348 {
 349         ehci_halt(ehci);
 350
 351         spin_lock_irq(&ehci->lock);
 352         ehci->rh_state = EHCI_RH_HALTED;
 353         ehci_turn_off_all_ports(ehci);
 354
 355         /* make BIOS/etc use companion controller during reboot */
 356         ehci_writel(ehci, 0, &ehci->regs->configured_flag);
 357
 358         /* unblock posted writes */
 359         ehci_readl(ehci, &ehci->regs->configured_flag);
 360         spin_unlock_irq(&ehci->lock);
 361 }
 362
 363 /* ehci_shutdown kick in for silicon on any bus (not just pci, etc).
 364  * This forcibly disables dma and IRQs, helping kexec and other cases
 365  * where the next system software may expect clean state.
 366  */
 367 static void ehci_shutdown(struct usb_hcd *hcd)
 368 {
 369         struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 370
 371         spin_lock_irq(&ehci->lock);
 372         ehci->shutdown = true;
 373         ehci->rh_state = EHCI_RH_STOPPING;
 374         ehci->enabled_hrtimer_events = 0;
 375         spin_unlock_irq(&ehci->lock);
 376
 377         ehci_silence_controller(ehci);
 378
 379         hrtimer_cancel(&ehci->hrtimer);
 380 }
 381
 382 /*-------------------------------------------------------------------------*/
 383
 384 /*
 385  * ehci_work is called from some interrupts, timers, and so on.
 386  * it calls driver completion functions, after dropping ehci->lock.
 387  */
 388 static void ehci_work (struct ehci_hcd *ehci)
 389 {
 390         /* another CPU may drop ehci->lock during a schedule scan while
 391          * it reports urb completions.  this flag guards against bogus
 392          * attempts at re-entrant schedule scanning.
 393          */
 394         if (ehci->scanning) {
 395                 ehci->need_rescan = true;
 396                 return;
 397         }
 398         ehci->scanning = true;
 399
 400  rescan:
 401         ehci->need_rescan = false;
 402         if (ehci->async_count)
 403                 scan_async(ehci);
 404         if (ehci->intr_count > 0)
 405                 scan_intr(ehci);
 406         if (ehci->isoc_count > 0)
 407                 scan_isoc(ehci);
 408         if (ehci->need_rescan)
 409                 goto rescan;
 410         ehci->scanning = false;
 411
 412         /* the IO watchdog guards against hardware or driver bugs that
 413          * misplace IRQs, and should let us run completely without IRQs.
 414          * such lossage has been observed on both VT6202 and VT8235.
 415          */
 416         turn_on_io_watchdog(ehci);
 417 }
 418
 419 /*
 420  * Called when the ehci_hcd module is removed.
 421  */
 422 static void ehci_stop (struct usb_hcd *hcd)
 423 {
 424         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 425
 426         ehci_dbg (ehci, "stop\n");
 427
 428         /* no more interrupts ... */
 429
 430         spin_lock_irq(&ehci->lock);
 431         ehci->enabled_hrtimer_events = 0;
 432         spin_unlock_irq(&ehci->lock);
 433
 434         ehci_quiesce(ehci);
 435         ehci_silence_controller(ehci);
 436         ehci_reset (ehci);
 437
 438         hrtimer_cancel(&ehci->hrtimer);
 439         remove_sysfs_files(ehci);
 440         remove_debug_files (ehci);
 441
 442         /* root hub is shut down separately (first, when possible) */
 443         spin_lock_irq (&ehci->lock);
 444         end_free_itds(ehci);
 445         spin_unlock_irq (&ehci->lock);
 446         ehci_mem_cleanup (ehci);
 447
 448         if (ehci->amd_pll_fix == 1)
 449                 usb_amd_dev_put();
 450
 451         dbg_status (ehci, "ehci_stop completed",
 452                     ehci_readl(ehci, &ehci->regs->status));
 453 }
 454
 455 /* one-time init, only for memory state */
 456 static int ehci_init(struct usb_hcd *hcd)
 457 {
 458         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
 459         u32                     temp;
 460         int                     retval;
 461         u32                     hcc_params;
 462         struct ehci_qh_hw       *hw;
 463
 464         spin_lock_init(&ehci->lock);
 465
 466         /*
 467          * keep io watchdog by default, those good HCDs could turn off it later
 468          */
 469         ehci->need_io_watchdog = 1;
 470
 471         hrtimer_init(&ehci->hrtimer, CLOCK_MONOTONIC, HRTIMER_MODE_ABS);
 472         ehci->hrtimer.function = ehci_hrtimer_func;
 473         ehci->next_hrtimer_event = EHCI_HRTIMER_NO_EVENT;
 474
 475         hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
 476
 477         /*
 478          * by default set standard 80% (== 100 usec/uframe) max periodic
 479          * bandwidth as required by USB 2.0
 480          */
 481         ehci->uframe_periodic_max = 100;
 482
 483         /*
 484          * hw default: 1K periodic list heads, one per frame.
 485          * periodic_size can shrink by USBCMD update if hcc_params allows.
 486          */
 487         ehci->periodic_size = DEFAULT_I_TDPS;
 488         INIT_LIST_HEAD(&ehci->async_unlink);
 489         INIT_LIST_HEAD(&ehci->async_idle);
 490         INIT_LIST_HEAD(&ehci->intr_unlink_wait);
 491         INIT_LIST_HEAD(&ehci->intr_unlink);
 492         INIT_LIST_HEAD(&ehci->intr_qh_list);
 493         INIT_LIST_HEAD(&ehci->cached_itd_list);
 494         INIT_LIST_HEAD(&ehci->cached_sitd_list);
 495         INIT_LIST_HEAD(&ehci->tt_list);
 496
 497         if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
 498                 /* periodic schedule size can be smaller than default */
 499                 switch (EHCI_TUNE_FLS) {
 500                 case 0: ehci->periodic_size = 1024; break;
 501                 case 1: ehci->periodic_size = 512; break;
 502                 case 2: ehci->periodic_size = 256; break;
 503                 default:        BUG();
 504                 }
 505         }
 506         if ((retval = ehci_mem_init(ehci, GFP_KERNEL)) < 0)
 507                 return retval;
 508
 509         /* controllers may cache some of the periodic schedule ... */
 510         if (HCC_ISOC_CACHE(hcc_params))         // full frame cache
 511                 ehci->i_thresh = 0;
 512         else                                    // N microframes cached
 513                 ehci->i_thresh = 2 + HCC_ISOC_THRES(hcc_params);
 514
 515         /*
 516          * dedicate a qh for the async ring head, since we couldn't unlink
 517          * a 'real' qh without stopping the async schedule [4.8].  use it
 518          * as the 'reclamation list head' too.
 519          * its dummy is used in hw_alt_next of many tds, to prevent the qh
 520          * from automatically advancing to the next td after short reads.
 521          */
 522         ehci->async->qh_next.qh = NULL;
 523         hw = ehci->async->hw;
 524         hw->hw_next = QH_NEXT(ehci, ehci->async->qh_dma);
 525         hw->hw_info1 = cpu_to_hc32(ehci, QH_HEAD);
 526 #if defined(CONFIG_PPC_PS3)
 527         hw->hw_info1 |= cpu_to_hc32(ehci, QH_INACTIVATE);
 528 #endif
 529         hw->hw_token = cpu_to_hc32(ehci, QTD_STS_HALT);
 530         hw->hw_qtd_next = EHCI_LIST_END(ehci);
 531         ehci->async->qh_state = QH_STATE_LINKED;
 532         hw->hw_alt_next = QTD_NEXT(ehci, ehci->async->dummy->qtd_dma);
 533
 534         /* clear interrupt enables, set irq latency */
 535         if (log2_irq_thresh < 0 || log2_irq_thresh > 6)
 536                 log2_irq_thresh = 0;
 537         temp = 1 << (16 + log2_irq_thresh);
 538         if (HCC_PER_PORT_CHANGE_EVENT(hcc_params)) {
 539                 ehci->has_ppcd = 1;
 540                 ehci_dbg(ehci, "enable per-port change event\n");
 541                 temp |= CMD_PPCEE;
 542         }
 543         if (HCC_CANPARK(hcc_params)) {
 544                 /* HW default park == 3, on hardware that supports it (like
 545                  * NVidia and ALI silicon), maximizes throughput on the async
 546                  * schedule by avoiding QH fetches between transfers.
 547                  *
 548                  * With fast usb storage devices and NForce2, "park" seems to
 549                  * make problems:  throughput reduction (!), data errors...
 550                  */
 551                 if (park) {
 552                         park = min(park, (unsigned) 3);
 553                         temp |= CMD_PARK;
 554                         temp |= park << 8;
 555                 }
 556                 ehci_dbg(ehci, "park %d\n", park);
 557         }
 558         if (HCC_PGM_FRAMELISTLEN(hcc_params)) {
 559                 /* periodic schedule size can be smaller than default */
 560                 temp &= ~(3 << 2);
 561                 temp |= (EHCI_TUNE_FLS << 2);
 562         }
 563         ehci->command = temp;
 564
 565         /* Accept arbitrarily long scatter-gather lists */
 566         if (!(hcd->driver->flags & HCD_LOCAL_MEM))
 567                 hcd->self.sg_tablesize = ~0;
 568         return 0;
 569 }
 570
 571 /* start HC running; it's halted, ehci_init() has been run (once) */
 572 static int ehci_run (struct usb_hcd *hcd)
 573 {
 574         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 575         u32                     temp;
 576         u32                     hcc_params;
 577
 578         hcd->uses_new_polling = 1;
 579
 580         /* EHCI spec section 4.1 */
 581
 582         ehci_writel(ehci, ehci->periodic_dma, &ehci->regs->frame_list);
 583         ehci_writel(ehci, (u32)ehci->async->qh_dma, &ehci->regs->async_next);
 584
 585         /*
 586          * hcc_params controls whether ehci->regs->segment must (!!!)
 587          * be used; it constrains QH/ITD/SITD and QTD locations.
 588          * pci_pool consistent memory always uses segment zero.
 589          * streaming mappings for I/O buffers, like pci_map_single(),
 590          * can return segments above 4GB, if the device allows.
 591          *
 592          * NOTE:  the dma mask is visible through dma_supported(), so
 593          * drivers can pass this info along ... like NETIF_F_HIGHDMA,
 594          * Scsi_Host.highmem_io, and so forth.  It's readonly to all
 595          * host side drivers though.
 596          */
 597         hcc_params = ehci_readl(ehci, &ehci->caps->hcc_params);
 598         if (HCC_64BIT_ADDR(hcc_params)) {
 599                 ehci_writel(ehci, 0, &ehci->regs->segment);
 600 #if 0
 601 // this is deeply broken on almost all architectures
 602                 if (!dma_set_mask(hcd->self.controller, DMA_BIT_MASK(64)))
 603                         ehci_info(ehci, "enabled 64bit DMA\n");
 604 #endif
 605         }
 606
 607
 608         // Philips, Intel, and maybe others need CMD_RUN before the
 609         // root hub will detect new devices (why?); NEC doesn't
 610         ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
 611         ehci->command |= CMD_RUN;
 612         ehci_writel(ehci, ehci->command, &ehci->regs->command);
 613         dbg_cmd (ehci, "init", ehci->command);
 614
 615         /*
 616          * Start, enabling full USB 2.0 functionality ... usb 1.1 devices
 617          * are explicitly handed to companion controller(s), so no TT is
 618          * involved with the root hub.  (Except where one is integrated,
 619          * and there's no companion controller unless maybe for USB OTG.)
 620          *
 621          * Turning on the CF flag will transfer ownership of all ports
 622          * from the companions to the EHCI controller.  If any of the
 623          * companions are in the middle of a port reset at the time, it
 624          * could cause trouble.  Write-locking ehci_cf_port_reset_rwsem
 625          * guarantees that no resets are in progress.  After we set CF,
 626          * a short delay lets the hardware catch up; new resets shouldn't
 627          * be started before the port switching actions could complete.
 628          */
 629         down_write(&ehci_cf_port_reset_rwsem);
 630         ehci->rh_state = EHCI_RH_RUNNING;
 631         ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
 632         ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
 633         msleep(5);
 634         up_write(&ehci_cf_port_reset_rwsem);
 635         ehci->last_periodic_enable = ktime_get_real();
 636
 637         temp = HC_VERSION(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
 638         ehci_info (ehci,
 639                 "USB %x.%x started, EHCI %x.%02x%s\n",
 640                 ((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f),
 641                 temp >> 8, temp & 0xff,
 642                 ignore_oc ? ", overcurrent ignored" : "");
 643
 644         ehci_writel(ehci, INTR_MASK,
 645                     &ehci->regs->intr_enable); /* Turn On Interrupts */
 646
 647         /* GRR this is run-once init(), being done every time the HC starts.
 648          * So long as they're part of class devices, we can't do it init()
 649          * since the class device isn't created that early.
 650          */
 651         create_debug_files(ehci);
 652         create_sysfs_files(ehci);
 653
 654         return 0;
 655 }
 656
 657 int ehci_setup(struct usb_hcd *hcd)
 658 {
 659         struct ehci_hcd *ehci = hcd_to_ehci(hcd);
 660         int retval;
 661
 662         ehci->regs = (void __iomem *)ehci->caps +
 663             HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
 664         dbg_hcs_params(ehci, "reset");
 665         dbg_hcc_params(ehci, "reset");
 666
 667         /* cache this readonly data; minimize chip reads */
 668         ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
 669
 670         ehci->sbrn = HCD_USB2;
 671
 672         /* data structure init */
 673         retval = ehci_init(hcd);
 674         if (retval)
 675                 return retval;
 676
 677         retval = ehci_halt(ehci);
 678         if (retval)
 679                 return retval;
 680
 681         ehci_reset(ehci);
 682
 683         return 0;
 684 }
 685 EXPORT_SYMBOL_GPL(ehci_setup);
 686
 687 /*-------------------------------------------------------------------------*/
 688
 689 static irqreturn_t ehci_irq (struct usb_hcd *hcd)
 690 {
 691         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 692         u32                     status, masked_status, pcd_status = 0, cmd;
 693         int                     bh;
 694         unsigned long           flags;
 695
 696         /*
 697          * For threadirqs option we use spin_lock_irqsave() variant to prevent
 698          * deadlock with ehci hrtimer callback, because hrtimer callbacks run
 699          * in interrupt context even when threadirqs is specified. We can go
 700          * back to spin_lock() variant when hrtimer callbacks become threaded.
 701          */
 702         spin_lock_irqsave(&ehci->lock, flags);
 703
 704         status = ehci_readl(ehci, &ehci->regs->status);
 705
 706         /* e.g. cardbus physical eject */
 707         if (status == ~(u32) 0) {
 708                 ehci_dbg (ehci, "device removed\n");
 709                 goto dead;
 710         }
 711
 712         /*
 713          * We don't use STS_FLR, but some controllers don't like it to
 714          * remain on, so mask it out along with the other status bits.
 715          */
 716         masked_status = status & (INTR_MASK | STS_FLR);
 717
 718         /* Shared IRQ? */
 719         if (!masked_status || unlikely(ehci->rh_state == EHCI_RH_HALTED)) {
 720                 spin_unlock_irqrestore(&ehci->lock, flags);
 721                 return IRQ_NONE;
 722         }
 723
 724         /* clear (just) interrupts */
 725         ehci_writel(ehci, masked_status, &ehci->regs->status);
 726         cmd = ehci_readl(ehci, &ehci->regs->command);
 727         bh = 0;
 728
 729         /* normal [4.15.1.2] or error [4.15.1.1] completion */
 730         if (likely ((status & (STS_INT|STS_ERR)) != 0)) {
 731                 if (likely ((status & STS_ERR) == 0))
 732                         COUNT (ehci->stats.normal);
 733                 else
 734                         COUNT (ehci->stats.error);
 735                 bh = 1;
 736         }
 737
 738         /* complete the unlinking of some qh [4.15.2.3] */
 739         if (status & STS_IAA) {
 740
 741                 /* Turn off the IAA watchdog */
 742                 ehci->enabled_hrtimer_events &= ~BIT(EHCI_HRTIMER_IAA_WATCHDOG);
 743
 744                 /*
 745                  * Mild optimization: Allow another IAAD to reset the
 746                  * hrtimer, if one occurs before the next expiration.
 747                  * In theory we could always cancel the hrtimer, but
 748                  * tests show that about half the time it will be reset
 749                  * for some other event anyway.
 750                  */
 751                 if (ehci->next_hrtimer_event == EHCI_HRTIMER_IAA_WATCHDOG)
 752                         ++ehci->next_hrtimer_event;
 753
 754                 /* guard against (alleged) silicon errata */
 755                 if (cmd & CMD_IAAD)
 756                         ehci_dbg(ehci, "IAA with IAAD still set?\n");
 757                 if (ehci->iaa_in_progress)
 758                         COUNT(ehci->stats.iaa);
 759                 end_unlink_async(ehci);
 760         }
 761
 762         /* remote wakeup [4.3.1] */
 763         if (status & STS_PCD) {
 764                 unsigned        i = HCS_N_PORTS (ehci->hcs_params);
 765                 u32             ppcd = ~0;
 766
 767                 /* kick root hub later */
 768                 pcd_status = status;
 769
 770                 /* resume root hub? */
 771                 if (ehci->rh_state == EHCI_RH_SUSPENDED)
 772                         usb_hcd_resume_root_hub(hcd);
 773
 774                 /* get per-port change detect bits */
 775                 if (ehci->has_ppcd)
 776                         ppcd = status >> 16;
 777
 778                 while (i--) {
 779                         int pstatus;
 780
 781                         /* leverage per-port change bits feature */
 782                         if (!(ppcd & (1 << i)))
 783                                 continue;
 784                         pstatus = ehci_readl(ehci,
 785                                          &ehci->regs->port_status[i]);
 786
 787                         if (pstatus & PORT_OWNER)
 788                                 continue;
 789                         if (!(test_bit(i, &ehci->suspended_ports) &&
 790                                         ((pstatus & PORT_RESUME) ||
 791                                                 !(pstatus & PORT_SUSPEND)) &&
 792                                         (pstatus & PORT_PE) &&
 793                                         ehci->reset_done[i] == 0))
 794                                 continue;
 795
 796                         /* start USB_RESUME_TIMEOUT msec resume signaling from
 797                          * this port, and make hub_wq collect
 798                          * PORT_STAT_C_SUSPEND to stop that signaling.
 799                          */
 800                         ehci->reset_done[i] = jiffies +
 801                                 msecs_to_jiffies(USB_RESUME_TIMEOUT);
 802                         set_bit(i, &ehci->resuming_ports);
 803                         ehci_dbg (ehci, "port %d remote wakeup\n", i + 1);
 804                         usb_hcd_start_port_resume(&hcd->self, i);
 805                         mod_timer(&hcd->rh_timer, ehci->reset_done[i]);
 806                 }
 807         }
 808
 809         /* PCI errors [4.15.2.4] */
 810         if (unlikely ((status & STS_FATAL) != 0)) {
 811                 ehci_err(ehci, "fatal error\n");
 812                 dbg_cmd(ehci, "fatal", cmd);
 813                 dbg_status(ehci, "fatal", status);
 814 dead:
 815                 usb_hc_died(hcd);
 816
 817                 /* Don't let the controller do anything more */
 818                 ehci->shutdown = true;
 819                 ehci->rh_state = EHCI_RH_STOPPING;
 820                 ehci->command &= ~(CMD_RUN | CMD_ASE | CMD_PSE);
 821                 ehci_writel(ehci, ehci->command, &ehci->regs->command);
 822                 ehci_writel(ehci, 0, &ehci->regs->intr_enable);
 823                 ehci_handle_controller_death(ehci);
 824
 825                 /* Handle completions when the controller stops */
 826                 bh = 0;
 827         }
 828
 829         if (bh)
 830                 ehci_work (ehci);
 831         spin_unlock_irqrestore(&ehci->lock, flags);
 832         if (pcd_status)
 833                 usb_hcd_poll_rh_status(hcd);
 834         return IRQ_HANDLED;
 835 }
 836
 837 /*-------------------------------------------------------------------------*/
 838
 839 /*
 840  * non-error returns are a promise to giveback() the urb later
 841  * we drop ownership so next owner (or urb unlink) can get it
 842  *
 843  * urb + dev is in hcd.self.controller.urb_list
 844  * we're queueing TDs onto software and hardware lists
 845  *
 846  * hcd-specific init for hcpriv hasn't been done yet
 847  *
 848  * NOTE:  control, bulk, and interrupt share the same code to append TDs
 849  * to a (possibly active) QH, and the same QH scanning code.
 850  */
 851 static int ehci_urb_enqueue (
 852         struct usb_hcd  *hcd,
 853         struct urb      *urb,
 854         gfp_t           mem_flags
 855 ) {
 856         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 857         struct list_head        qtd_list;
 858
 859         INIT_LIST_HEAD (&qtd_list);
 860
 861         switch (usb_pipetype (urb->pipe)) {
 862         case PIPE_CONTROL:
 863                 /* qh_completions() code doesn't handle all the fault cases
 864                  * in multi-TD control transfers.  Even 1KB is rare anyway.
 865                  */
 866                 if (urb->transfer_buffer_length > (16 * 1024))
 867                         return -EMSGSIZE;
 868                 /* FALLTHROUGH */
 869         /* case PIPE_BULK: */
 870         default:
 871                 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
 872                         return -ENOMEM;
 873                 return submit_async(ehci, urb, &qtd_list, mem_flags);
 874
 875         case PIPE_INTERRUPT:
 876                 if (!qh_urb_transaction (ehci, urb, &qtd_list, mem_flags))
 877                         return -ENOMEM;
 878                 return intr_submit(ehci, urb, &qtd_list, mem_flags);
 879
 880         case PIPE_ISOCHRONOUS:
 881                 if (urb->dev->speed == USB_SPEED_HIGH)
 882                         return itd_submit (ehci, urb, mem_flags);
 883                 else
 884                         return sitd_submit (ehci, urb, mem_flags);
 885         }
 886 }
 887
 888 /* remove from hardware lists
 889  * completions normally happen asynchronously
 890  */
 891
 892 static int ehci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
 893 {
 894         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 895         struct ehci_qh          *qh;
 896         unsigned long           flags;
 897         int                     rc;
 898
 899         spin_lock_irqsave (&ehci->lock, flags);
 900         rc = usb_hcd_check_unlink_urb(hcd, urb, status);
 901         if (rc)
 902                 goto done;
 903
 904         if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) {
 905                 /*
 906                  * We don't expedite dequeue for isochronous URBs.
 907                  * Just wait until they complete normally or their
 908                  * time slot expires.
 909                  */
 910         } else {
 911                 qh = (struct ehci_qh *) urb->hcpriv;
 912                 qh->exception = 1;
 913                 switch (qh->qh_state) {
 914                 case QH_STATE_LINKED:
 915                         if (usb_pipetype(urb->pipe) == PIPE_INTERRUPT)
 916                                 start_unlink_intr(ehci, qh);
 917                         else
 918                                 start_unlink_async(ehci, qh);
 919                         break;
 920                 case QH_STATE_COMPLETING:
 921                         qh->dequeue_during_giveback = 1;
 922                         break;
 923                 case QH_STATE_UNLINK:
 924                 case QH_STATE_UNLINK_WAIT:
 925                         /* already started */
 926                         break;
 927                 case QH_STATE_IDLE:
 928                         /* QH might be waiting for a Clear-TT-Buffer */
 929                         qh_completions(ehci, qh);
 930                         break;
 931                 }
 932         }
 933 done:
 934         spin_unlock_irqrestore (&ehci->lock, flags);
 935         return rc;
 936 }
 937
 938 /*-------------------------------------------------------------------------*/
 939
 940 // bulk qh holds the data toggle
 941
 942 static void
 943 ehci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
 944 {
 945         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
 946         unsigned long           flags;
 947         struct ehci_qh          *qh;
 948
 949         /* ASSERT:  any requests/urbs are being unlinked */
 950         /* ASSERT:  nobody can be submitting urbs for this any more */
 951
 952 rescan:
 953         spin_lock_irqsave (&ehci->lock, flags);
 954         qh = ep->hcpriv;
 955         if (!qh)
 956                 goto done;
 957
 958         /* endpoints can be iso streams.  for now, we don't
 959          * accelerate iso completions ... so spin a while.
 960          */
 961         if (qh->hw == NULL) {
 962                 struct ehci_iso_stream  *stream = ep->hcpriv;
 963
 964                 if (!list_empty(&stream->td_list))
 965                         goto idle_timeout;
 966
 967                 /* BUG_ON(!list_empty(&stream->free_list)); */
 968                 reserve_release_iso_bandwidth(ehci, stream, -1);
 969                 kfree(stream);
 970                 goto done;
 971         }
 972
 973         qh->exception = 1;
 974         switch (qh->qh_state) {
 975         case QH_STATE_LINKED:
 976                 WARN_ON(!list_empty(&qh->qtd_list));
 977                 if (usb_endpoint_type(&ep->desc) != USB_ENDPOINT_XFER_INT)
 978                         start_unlink_async(ehci, qh);
 979                 else
 980                         start_unlink_intr(ehci, qh);
 981                 /* FALL THROUGH */
 982         case QH_STATE_COMPLETING:       /* already in unlinking */
 983         case QH_STATE_UNLINK:           /* wait for hw to finish? */
 984         case QH_STATE_UNLINK_WAIT:
 985 idle_timeout:
 986                 spin_unlock_irqrestore (&ehci->lock, flags);
 987                 schedule_timeout_uninterruptible(1);
 988                 goto rescan;
 989         case QH_STATE_IDLE:             /* fully unlinked */
 990                 if (qh->clearing_tt)
 991                         goto idle_timeout;
 992                 if (list_empty (&qh->qtd_list)) {
 993                         if (qh->ps.bw_uperiod)
 994                                 reserve_release_intr_bandwidth(ehci, qh, -1);
 995                         qh_destroy(ehci, qh);
 996                         break;
 997                 }
 998                 /* else FALL THROUGH */
 999         default:
1000                 /* caller was supposed to have unlinked any requests;
1001                  * that's not our job.  just leak this memory.
1002                  */
1003                 ehci_err (ehci, "qh %p (#%02x) state %d%s\n",
1004                         qh, ep->desc.bEndpointAddress, qh->qh_state,
1005                         list_empty (&qh->qtd_list) ? "" : "(has tds)");
1006                 break;
1007         }
1008  done:
1009         ep->hcpriv = NULL;
1010         spin_unlock_irqrestore (&ehci->lock, flags);
1011 }
1012
1013 static void
1014 ehci_endpoint_reset(struct usb_hcd *hcd, struct usb_host_endpoint *ep)
1015 {
1016         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
1017         struct ehci_qh          *qh;
1018         int                     eptype = usb_endpoint_type(&ep->desc);
1019         int                     epnum = usb_endpoint_num(&ep->desc);
1020         int                     is_out = usb_endpoint_dir_out(&ep->desc);
1021         unsigned long           flags;
1022
1023         if (eptype != USB_ENDPOINT_XFER_BULK && eptype != USB_ENDPOINT_XFER_INT)
1024                 return;
1025
1026         spin_lock_irqsave(&ehci->lock, flags);
1027         qh = ep->hcpriv;
1028
1029         /* For Bulk and Interrupt endpoints we maintain the toggle state
1030          * in the hardware; the toggle bits in udev aren't used at all.
1031          * When an endpoint is reset by usb_clear_halt() we must reset
1032          * the toggle bit in the QH.
1033          */
1034         if (qh) {
1035                 if (!list_empty(&qh->qtd_list)) {
1036                         WARN_ONCE(1, "clear_halt for a busy endpoint\n");
1037                 } else {
1038                         /* The toggle value in the QH can't be updated
1039                          * while the QH is active.  Unlink it now;
1040                          * re-linking will call qh_refresh().
1041                          */
1042                         usb_settoggle(qh->ps.udev, epnum, is_out, 0);
1043                         qh->exception = 1;
1044                         if (eptype == USB_ENDPOINT_XFER_BULK)
1045                                 start_unlink_async(ehci, qh);
1046                         else
1047                                 start_unlink_intr(ehci, qh);
1048                 }
1049         }
1050         spin_unlock_irqrestore(&ehci->lock, flags);
1051 }
1052
1053 static int ehci_get_frame (struct usb_hcd *hcd)
1054 {
1055         struct ehci_hcd         *ehci = hcd_to_ehci (hcd);
1056         return (ehci_read_frame_index(ehci) >> 3) % ehci->periodic_size;
1057 }
1058
1059 /*-------------------------------------------------------------------------*/
1060
1061 /* Device addition and removal */
1062
1063 static void ehci_remove_device(struct usb_hcd *hcd, struct usb_device *udev)
1064 {
1065         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
1066
1067         spin_lock_irq(&ehci->lock);
1068         drop_tt(udev);
1069         spin_unlock_irq(&ehci->lock);
1070 }
1071
1072 /*-------------------------------------------------------------------------*/
1073
1074 #ifdef  CONFIG_PM
1075
1076 /* suspend/resume, section 4.3 */
1077
1078 /* These routines handle the generic parts of controller suspend/resume */
1079
1080 int ehci_suspend(struct usb_hcd *hcd, bool do_wakeup)
1081 {
1082         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
1083
1084         if (time_before(jiffies, ehci->next_statechange))
1085                 msleep(10);
1086
1087         /*
1088          * Root hub was already suspended.  Disable IRQ emission and
1089          * mark HW unaccessible.  The PM and USB cores make sure that
1090          * the root hub is either suspended or stopped.
1091          */
1092         ehci_prepare_ports_for_controller_suspend(ehci, do_wakeup);
1093
1094         spin_lock_irq(&ehci->lock);
1095         ehci_writel(ehci, 0, &ehci->regs->intr_enable);
1096         (void) ehci_readl(ehci, &ehci->regs->intr_enable);
1097
1098         clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
1099         spin_unlock_irq(&ehci->lock);
1100
1101         synchronize_irq(hcd->irq);
1102
1103         /* Check for race with a wakeup request */
1104         if (do_wakeup && HCD_WAKEUP_PENDING(hcd)) {
1105                 ehci_resume(hcd, false);
1106                 return -EBUSY;
1107         }
1108
1109         return 0;
1110 }
1111 EXPORT_SYMBOL_GPL(ehci_suspend);
1112
1113 /* Returns 0 if power was preserved, 1 if power was lost */
1114 int ehci_resume(struct usb_hcd *hcd, bool force_reset)
1115 {
1116         struct ehci_hcd         *ehci = hcd_to_ehci(hcd);
1117
1118         if (time_before(jiffies, ehci->next_statechange))
1119                 msleep(100);
1120
1121         /* Mark hardware accessible again as we are back to full power by now */
1122         set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
1123
1124         if (ehci->shutdown)
1125                 return 0;               /* Controller is dead */
1126
1127         /*
1128          * If CF is still set and reset isn't forced
1129          * then we maintained suspend power.
1130          * Just undo the effect of ehci_suspend().
1131          */
1132         if (ehci_readl(ehci, &ehci->regs->configured_flag) == FLAG_CF &&
1133                         !force_reset) {
1134                 int     mask = INTR_MASK;
1135
1136                 ehci_prepare_ports_for_controller_resume(ehci);
1137
1138                 spin_lock_irq(&ehci->lock);
1139                 if (ehci->shutdown)
1140                         goto skip;
1141
1142                 if (!hcd->self.root_hub->do_remote_wakeup)
1143                         mask &= ~STS_PCD;
1144                 ehci_writel(ehci, mask, &ehci->regs->intr_enable);
1145                 ehci_readl(ehci, &ehci->regs->intr_enable);
1146  skip:
1147                 spin_unlock_irq(&ehci->lock);
1148                 return 0;
1149         }
1150
1151         /*
1152          * Else reset, to cope with power loss or resume from hibernation
1153          * having let the firmware kick in during reboot.
1154          */
1155         usb_root_hub_lost_power(hcd->self.root_hub);
1156         (void) ehci_halt(ehci);
1157         (void) ehci_reset(ehci);
1158
1159         spin_lock_irq(&ehci->lock);
1160         if (ehci->shutdown)
1161                 goto skip;
1162
1163         ehci_writel(ehci, ehci->command, &ehci->regs->command);
1164         ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
1165         ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
1166
1167         ehci->rh_state = EHCI_RH_SUSPENDED;
1168         spin_unlock_irq(&ehci->lock);
1169
1170         return 1;
1171 }
1172 EXPORT_SYMBOL_GPL(ehci_resume);
1173
1174 #endif
1175
1176 /*-------------------------------------------------------------------------*/
1177
1178 /*
1179  * Generic structure: This gets copied for platform drivers so that
1180  * individual entries can be overridden as needed.
1181  */
1182
1183 static const struct hc_driver ehci_hc_driver = {
1184         .description =          hcd_name,
1185         .product_desc =         "EHCI Host Controller",
1186         .hcd_priv_size =        sizeof(struct ehci_hcd),
1187
1188         /*
1189          * generic hardware linkage
1190          */
1191         .irq =                  ehci_irq,
1192         .flags =                HCD_MEMORY | HCD_USB2 | HCD_BH,
1193
1194         /*
1195          * basic lifecycle operations
1196          */
1197         .reset =                ehci_setup,
1198         .start =                ehci_run,
1199         .stop =                 ehci_stop,
1200         .shutdown =             ehci_shutdown,
1201
1202         /*
1203          * managing i/o requests and associated device resources
1204          */
1205         .urb_enqueue =          ehci_urb_enqueue,
1206         .urb_dequeue =          ehci_urb_dequeue,
1207         .endpoint_disable =     ehci_endpoint_disable,
1208         .endpoint_reset =       ehci_endpoint_reset,
1209         .clear_tt_buffer_complete =     ehci_clear_tt_buffer_complete,
1210
1211         /*
1212          * scheduling support
1213          */
1214         .get_frame_number =     ehci_get_frame,
1215
1216         /*
1217          * root hub support
1218          */
1219         .hub_status_data =      ehci_hub_status_data,
1220         .hub_control =          ehci_hub_control,
1221         .bus_suspend =          ehci_bus_suspend,
1222         .bus_resume =           ehci_bus_resume,
1223         .relinquish_port =      ehci_relinquish_port,
1224         .port_handed_over =     ehci_port_handed_over,
1225
1226         /*
1227          * device support
1228          */
1229         .free_dev =             ehci_remove_device,
1230 };
1231
1232 void ehci_init_driver(struct hc_driver *drv,
1233                 const struct ehci_driver_overrides *over)
1234 {
1235         /* Copy the generic table to drv and then apply the overrides */
1236         *drv = ehci_hc_driver;
1237
1238         if (over) {
1239                 drv->hcd_priv_size += over->extra_priv_size;
1240                 if (over->reset)
1241                         drv->reset = over->reset;
1242                 if (over->port_power)
1243                         drv->port_power = over->port_power;
1244         }
1245 }
1246 EXPORT_SYMBOL_GPL(ehci_init_driver);
1247
1248 /*-------------------------------------------------------------------------*/
1249
1250 MODULE_DESCRIPTION(DRIVER_DESC);
1251 MODULE_AUTHOR (DRIVER_AUTHOR);
1252 MODULE_LICENSE ("GPL");
1253
1254 #ifdef CONFIG_USB_EHCI_SH
1255 #include "ehci-sh.c"
1256 #define PLATFORM_DRIVER         ehci_hcd_sh_driver
1257 #endif
1258
1259 #ifdef CONFIG_PPC_PS3
1260 #include "ehci-ps3.c"
1261 #define PS3_SYSTEM_BUS_DRIVER   ps3_ehci_driver
1262 #endif
1263
1264 #ifdef CONFIG_USB_EHCI_HCD_PPC_OF
1265 #include "ehci-ppc-of.c"
1266 #define OF_PLATFORM_DRIVER      ehci_hcd_ppc_of_driver
1267 #endif
1268
1269 #ifdef CONFIG_XPS_USB_HCD_XILINX
1270 #include "ehci-xilinx-of.c"
1271 #define XILINX_OF_PLATFORM_DRIVER       ehci_hcd_xilinx_of_driver
1272 #endif
1273
1274 #ifdef CONFIG_TILE_USB
1275 #include "ehci-tilegx.c"
1276 #define PLATFORM_DRIVER         ehci_hcd_tilegx_driver
1277 #endif
1278
1279 #ifdef CONFIG_USB_EHCI_HCD_PMC_MSP
1280 #include "ehci-pmcmsp.c"
1281 #define PLATFORM_DRIVER         ehci_hcd_msp_driver
1282 #endif
1283
1284 #ifdef CONFIG_SPARC_LEON
1285 #include "ehci-grlib.c"
1286 #define PLATFORM_DRIVER         ehci_grlib_driver
1287 #endif
1288
1289 #ifdef CONFIG_USB_EHCI_MV
1290 #include "ehci-mv.c"
1291 #define        PLATFORM_DRIVER         ehci_mv_driver
1292 #endif
1293
1294 #ifdef CONFIG_MIPS_SEAD3
1295 #include "ehci-sead3.c"
1296 #define PLATFORM_DRIVER         ehci_hcd_sead3_driver
1297 #endif
1298
1299 static int __init ehci_hcd_init(void)
1300 {
1301         int retval = 0;
1302
1303         if (usb_disabled())
1304                 return -ENODEV;
1305
1306         printk(KERN_INFO "%s: " DRIVER_DESC "\n", hcd_name);
1307         set_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1308         if (test_bit(USB_UHCI_LOADED, &usb_hcds_loaded) ||
1309                         test_bit(USB_OHCI_LOADED, &usb_hcds_loaded))
1310                 printk(KERN_WARNING "Warning! ehci_hcd should always be loaded"
1311                                 " before uhci_hcd and ohci_hcd, not after\n");
1312
1313         pr_debug("%s: block sizes: qh %Zd qtd %Zd itd %Zd sitd %Zd\n",
1314                  hcd_name,
1315                  sizeof(struct ehci_qh), sizeof(struct ehci_qtd),
1316                  sizeof(struct ehci_itd), sizeof(struct ehci_sitd));
1317
1318 #ifdef CONFIG_DYNAMIC_DEBUG
1319         ehci_debug_root = debugfs_create_dir("ehci", usb_debug_root);
1320         if (!ehci_debug_root) {
1321                 retval = -ENOENT;
1322                 goto err_debug;
1323         }
1324 #endif
1325
1326 #ifdef PLATFORM_DRIVER
1327         retval = platform_driver_register(&PLATFORM_DRIVER);
1328         if (retval < 0)
1329                 goto clean0;
1330 #endif
1331
1332 #ifdef PS3_SYSTEM_BUS_DRIVER
1333         retval = ps3_ehci_driver_register(&PS3_SYSTEM_BUS_DRIVER);
1334         if (retval < 0)
1335                 goto clean2;
1336 #endif
1337
1338 #ifdef OF_PLATFORM_DRIVER
1339         retval = platform_driver_register(&OF_PLATFORM_DRIVER);
1340         if (retval < 0)
1341                 goto clean3;
1342 #endif
1343
1344 #ifdef XILINX_OF_PLATFORM_DRIVER
1345         retval = platform_driver_register(&XILINX_OF_PLATFORM_DRIVER);
1346         if (retval < 0)
1347                 goto clean4;
1348 #endif
1349         return retval;
1350
1351 #ifdef XILINX_OF_PLATFORM_DRIVER
1352         /* platform_driver_unregister(&XILINX_OF_PLATFORM_DRIVER); */
1353 clean4:
1354 #endif
1355 #ifdef OF_PLATFORM_DRIVER
1356         platform_driver_unregister(&OF_PLATFORM_DRIVER);
1357 clean3:
1358 #endif
1359 #ifdef PS3_SYSTEM_BUS_DRIVER
1360         ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1361 clean2:
1362 #endif
1363 #ifdef PLATFORM_DRIVER
1364         platform_driver_unregister(&PLATFORM_DRIVER);
1365 clean0:
1366 #endif
1367 #ifdef CONFIG_DYNAMIC_DEBUG
1368         debugfs_remove(ehci_debug_root);
1369         ehci_debug_root = NULL;
1370 err_debug:
1371 #endif
1372         clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1373         return retval;
1374 }
1375 module_init(ehci_hcd_init);
1376
1377 static void __exit ehci_hcd_cleanup(void)
1378 {
1379 #ifdef XILINX_OF_PLATFORM_DRIVER
1380         platform_driver_unregister(&XILINX_OF_PLATFORM_DRIVER);
1381 #endif
1382 #ifdef OF_PLATFORM_DRIVER
1383         platform_driver_unregister(&OF_PLATFORM_DRIVER);
1384 #endif
1385 #ifdef PLATFORM_DRIVER
1386         platform_driver_unregister(&PLATFORM_DRIVER);
1387 #endif
1388 #ifdef PS3_SYSTEM_BUS_DRIVER
1389         ps3_ehci_driver_unregister(&PS3_SYSTEM_BUS_DRIVER);
1390 #endif
1391 #ifdef CONFIG_DYNAMIC_DEBUG
1392         debugfs_remove(ehci_debug_root);
1393 #endif
1394         clear_bit(USB_EHCI_LOADED, &usb_hcds_loaded);
1395 }
1396 module_exit(ehci_hcd_cleanup);