2 * Texas Instruments DSPS platforms "glue layer"
4 * Copyright (C) 2012, by Texas Instruments
6 * Based on the am35x "glue layer" code.
8 * This file is part of the Inventra Controller Driver for Linux.
10 * The Inventra Controller Driver for Linux is free software; you
11 * can redistribute it and/or modify it under the terms of the GNU
12 * General Public License version 2 as published by the Free Software
15 * The Inventra Controller Driver for Linux is distributed in
16 * the hope that it will be useful, but WITHOUT ANY WARRANTY;
17 * without even the implied warranty of MERCHANTABILITY or
18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
19 * License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with The Inventra Controller Driver for Linux ; if not,
23 * write to the Free Software Foundation, Inc., 59 Temple Place,
24 * Suite 330, Boston, MA 02111-1307 USA
26 * musb_dsps.c will be a common file for all the TI DSPS platforms
27 * such as dm64x, dm36x, dm35x, da8x, am35x and ti81x.
28 * For now only ti81x is using this and in future davinci.c, am35x.c
29 * da8xx.c would be merged to this file after testing.
33 #include <linux/err.h>
34 #include <linux/platform_device.h>
35 #include <linux/dma-mapping.h>
36 #include <linux/pm_runtime.h>
37 #include <linux/module.h>
38 #include <linux/usb/usb_phy_generic.h>
39 #include <linux/platform_data/usb-omap.h>
40 #include <linux/sizes.h>
43 #include <linux/of_device.h>
44 #include <linux/of_address.h>
45 #include <linux/of_irq.h>
46 #include <linux/usb/of.h>
48 #include <linux/debugfs.h>
50 #include "musb_core.h"
52 static const struct of_device_id musb_dsps_of_match[];
55 * avoid using musb_readx()/musb_writex() as glue layer should not be
56 * dependent on musb core layer symbols.
58 static inline u8 dsps_readb(const void __iomem *addr, unsigned offset)
60 return __raw_readb(addr + offset);
63 static inline u32 dsps_readl(const void __iomem *addr, unsigned offset)
65 return __raw_readl(addr + offset);
68 static inline void dsps_writeb(void __iomem *addr, unsigned offset, u8 data)
70 __raw_writeb(data, addr + offset);
73 static inline void dsps_writel(void __iomem *addr, unsigned offset, u32 data)
75 __raw_writel(data, addr + offset);
79 * DSPS musb wrapper register offset.
80 * FIXME: This should be expanded to have all the wrapper registers from TI DSPS
83 struct dsps_musb_wrapper {
98 /* bit positions for control */
101 /* bit positions for interrupt */
102 unsigned usb_shift:5;
107 unsigned txep_shift:5;
111 unsigned rxep_shift:5;
115 /* bit positions for phy_utmi */
116 unsigned otg_disable:5;
118 /* bit positions for mode */
120 unsigned iddig_mux:5;
121 /* miscellaneous stuff */
126 * register shadow for suspend
128 struct dsps_context {
139 * DSPS glue structure.
143 struct platform_device *musb; /* child musb pdev */
144 const struct dsps_musb_wrapper *wrp; /* wrapper register offsets */
145 struct timer_list timer; /* otg_workaround timer */
146 unsigned long last_timer; /* last timer data for each instance */
148 struct dsps_context context;
149 struct debugfs_regset32 regset;
150 struct dentry *dbgfs_root;
153 static const struct debugfs_reg32 dsps_musb_regs[] = {
154 { "revision", 0x00 },
158 { "intr0_stat", 0x30 },
159 { "intr1_stat", 0x34 },
160 { "intr0_set", 0x38 },
161 { "intr1_set", 0x3c },
165 { "srpfixtime", 0xd4 },
167 { "phy_utmi", 0xe0 },
171 static void dsps_musb_try_idle(struct musb *musb, unsigned long timeout)
173 struct device *dev = musb->controller;
174 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
177 timeout = jiffies + msecs_to_jiffies(3);
179 /* Never idle if active, or when VBUS timeout is not set as host */
180 if (musb->is_active || (musb->a_wait_bcon == 0 &&
181 musb->xceiv->state == OTG_STATE_A_WAIT_BCON)) {
182 dev_dbg(musb->controller, "%s active, deleting timer\n",
183 usb_otg_state_string(musb->xceiv->state));
184 del_timer(&glue->timer);
185 glue->last_timer = jiffies;
188 if (musb->port_mode != MUSB_PORT_MODE_DUAL_ROLE)
191 if (!musb->g.dev.driver)
194 if (time_after(glue->last_timer, timeout) &&
195 timer_pending(&glue->timer)) {
196 dev_dbg(musb->controller,
197 "Longer idle timer already pending, ignoring...\n");
200 glue->last_timer = timeout;
202 dev_dbg(musb->controller, "%s inactive, starting idle timer for %u ms\n",
203 usb_otg_state_string(musb->xceiv->state),
204 jiffies_to_msecs(timeout - jiffies));
205 mod_timer(&glue->timer, timeout);
209 * dsps_musb_enable - enable interrupts
211 static void dsps_musb_enable(struct musb *musb)
213 struct device *dev = musb->controller;
214 struct platform_device *pdev = to_platform_device(dev->parent);
215 struct dsps_glue *glue = platform_get_drvdata(pdev);
216 const struct dsps_musb_wrapper *wrp = glue->wrp;
217 void __iomem *reg_base = musb->ctrl_base;
218 u32 epmask, coremask;
220 /* Workaround: setup IRQs through both register sets. */
221 epmask = ((musb->epmask & wrp->txep_mask) << wrp->txep_shift) |
222 ((musb->epmask & wrp->rxep_mask) << wrp->rxep_shift);
223 coremask = (wrp->usb_bitmap & ~MUSB_INTR_SOF);
225 dsps_writel(reg_base, wrp->epintr_set, epmask);
226 dsps_writel(reg_base, wrp->coreintr_set, coremask);
227 /* Force the DRVVBUS IRQ so we can start polling for ID change. */
228 dsps_writel(reg_base, wrp->coreintr_set,
229 (1 << wrp->drvvbus) << wrp->usb_shift);
230 dsps_musb_try_idle(musb, 0);
234 * dsps_musb_disable - disable HDRC and flush interrupts
236 static void dsps_musb_disable(struct musb *musb)
238 struct device *dev = musb->controller;
239 struct platform_device *pdev = to_platform_device(dev->parent);
240 struct dsps_glue *glue = platform_get_drvdata(pdev);
241 const struct dsps_musb_wrapper *wrp = glue->wrp;
242 void __iomem *reg_base = musb->ctrl_base;
244 dsps_writel(reg_base, wrp->coreintr_clear, wrp->usb_bitmap);
245 dsps_writel(reg_base, wrp->epintr_clear,
246 wrp->txep_bitmap | wrp->rxep_bitmap);
247 dsps_writeb(musb->mregs, MUSB_DEVCTL, 0);
250 static void otg_timer(unsigned long _musb)
252 struct musb *musb = (void *)_musb;
253 void __iomem *mregs = musb->mregs;
254 struct device *dev = musb->controller;
255 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
256 const struct dsps_musb_wrapper *wrp = glue->wrp;
259 int skip_session = 0;
262 * We poll because DSPS IP's won't expose several OTG-critical
263 * status change events (from the transceiver) otherwise.
265 devctl = dsps_readb(mregs, MUSB_DEVCTL);
266 dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl,
267 usb_otg_state_string(musb->xceiv->state));
269 spin_lock_irqsave(&musb->lock, flags);
270 switch (musb->xceiv->state) {
271 case OTG_STATE_A_WAIT_BCON:
272 dsps_writeb(musb->mregs, MUSB_DEVCTL, 0);
276 case OTG_STATE_A_IDLE:
277 case OTG_STATE_B_IDLE:
278 if (devctl & MUSB_DEVCTL_BDEVICE) {
279 musb->xceiv->state = OTG_STATE_B_IDLE;
282 musb->xceiv->state = OTG_STATE_A_IDLE;
285 if (!(devctl & MUSB_DEVCTL_SESSION) && !skip_session)
286 dsps_writeb(mregs, MUSB_DEVCTL, MUSB_DEVCTL_SESSION);
287 mod_timer(&glue->timer, jiffies + wrp->poll_seconds * HZ);
289 case OTG_STATE_A_WAIT_VFALL:
290 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
291 dsps_writel(musb->ctrl_base, wrp->coreintr_set,
292 MUSB_INTR_VBUSERROR << wrp->usb_shift);
297 spin_unlock_irqrestore(&musb->lock, flags);
300 static irqreturn_t dsps_interrupt(int irq, void *hci)
302 struct musb *musb = hci;
303 void __iomem *reg_base = musb->ctrl_base;
304 struct device *dev = musb->controller;
305 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
306 const struct dsps_musb_wrapper *wrp = glue->wrp;
308 irqreturn_t ret = IRQ_NONE;
311 spin_lock_irqsave(&musb->lock, flags);
313 /* Get endpoint interrupts */
314 epintr = dsps_readl(reg_base, wrp->epintr_status);
315 musb->int_rx = (epintr & wrp->rxep_bitmap) >> wrp->rxep_shift;
316 musb->int_tx = (epintr & wrp->txep_bitmap) >> wrp->txep_shift;
319 dsps_writel(reg_base, wrp->epintr_status, epintr);
321 /* Get usb core interrupts */
322 usbintr = dsps_readl(reg_base, wrp->coreintr_status);
323 if (!usbintr && !epintr)
326 musb->int_usb = (usbintr & wrp->usb_bitmap) >> wrp->usb_shift;
328 dsps_writel(reg_base, wrp->coreintr_status, usbintr);
330 dev_dbg(musb->controller, "usbintr (%x) epintr(%x)\n",
333 * DRVVBUS IRQs are the only proxy we have (a very poor one!) for
334 * DSPS IP's missing ID change IRQ. We need an ID change IRQ to
335 * switch appropriately between halves of the OTG state machine.
336 * Managing DEVCTL.SESSION per Mentor docs requires that we know its
337 * value but DEVCTL.BDEVICE is invalid without DEVCTL.SESSION set.
338 * Also, DRVVBUS pulses for SRP (but not at 5V) ...
340 if (is_host_active(musb) && usbintr & MUSB_INTR_BABBLE) {
341 pr_info("CAUTION: musb: Babble Interrupt Occurred\n");
344 * When a babble condition occurs, the musb controller removes
345 * the session and is no longer in host mode. Hence, all
346 * devices connected to its root hub get disconnected.
348 * Hand this error down to the musb core isr, so it can
351 musb->int_usb = MUSB_INTR_BABBLE | MUSB_INTR_DISCONNECT;
352 musb->int_tx = musb->int_rx = 0;
355 if (usbintr & ((1 << wrp->drvvbus) << wrp->usb_shift)) {
356 int drvvbus = dsps_readl(reg_base, wrp->status);
357 void __iomem *mregs = musb->mregs;
358 u8 devctl = dsps_readb(mregs, MUSB_DEVCTL);
361 err = musb->int_usb & MUSB_INTR_VBUSERROR;
364 * The Mentor core doesn't debounce VBUS as needed
365 * to cope with device connect current spikes. This
366 * means it's not uncommon for bus-powered devices
367 * to get VBUS errors during enumeration.
369 * This is a workaround, but newer RTL from Mentor
370 * seems to allow a better one: "re"-starting sessions
371 * without waiting for VBUS to stop registering in
374 musb->int_usb &= ~MUSB_INTR_VBUSERROR;
375 musb->xceiv->state = OTG_STATE_A_WAIT_VFALL;
376 mod_timer(&glue->timer,
377 jiffies + wrp->poll_seconds * HZ);
378 WARNING("VBUS error workaround (delay coming)\n");
379 } else if (drvvbus) {
381 musb->xceiv->otg->default_a = 1;
382 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
383 del_timer(&glue->timer);
387 musb->xceiv->otg->default_a = 0;
388 musb->xceiv->state = OTG_STATE_B_IDLE;
391 /* NOTE: this must complete power-on within 100 ms. */
392 dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n",
393 drvvbus ? "on" : "off",
394 usb_otg_state_string(musb->xceiv->state),
400 if (musb->int_tx || musb->int_rx || musb->int_usb)
401 ret |= musb_interrupt(musb);
403 /* Poll for ID change in OTG port mode */
404 if (musb->xceiv->state == OTG_STATE_B_IDLE &&
405 musb->port_mode == MUSB_PORT_MODE_DUAL_ROLE)
406 mod_timer(&glue->timer, jiffies + wrp->poll_seconds * HZ);
408 spin_unlock_irqrestore(&musb->lock, flags);
413 static int dsps_musb_dbg_init(struct musb *musb, struct dsps_glue *glue)
419 sprintf(buf, "%s.dsps", dev_name(musb->controller));
420 root = debugfs_create_dir(buf, NULL);
423 glue->dbgfs_root = root;
425 glue->regset.regs = dsps_musb_regs;
426 glue->regset.nregs = ARRAY_SIZE(dsps_musb_regs);
427 glue->regset.base = musb->ctrl_base;
429 file = debugfs_create_regset32("regdump", S_IRUGO, root, &glue->regset);
431 debugfs_remove_recursive(root);
437 static int dsps_musb_init(struct musb *musb)
439 struct device *dev = musb->controller;
440 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
441 struct platform_device *parent = to_platform_device(dev->parent);
442 const struct dsps_musb_wrapper *wrp = glue->wrp;
443 void __iomem *reg_base;
448 r = platform_get_resource_byname(parent, IORESOURCE_MEM, "control");
452 reg_base = devm_ioremap_resource(dev, r);
453 if (IS_ERR(reg_base))
454 return PTR_ERR(reg_base);
455 musb->ctrl_base = reg_base;
457 /* NOP driver needs change if supporting dual instance */
458 musb->xceiv = devm_usb_get_phy_by_phandle(dev, "phys", 0);
459 if (IS_ERR(musb->xceiv))
460 return PTR_ERR(musb->xceiv);
462 /* Returns zero if e.g. not clocked */
463 rev = dsps_readl(reg_base, wrp->revision);
467 usb_phy_init(musb->xceiv);
468 setup_timer(&glue->timer, otg_timer, (unsigned long) musb);
471 dsps_writel(reg_base, wrp->control, (1 << wrp->reset));
473 musb->isr = dsps_interrupt;
475 /* reset the otgdisable bit, needed for host mode to work */
476 val = dsps_readl(reg_base, wrp->phy_utmi);
477 val &= ~(1 << wrp->otg_disable);
478 dsps_writel(musb->ctrl_base, wrp->phy_utmi, val);
480 ret = dsps_musb_dbg_init(musb, glue);
487 static int dsps_musb_exit(struct musb *musb)
489 struct device *dev = musb->controller;
490 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
492 del_timer_sync(&glue->timer);
493 usb_phy_shutdown(musb->xceiv);
494 debugfs_remove_recursive(glue->dbgfs_root);
499 static int dsps_musb_set_mode(struct musb *musb, u8 mode)
501 struct device *dev = musb->controller;
502 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
503 const struct dsps_musb_wrapper *wrp = glue->wrp;
504 void __iomem *ctrl_base = musb->ctrl_base;
507 reg = dsps_readl(ctrl_base, wrp->mode);
511 reg &= ~(1 << wrp->iddig);
514 * if we're setting mode to host-only or device-only, we're
515 * going to ignore whatever the PHY sends us and just force
516 * ID pin status by SW
518 reg |= (1 << wrp->iddig_mux);
520 dsps_writel(ctrl_base, wrp->mode, reg);
521 dsps_writel(ctrl_base, wrp->phy_utmi, 0x02);
523 case MUSB_PERIPHERAL:
524 reg |= (1 << wrp->iddig);
527 * if we're setting mode to host-only or device-only, we're
528 * going to ignore whatever the PHY sends us and just force
529 * ID pin status by SW
531 reg |= (1 << wrp->iddig_mux);
533 dsps_writel(ctrl_base, wrp->mode, reg);
536 dsps_writel(ctrl_base, wrp->phy_utmi, 0x02);
539 dev_err(glue->dev, "unsupported mode %d\n", mode);
546 static void dsps_musb_reset(struct musb *musb)
548 struct device *dev = musb->controller;
549 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
550 const struct dsps_musb_wrapper *wrp = glue->wrp;
552 dsps_writel(musb->ctrl_base, wrp->control, (1 << wrp->reset));
556 static struct musb_platform_ops dsps_ops = {
557 .init = dsps_musb_init,
558 .exit = dsps_musb_exit,
560 .enable = dsps_musb_enable,
561 .disable = dsps_musb_disable,
563 .try_idle = dsps_musb_try_idle,
564 .set_mode = dsps_musb_set_mode,
565 .reset = dsps_musb_reset,
568 static u64 musb_dmamask = DMA_BIT_MASK(32);
570 static int get_int_prop(struct device_node *dn, const char *s)
575 ret = of_property_read_u32(dn, s, &val);
581 static int get_musb_port_mode(struct device *dev)
583 enum usb_dr_mode mode;
585 mode = of_usb_get_dr_mode(dev->of_node);
587 case USB_DR_MODE_HOST:
588 return MUSB_PORT_MODE_HOST;
590 case USB_DR_MODE_PERIPHERAL:
591 return MUSB_PORT_MODE_GADGET;
593 case USB_DR_MODE_UNKNOWN:
594 case USB_DR_MODE_OTG:
596 return MUSB_PORT_MODE_DUAL_ROLE;
600 static int dsps_create_musb_pdev(struct dsps_glue *glue,
601 struct platform_device *parent)
603 struct musb_hdrc_platform_data pdata;
604 struct resource resources[2];
605 struct resource *res;
606 struct device *dev = &parent->dev;
607 struct musb_hdrc_config *config;
608 struct platform_device *musb;
609 struct device_node *dn = parent->dev.of_node;
612 memset(resources, 0, sizeof(resources));
613 res = platform_get_resource_byname(parent, IORESOURCE_MEM, "mc");
615 dev_err(dev, "failed to get memory.\n");
620 res = platform_get_resource_byname(parent, IORESOURCE_IRQ, "mc");
622 dev_err(dev, "failed to get irq.\n");
627 /* allocate the child platform device */
628 musb = platform_device_alloc("musb-hdrc", PLATFORM_DEVID_AUTO);
630 dev_err(dev, "failed to allocate musb device\n");
634 musb->dev.parent = dev;
635 musb->dev.dma_mask = &musb_dmamask;
636 musb->dev.coherent_dma_mask = musb_dmamask;
637 musb->dev.of_node = of_node_get(dn);
641 ret = platform_device_add_resources(musb, resources,
642 ARRAY_SIZE(resources));
644 dev_err(dev, "failed to add resources\n");
648 config = devm_kzalloc(&parent->dev, sizeof(*config), GFP_KERNEL);
650 dev_err(dev, "failed to allocate musb hdrc config\n");
654 pdata.config = config;
655 pdata.platform_ops = &dsps_ops;
657 config->num_eps = get_int_prop(dn, "mentor,num-eps");
658 config->ram_bits = get_int_prop(dn, "mentor,ram-bits");
659 config->host_port_deassert_reset_at_resume = 1;
660 pdata.mode = get_musb_port_mode(dev);
661 /* DT keeps this entry in mA, musb expects it as per USB spec */
662 pdata.power = get_int_prop(dn, "mentor,power") / 2;
663 config->multipoint = of_property_read_bool(dn, "mentor,multipoint");
665 ret = platform_device_add_data(musb, &pdata, sizeof(pdata));
667 dev_err(dev, "failed to add platform_data\n");
671 ret = platform_device_add(musb);
673 dev_err(dev, "failed to register musb device\n");
679 platform_device_put(musb);
683 static int dsps_probe(struct platform_device *pdev)
685 const struct of_device_id *match;
686 const struct dsps_musb_wrapper *wrp;
687 struct dsps_glue *glue;
690 if (!strcmp(pdev->name, "musb-hdrc"))
693 match = of_match_node(musb_dsps_of_match, pdev->dev.of_node);
695 dev_err(&pdev->dev, "fail to get matching of_match struct\n");
701 glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL);
703 dev_err(&pdev->dev, "unable to allocate glue memory\n");
707 glue->dev = &pdev->dev;
710 platform_set_drvdata(pdev, glue);
711 pm_runtime_enable(&pdev->dev);
713 ret = pm_runtime_get_sync(&pdev->dev);
715 dev_err(&pdev->dev, "pm_runtime_get_sync FAILED");
719 ret = dsps_create_musb_pdev(glue, pdev);
726 pm_runtime_put(&pdev->dev);
728 pm_runtime_disable(&pdev->dev);
732 static int dsps_remove(struct platform_device *pdev)
734 struct dsps_glue *glue = platform_get_drvdata(pdev);
736 platform_device_unregister(glue->musb);
738 /* disable usbss clocks */
739 pm_runtime_put(&pdev->dev);
740 pm_runtime_disable(&pdev->dev);
745 static const struct dsps_musb_wrapper am33xx_driver_data = {
750 .epintr_clear = 0x40,
751 .epintr_status = 0x30,
752 .coreintr_set = 0x3c,
753 .coreintr_clear = 0x44,
754 .coreintr_status = 0x34,
765 .usb_bitmap = (0x1ff << 0),
769 .txep_bitmap = (0xffff << 0),
772 .rxep_bitmap = (0xfffe << 16),
776 static const struct of_device_id musb_dsps_of_match[] = {
777 { .compatible = "ti,musb-am33xx",
778 .data = (void *) &am33xx_driver_data, },
781 MODULE_DEVICE_TABLE(of, musb_dsps_of_match);
783 #ifdef CONFIG_PM_SLEEP
784 static int dsps_suspend(struct device *dev)
786 struct dsps_glue *glue = dev_get_drvdata(dev);
787 const struct dsps_musb_wrapper *wrp = glue->wrp;
788 struct musb *musb = platform_get_drvdata(glue->musb);
789 void __iomem *mbase = musb->ctrl_base;
791 glue->context.control = dsps_readl(mbase, wrp->control);
792 glue->context.epintr = dsps_readl(mbase, wrp->epintr_set);
793 glue->context.coreintr = dsps_readl(mbase, wrp->coreintr_set);
794 glue->context.phy_utmi = dsps_readl(mbase, wrp->phy_utmi);
795 glue->context.mode = dsps_readl(mbase, wrp->mode);
796 glue->context.tx_mode = dsps_readl(mbase, wrp->tx_mode);
797 glue->context.rx_mode = dsps_readl(mbase, wrp->rx_mode);
802 static int dsps_resume(struct device *dev)
804 struct dsps_glue *glue = dev_get_drvdata(dev);
805 const struct dsps_musb_wrapper *wrp = glue->wrp;
806 struct musb *musb = platform_get_drvdata(glue->musb);
807 void __iomem *mbase = musb->ctrl_base;
809 dsps_writel(mbase, wrp->control, glue->context.control);
810 dsps_writel(mbase, wrp->epintr_set, glue->context.epintr);
811 dsps_writel(mbase, wrp->coreintr_set, glue->context.coreintr);
812 dsps_writel(mbase, wrp->phy_utmi, glue->context.phy_utmi);
813 dsps_writel(mbase, wrp->mode, glue->context.mode);
814 dsps_writel(mbase, wrp->tx_mode, glue->context.tx_mode);
815 dsps_writel(mbase, wrp->rx_mode, glue->context.rx_mode);
821 static SIMPLE_DEV_PM_OPS(dsps_pm_ops, dsps_suspend, dsps_resume);
823 static struct platform_driver dsps_usbss_driver = {
825 .remove = dsps_remove,
829 .of_match_table = musb_dsps_of_match,
833 MODULE_DESCRIPTION("TI DSPS MUSB Glue Layer");
834 MODULE_AUTHOR("Ravi B <ravibabu@ti.com>");
835 MODULE_AUTHOR("Ajay Kumar Gupta <ajay.gupta@ti.com>");
836 MODULE_LICENSE("GPL v2");
838 module_platform_driver(dsps_usbss_driver);