2 * Texas Instruments DSPS platforms "glue layer"
4 * Copyright (C) 2012, by Texas Instruments
6 * Based on the am35x "glue layer" code.
8 * This file is part of the Inventra Controller Driver for Linux.
10 * The Inventra Controller Driver for Linux is free software; you
11 * can redistribute it and/or modify it under the terms of the GNU
12 * General Public License version 2 as published by the Free Software
15 * The Inventra Controller Driver for Linux is distributed in
16 * the hope that it will be useful, but WITHOUT ANY WARRANTY;
17 * without even the implied warranty of MERCHANTABILITY or
18 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
19 * License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with The Inventra Controller Driver for Linux ; if not,
23 * write to the Free Software Foundation, Inc., 59 Temple Place,
24 * Suite 330, Boston, MA 02111-1307 USA
26 * musb_dsps.c will be a common file for all the TI DSPS platforms
27 * such as dm64x, dm36x, dm35x, da8x, am35x and ti81x.
28 * For now only ti81x is using this and in future davinci.c, am35x.c
29 * da8xx.c would be merged to this file after testing.
32 #include <linux/init.h>
34 #include <linux/err.h>
35 #include <linux/platform_device.h>
36 #include <linux/dma-mapping.h>
37 #include <linux/pm_runtime.h>
38 #include <linux/module.h>
39 #include <linux/usb/nop-usb-xceiv.h>
40 #include <linux/platform_data/usb-omap.h>
43 #include <linux/of_device.h>
44 #include <linux/of_address.h>
46 #include "musb_core.h"
49 static const struct of_device_id musb_dsps_of_match[];
53 * avoid using musb_readx()/musb_writex() as glue layer should not be
54 * dependent on musb core layer symbols.
56 static inline u8 dsps_readb(const void __iomem *addr, unsigned offset)
57 { return __raw_readb(addr + offset); }
59 static inline u32 dsps_readl(const void __iomem *addr, unsigned offset)
60 { return __raw_readl(addr + offset); }
62 static inline void dsps_writeb(void __iomem *addr, unsigned offset, u8 data)
63 { __raw_writeb(data, addr + offset); }
65 static inline void dsps_writel(void __iomem *addr, unsigned offset, u32 data)
66 { __raw_writel(data, addr + offset); }
69 * DSPS musb wrapper register offset.
70 * FIXME: This should be expanded to have all the wrapper registers from TI DSPS
73 struct dsps_musb_wrapper {
87 /* bit positions for control */
90 /* bit positions for interrupt */
96 unsigned txep_shift:5;
100 unsigned rxep_shift:5;
104 /* bit positions for phy_utmi */
105 unsigned otg_disable:5;
107 /* bit positions for mode */
109 /* miscellaneous stuff */
110 u32 musb_core_offset;
112 /* number of musb instances */
117 * DSPS glue structure.
121 struct platform_device *musb[2]; /* child musb pdev */
122 const struct dsps_musb_wrapper *wrp; /* wrapper register offsets */
123 struct timer_list timer[2]; /* otg_workaround timer */
124 unsigned long last_timer[2]; /* last timer data for each instance */
125 u32 __iomem *usb_ctrl[2];
128 #define DSPS_AM33XX_CONTROL_MODULE_PHYS_0 0x44e10620
129 #define DSPS_AM33XX_CONTROL_MODULE_PHYS_1 0x44e10628
131 static const resource_size_t dsps_control_module_phys[] = {
132 DSPS_AM33XX_CONTROL_MODULE_PHYS_0,
133 DSPS_AM33XX_CONTROL_MODULE_PHYS_1,
137 * musb_dsps_phy_control - phy on/off
138 * @glue: struct dsps_glue *
140 * @on: flag for phy to be switched on or off
142 * This is to enable the PHY using usb_ctrl register in system control
145 * XXX: This function will be removed once we have a seperate driver for
148 static void musb_dsps_phy_control(struct dsps_glue *glue, u8 id, u8 on)
152 usbphycfg = readl(glue->usb_ctrl[id]);
155 usbphycfg &= ~(USBPHY_CM_PWRDN | USBPHY_OTG_PWRDN);
156 usbphycfg |= USBPHY_OTGVDET_EN | USBPHY_OTGSESSEND_EN;
158 usbphycfg |= USBPHY_CM_PWRDN | USBPHY_OTG_PWRDN;
161 writel(usbphycfg, glue->usb_ctrl[id]);
164 * dsps_musb_enable - enable interrupts
166 static void dsps_musb_enable(struct musb *musb)
168 struct device *dev = musb->controller;
169 struct platform_device *pdev = to_platform_device(dev->parent);
170 struct dsps_glue *glue = platform_get_drvdata(pdev);
171 const struct dsps_musb_wrapper *wrp = glue->wrp;
172 void __iomem *reg_base = musb->ctrl_base;
173 u32 epmask, coremask;
175 /* Workaround: setup IRQs through both register sets. */
176 epmask = ((musb->epmask & wrp->txep_mask) << wrp->txep_shift) |
177 ((musb->epmask & wrp->rxep_mask) << wrp->rxep_shift);
178 coremask = (wrp->usb_bitmap & ~MUSB_INTR_SOF);
180 dsps_writel(reg_base, wrp->epintr_set, epmask);
181 dsps_writel(reg_base, wrp->coreintr_set, coremask);
182 /* Force the DRVVBUS IRQ so we can start polling for ID change. */
183 dsps_writel(reg_base, wrp->coreintr_set,
184 (1 << wrp->drvvbus) << wrp->usb_shift);
188 * dsps_musb_disable - disable HDRC and flush interrupts
190 static void dsps_musb_disable(struct musb *musb)
192 struct device *dev = musb->controller;
193 struct platform_device *pdev = to_platform_device(dev->parent);
194 struct dsps_glue *glue = platform_get_drvdata(pdev);
195 const struct dsps_musb_wrapper *wrp = glue->wrp;
196 void __iomem *reg_base = musb->ctrl_base;
198 dsps_writel(reg_base, wrp->coreintr_clear, wrp->usb_bitmap);
199 dsps_writel(reg_base, wrp->epintr_clear,
200 wrp->txep_bitmap | wrp->rxep_bitmap);
201 dsps_writeb(musb->mregs, MUSB_DEVCTL, 0);
202 dsps_writel(reg_base, wrp->eoi, 0);
205 static void otg_timer(unsigned long _musb)
207 struct musb *musb = (void *)_musb;
208 void __iomem *mregs = musb->mregs;
209 struct device *dev = musb->controller;
210 struct platform_device *pdev = to_platform_device(dev);
211 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
212 const struct dsps_musb_wrapper *wrp = glue->wrp;
217 * We poll because DSPS IP's won't expose several OTG-critical
218 * status change events (from the transceiver) otherwise.
220 devctl = dsps_readb(mregs, MUSB_DEVCTL);
221 dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl,
222 otg_state_string(musb->xceiv->state));
224 spin_lock_irqsave(&musb->lock, flags);
225 switch (musb->xceiv->state) {
226 case OTG_STATE_A_WAIT_BCON:
227 devctl &= ~MUSB_DEVCTL_SESSION;
228 dsps_writeb(musb->mregs, MUSB_DEVCTL, devctl);
230 devctl = dsps_readb(musb->mregs, MUSB_DEVCTL);
231 if (devctl & MUSB_DEVCTL_BDEVICE) {
232 musb->xceiv->state = OTG_STATE_B_IDLE;
235 musb->xceiv->state = OTG_STATE_A_IDLE;
239 case OTG_STATE_A_WAIT_VFALL:
240 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
241 dsps_writel(musb->ctrl_base, wrp->coreintr_set,
242 MUSB_INTR_VBUSERROR << wrp->usb_shift);
244 case OTG_STATE_B_IDLE:
245 devctl = dsps_readb(mregs, MUSB_DEVCTL);
246 if (devctl & MUSB_DEVCTL_BDEVICE)
247 mod_timer(&glue->timer[pdev->id],
248 jiffies + wrp->poll_seconds * HZ);
250 musb->xceiv->state = OTG_STATE_A_IDLE;
255 spin_unlock_irqrestore(&musb->lock, flags);
258 static void dsps_musb_try_idle(struct musb *musb, unsigned long timeout)
260 struct device *dev = musb->controller;
261 struct platform_device *pdev = to_platform_device(dev);
262 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
265 timeout = jiffies + msecs_to_jiffies(3);
267 /* Never idle if active, or when VBUS timeout is not set as host */
268 if (musb->is_active || (musb->a_wait_bcon == 0 &&
269 musb->xceiv->state == OTG_STATE_A_WAIT_BCON)) {
270 dev_dbg(musb->controller, "%s active, deleting timer\n",
271 otg_state_string(musb->xceiv->state));
272 del_timer(&glue->timer[pdev->id]);
273 glue->last_timer[pdev->id] = jiffies;
277 if (time_after(glue->last_timer[pdev->id], timeout) &&
278 timer_pending(&glue->timer[pdev->id])) {
279 dev_dbg(musb->controller,
280 "Longer idle timer already pending, ignoring...\n");
283 glue->last_timer[pdev->id] = timeout;
285 dev_dbg(musb->controller, "%s inactive, starting idle timer for %u ms\n",
286 otg_state_string(musb->xceiv->state),
287 jiffies_to_msecs(timeout - jiffies));
288 mod_timer(&glue->timer[pdev->id], timeout);
291 static irqreturn_t dsps_interrupt(int irq, void *hci)
293 struct musb *musb = hci;
294 void __iomem *reg_base = musb->ctrl_base;
295 struct device *dev = musb->controller;
296 struct platform_device *pdev = to_platform_device(dev);
297 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
298 const struct dsps_musb_wrapper *wrp = glue->wrp;
300 irqreturn_t ret = IRQ_NONE;
303 spin_lock_irqsave(&musb->lock, flags);
305 /* Get endpoint interrupts */
306 epintr = dsps_readl(reg_base, wrp->epintr_status);
307 musb->int_rx = (epintr & wrp->rxep_bitmap) >> wrp->rxep_shift;
308 musb->int_tx = (epintr & wrp->txep_bitmap) >> wrp->txep_shift;
311 dsps_writel(reg_base, wrp->epintr_status, epintr);
313 /* Get usb core interrupts */
314 usbintr = dsps_readl(reg_base, wrp->coreintr_status);
315 if (!usbintr && !epintr)
318 musb->int_usb = (usbintr & wrp->usb_bitmap) >> wrp->usb_shift;
320 dsps_writel(reg_base, wrp->coreintr_status, usbintr);
322 dev_dbg(musb->controller, "usbintr (%x) epintr(%x)\n",
325 * DRVVBUS IRQs are the only proxy we have (a very poor one!) for
326 * DSPS IP's missing ID change IRQ. We need an ID change IRQ to
327 * switch appropriately between halves of the OTG state machine.
328 * Managing DEVCTL.SESSION per Mentor docs requires that we know its
329 * value but DEVCTL.BDEVICE is invalid without DEVCTL.SESSION set.
330 * Also, DRVVBUS pulses for SRP (but not at 5V) ...
332 if (usbintr & MUSB_INTR_BABBLE)
333 pr_info("CAUTION: musb: Babble Interrupt Occurred\n");
335 if (usbintr & ((1 << wrp->drvvbus) << wrp->usb_shift)) {
336 int drvvbus = dsps_readl(reg_base, wrp->status);
337 void __iomem *mregs = musb->mregs;
338 u8 devctl = dsps_readb(mregs, MUSB_DEVCTL);
341 err = musb->int_usb & MUSB_INTR_VBUSERROR;
344 * The Mentor core doesn't debounce VBUS as needed
345 * to cope with device connect current spikes. This
346 * means it's not uncommon for bus-powered devices
347 * to get VBUS errors during enumeration.
349 * This is a workaround, but newer RTL from Mentor
350 * seems to allow a better one: "re"-starting sessions
351 * without waiting for VBUS to stop registering in
354 musb->int_usb &= ~MUSB_INTR_VBUSERROR;
355 musb->xceiv->state = OTG_STATE_A_WAIT_VFALL;
356 mod_timer(&glue->timer[pdev->id],
357 jiffies + wrp->poll_seconds * HZ);
358 WARNING("VBUS error workaround (delay coming)\n");
359 } else if (drvvbus) {
362 musb->xceiv->otg->default_a = 1;
363 musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
364 del_timer(&glue->timer[pdev->id]);
368 musb->xceiv->otg->default_a = 0;
369 musb->xceiv->state = OTG_STATE_B_IDLE;
372 /* NOTE: this must complete power-on within 100 ms. */
373 dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n",
374 drvvbus ? "on" : "off",
375 otg_state_string(musb->xceiv->state),
381 if (musb->int_tx || musb->int_rx || musb->int_usb)
382 ret |= musb_interrupt(musb);
385 /* EOI needs to be written for the IRQ to be re-asserted. */
386 if (ret == IRQ_HANDLED || epintr || usbintr)
387 dsps_writel(reg_base, wrp->eoi, 1);
389 /* Poll for ID change */
390 if (musb->xceiv->state == OTG_STATE_B_IDLE)
391 mod_timer(&glue->timer[pdev->id],
392 jiffies + wrp->poll_seconds * HZ);
394 spin_unlock_irqrestore(&musb->lock, flags);
399 static int dsps_musb_init(struct musb *musb)
401 struct device *dev = musb->controller;
402 struct platform_device *pdev = to_platform_device(dev);
403 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
404 const struct dsps_musb_wrapper *wrp = glue->wrp;
405 void __iomem *reg_base = musb->ctrl_base;
409 /* mentor core register starts at offset of 0x400 from musb base */
410 musb->mregs += wrp->musb_core_offset;
412 /* NOP driver needs change if supporting dual instance */
413 usb_nop_xceiv_register();
414 musb->xceiv = usb_get_phy(USB_PHY_TYPE_USB2);
415 if (IS_ERR_OR_NULL(musb->xceiv))
416 return -EPROBE_DEFER;
418 /* Returns zero if e.g. not clocked */
419 rev = dsps_readl(reg_base, wrp->revision);
425 setup_timer(&glue->timer[pdev->id], otg_timer, (unsigned long) musb);
428 dsps_writel(reg_base, wrp->control, (1 << wrp->reset));
430 /* Start the on-chip PHY and its PLL. */
431 musb_dsps_phy_control(glue, pdev->id, 1);
433 musb->isr = dsps_interrupt;
435 /* reset the otgdisable bit, needed for host mode to work */
436 val = dsps_readl(reg_base, wrp->phy_utmi);
437 val &= ~(1 << wrp->otg_disable);
438 dsps_writel(musb->ctrl_base, wrp->phy_utmi, val);
440 /* clear level interrupt */
441 dsps_writel(reg_base, wrp->eoi, 0);
445 usb_put_phy(musb->xceiv);
446 usb_nop_xceiv_unregister();
450 static int dsps_musb_exit(struct musb *musb)
452 struct device *dev = musb->controller;
453 struct platform_device *pdev = to_platform_device(dev);
454 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
456 del_timer_sync(&glue->timer[pdev->id]);
458 /* Shutdown the on-chip PHY and its PLL. */
459 musb_dsps_phy_control(glue, pdev->id, 0);
461 /* NOP driver needs change if supporting dual instance */
462 usb_put_phy(musb->xceiv);
463 usb_nop_xceiv_unregister();
468 static struct musb_platform_ops dsps_ops = {
469 .init = dsps_musb_init,
470 .exit = dsps_musb_exit,
472 .enable = dsps_musb_enable,
473 .disable = dsps_musb_disable,
475 .try_idle = dsps_musb_try_idle,
478 static u64 musb_dmamask = DMA_BIT_MASK(32);
480 static int dsps_create_musb_pdev(struct dsps_glue *glue, u8 id)
482 struct device *dev = glue->dev;
483 struct platform_device *pdev = to_platform_device(dev);
484 struct musb_hdrc_platform_data *pdata = dev->platform_data;
485 struct device_node *np = pdev->dev.of_node;
486 struct musb_hdrc_config *config;
487 struct platform_device *musb;
488 struct resource *res;
489 struct resource resources[2];
493 resources[0].start = dsps_control_module_phys[id];
494 resources[0].end = resources[0].start + SZ_4 - 1;
495 resources[0].flags = IORESOURCE_MEM;
497 glue->usb_ctrl[id] = devm_request_and_ioremap(&pdev->dev, resources);
498 if (glue->usb_ctrl[id] == NULL) {
499 dev_err(dev, "Failed to obtain usb_ctrl%d memory\n", id);
504 /* first resource is for usbss, so start index from 1 */
505 res = platform_get_resource(pdev, IORESOURCE_MEM, id + 1);
507 dev_err(dev, "failed to get memory for instance %d\n", id);
514 /* first resource is for usbss, so start index from 1 */
515 res = platform_get_resource(pdev, IORESOURCE_IRQ, id + 1);
517 dev_err(dev, "failed to get irq for instance %d\n", id);
523 resources[1].name = "mc";
525 /* allocate the child platform device */
526 musb = platform_device_alloc("musb-hdrc", PLATFORM_DEVID_AUTO);
528 dev_err(dev, "failed to allocate musb device\n");
533 musb->dev.parent = dev;
534 musb->dev.dma_mask = &musb_dmamask;
535 musb->dev.coherent_dma_mask = musb_dmamask;
537 glue->musb[id] = musb;
539 ret = platform_device_add_resources(musb, resources, 2);
541 dev_err(dev, "failed to add resources\n");
546 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
549 "failed to allocate musb platfrom data\n");
554 config = devm_kzalloc(&pdev->dev, sizeof(*config), GFP_KERNEL);
557 "failed to allocate musb hdrc config\n");
561 of_property_read_u32(np, "num-eps", (u32 *)&config->num_eps);
562 of_property_read_u32(np, "ram-bits", (u32 *)&config->ram_bits);
563 snprintf(res_name, sizeof(res_name), "port%d-mode", id);
564 of_property_read_u32(np, res_name, (u32 *)&pdata->mode);
565 of_property_read_u32(np, "power", (u32 *)&pdata->power);
566 config->multipoint = of_property_read_bool(np, "multipoint");
568 pdata->config = config;
571 pdata->platform_ops = &dsps_ops;
573 ret = platform_device_add_data(musb, pdata, sizeof(*pdata));
575 dev_err(dev, "failed to add platform_data\n");
579 ret = platform_device_add(musb);
581 dev_err(dev, "failed to register musb device\n");
588 platform_device_put(musb);
593 static int dsps_probe(struct platform_device *pdev)
595 struct device_node *np = pdev->dev.of_node;
596 const struct of_device_id *match;
597 const struct dsps_musb_wrapper *wrp;
598 struct dsps_glue *glue;
599 struct resource *iomem;
602 match = of_match_node(musb_dsps_of_match, np);
604 dev_err(&pdev->dev, "fail to get matching of_match struct\n");
611 glue = kzalloc(sizeof(*glue), GFP_KERNEL);
613 dev_err(&pdev->dev, "unable to allocate glue memory\n");
618 /* get memory resource */
619 iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
621 dev_err(&pdev->dev, "failed to get usbss mem resourse\n");
626 glue->dev = &pdev->dev;
628 glue->wrp = kmemdup(wrp, sizeof(*wrp), GFP_KERNEL);
630 dev_err(&pdev->dev, "failed to duplicate wrapper struct memory\n");
634 platform_set_drvdata(pdev, glue);
636 /* enable the usbss clocks */
637 pm_runtime_enable(&pdev->dev);
639 ret = pm_runtime_get_sync(&pdev->dev);
641 dev_err(&pdev->dev, "pm_runtime_get_sync FAILED");
645 /* create the child platform device for all instances of musb */
646 for (i = 0; i < wrp->instances ; i++) {
647 ret = dsps_create_musb_pdev(glue, i);
649 dev_err(&pdev->dev, "failed to create child pdev\n");
650 /* release resources of previously created instances */
651 for (i--; i >= 0 ; i--)
652 platform_device_unregister(glue->musb[i]);
660 pm_runtime_put(&pdev->dev);
662 pm_runtime_disable(&pdev->dev);
669 static int dsps_remove(struct platform_device *pdev)
671 struct dsps_glue *glue = platform_get_drvdata(pdev);
672 const struct dsps_musb_wrapper *wrp = glue->wrp;
675 /* delete the child platform device */
676 for (i = 0; i < wrp->instances ; i++)
677 platform_device_unregister(glue->musb[i]);
679 /* disable usbss clocks */
680 pm_runtime_put(&pdev->dev);
681 pm_runtime_disable(&pdev->dev);
687 #ifdef CONFIG_PM_SLEEP
688 static int dsps_suspend(struct device *dev)
690 struct platform_device *pdev = to_platform_device(dev->parent);
691 struct dsps_glue *glue = platform_get_drvdata(pdev);
692 const struct dsps_musb_wrapper *wrp = glue->wrp;
695 for (i = 0; i < wrp->instances; i++)
696 musb_dsps_phy_control(glue, i, 0);
701 static int dsps_resume(struct device *dev)
703 struct platform_device *pdev = to_platform_device(dev->parent);
704 struct dsps_glue *glue = platform_get_drvdata(pdev);
705 const struct dsps_musb_wrapper *wrp = glue->wrp;
708 for (i = 0; i < wrp->instances; i++)
709 musb_dsps_phy_control(glue, i, 1);
715 static SIMPLE_DEV_PM_OPS(dsps_pm_ops, dsps_suspend, dsps_resume);
717 static const struct dsps_musb_wrapper ti81xx_driver_data = {
723 .epintr_clear = 0x40,
724 .epintr_status = 0x30,
725 .coreintr_set = 0x3c,
726 .coreintr_clear = 0x44,
727 .coreintr_status = 0x34,
735 .usb_bitmap = (0x1ff << 0),
739 .txep_bitmap = (0xffff << 0),
742 .rxep_bitmap = (0xfffe << 16),
743 .musb_core_offset = 0x400,
748 static const struct platform_device_id musb_dsps_id_table[] = {
750 .name = "musb-ti81xx",
751 .driver_data = (kernel_ulong_t) &ti81xx_driver_data,
753 { }, /* Terminating Entry */
755 MODULE_DEVICE_TABLE(platform, musb_dsps_id_table);
758 static const struct of_device_id musb_dsps_of_match[] = {
759 { .compatible = "ti,musb-am33xx",
760 .data = (void *) &ti81xx_driver_data, },
763 MODULE_DEVICE_TABLE(of, musb_dsps_of_match);
766 static struct platform_driver dsps_usbss_driver = {
768 .remove = dsps_remove,
772 .of_match_table = of_match_ptr(musb_dsps_of_match),
774 .id_table = musb_dsps_id_table,
777 MODULE_DESCRIPTION("TI DSPS MUSB Glue Layer");
778 MODULE_AUTHOR("Ravi B <ravibabu@ti.com>");
779 MODULE_AUTHOR("Ajay Kumar Gupta <ajay.gupta@ti.com>");
780 MODULE_LICENSE("GPL v2");
782 static int __init dsps_init(void)
784 return platform_driver_register(&dsps_usbss_driver);
786 subsys_initcall(dsps_init);
788 static void __exit dsps_exit(void)
790 platform_driver_unregister(&dsps_usbss_driver);
792 module_exit(dsps_exit);