sound/pci/rme9652/hdsp.c

   1 /*
   2  *   ALSA driver for RME Hammerfall DSP audio interface(s)
   3  *
   4  *      Copyright (c) 2002  Paul Davis
   5  *                          Marcus Andersson
   6  *                          Thomas Charbonnel
   7  *
   8  *   This program is free software; you can redistribute it and/or modify
   9  *   it under the terms of the GNU General Public License as published by
  10  *   the Free Software Foundation; either version 2 of the License, or
  11  *   (at your option) any later version.
  12  *
  13  *   This program is distributed in the hope that it will be useful,
  14  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  *   GNU General Public License for more details.
  17  *
  18  *   You should have received a copy of the GNU General Public License
  19  *   along with this program; if not, write to the Free Software
  20  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  21  *
  22  */
  23
  24 #include <linux/init.h>
  25 #include <linux/delay.h>
  26 #include <linux/interrupt.h>
  27 #include <linux/pci.h>
  28 #include <linux/firmware.h>
  29 #include <linux/module.h>
  30 #include <linux/math64.h>
  31 #include <linux/vmalloc.h>
  32
  33 #include <sound/core.h>
  34 #include <sound/control.h>
  35 #include <sound/pcm.h>
  36 #include <sound/info.h>
  37 #include <sound/asoundef.h>
  38 #include <sound/rawmidi.h>
  39 #include <sound/hwdep.h>
  40 #include <sound/initval.h>
  41 #include <sound/hdsp.h>
  42
  43 #include <asm/byteorder.h>
  44 #include <asm/current.h>
  45 #include <asm/io.h>
  46
  47 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;      /* Index 0-MAX */
  48 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;       /* ID for this card */
  49 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;     /* Enable this card */
  50
  51 module_param_array(index, int, NULL, 0444);
  52 MODULE_PARM_DESC(index, "Index value for RME Hammerfall DSP interface.");
  53 module_param_array(id, charp, NULL, 0444);
  54 MODULE_PARM_DESC(id, "ID string for RME Hammerfall DSP interface.");
  55 module_param_array(enable, bool, NULL, 0444);
  56 MODULE_PARM_DESC(enable, "Enable/disable specific Hammerfall DSP soundcards.");
  57 MODULE_AUTHOR("Paul Davis <paul@linuxaudiosystems.com>, Marcus Andersson, Thomas Charbonnel <thomas@undata.org>");
  58 MODULE_DESCRIPTION("RME Hammerfall DSP");
  59 MODULE_LICENSE("GPL");
  60 MODULE_SUPPORTED_DEVICE("{{RME Hammerfall-DSP},"
  61                 "{RME HDSP-9652},"
  62                 "{RME HDSP-9632}}");
  63 MODULE_FIRMWARE("rpm_firmware.bin");
  64 MODULE_FIRMWARE("multiface_firmware.bin");
  65 MODULE_FIRMWARE("multiface_firmware_rev11.bin");
  66 MODULE_FIRMWARE("digiface_firmware.bin");
  67 MODULE_FIRMWARE("digiface_firmware_rev11.bin");
  68
  69 #define HDSP_MAX_CHANNELS        26
  70 #define HDSP_MAX_DS_CHANNELS     14
  71 #define HDSP_MAX_QS_CHANNELS     8
  72 #define DIGIFACE_SS_CHANNELS     26
  73 #define DIGIFACE_DS_CHANNELS     14
  74 #define MULTIFACE_SS_CHANNELS    18
  75 #define MULTIFACE_DS_CHANNELS    14
  76 #define H9652_SS_CHANNELS        26
  77 #define H9652_DS_CHANNELS        14
  78 /* This does not include possible Analog Extension Boards
  79    AEBs are detected at card initialization
  80 */
  81 #define H9632_SS_CHANNELS        12
  82 #define H9632_DS_CHANNELS        8
  83 #define H9632_QS_CHANNELS        4
  84 #define RPM_CHANNELS             6
  85
  86 /* Write registers. These are defined as byte-offsets from the iobase value.
  87  */
  88 #define HDSP_resetPointer               0
  89 #define HDSP_freqReg                    0
  90 #define HDSP_outputBufferAddress        32
  91 #define HDSP_inputBufferAddress         36
  92 #define HDSP_controlRegister            64
  93 #define HDSP_interruptConfirmation      96
  94 #define HDSP_outputEnable               128
  95 #define HDSP_control2Reg                256
  96 #define HDSP_midiDataOut0               352
  97 #define HDSP_midiDataOut1               356
  98 #define HDSP_fifoData                   368
  99 #define HDSP_inputEnable                384
 100
 101 /* Read registers. These are defined as byte-offsets from the iobase value
 102  */
 103
 104 #define HDSP_statusRegister    0
 105 #define HDSP_timecode        128
 106 #define HDSP_status2Register 192
 107 #define HDSP_midiDataIn0     360
 108 #define HDSP_midiDataIn1     364
 109 #define HDSP_midiStatusOut0  384
 110 #define HDSP_midiStatusOut1  388
 111 #define HDSP_midiStatusIn0   392
 112 #define HDSP_midiStatusIn1   396
 113 #define HDSP_fifoStatus      400
 114
 115 /* the meters are regular i/o-mapped registers, but offset
 116    considerably from the rest. the peak registers are reset
 117    when read; the least-significant 4 bits are full-scale counters;
 118    the actual peak value is in the most-significant 24 bits.
 119 */
 120
 121 #define HDSP_playbackPeakLevel  4096  /* 26 * 32 bit values */
 122 #define HDSP_inputPeakLevel     4224  /* 26 * 32 bit values */
 123 #define HDSP_outputPeakLevel    4352  /* (26+2) * 32 bit values */
 124 #define HDSP_playbackRmsLevel   4612  /* 26 * 64 bit values */
 125 #define HDSP_inputRmsLevel      4868  /* 26 * 64 bit values */
 126
 127
 128 /* This is for H9652 cards
 129    Peak values are read downward from the base
 130    Rms values are read upward
 131    There are rms values for the outputs too
 132    26*3 values are read in ss mode
 133    14*3 in ds mode, with no gap between values
 134 */
 135 #define HDSP_9652_peakBase      7164
 136 #define HDSP_9652_rmsBase       4096
 137
 138 /* c.f. the hdsp_9632_meters_t struct */
 139 #define HDSP_9632_metersBase    4096
 140
 141 #define HDSP_IO_EXTENT     7168
 142
 143 /* control2 register bits */
 144
 145 #define HDSP_TMS                0x01
 146 #define HDSP_TCK                0x02
 147 #define HDSP_TDI                0x04
 148 #define HDSP_JTAG               0x08
 149 #define HDSP_PWDN               0x10
 150 #define HDSP_PROGRAM            0x020
 151 #define HDSP_CONFIG_MODE_0      0x040
 152 #define HDSP_CONFIG_MODE_1      0x080
 153 #define HDSP_VERSION_BIT        (0x100 | HDSP_S_LOAD)
 154 #define HDSP_BIGENDIAN_MODE     0x200
 155 #define HDSP_RD_MULTIPLE        0x400
 156 #define HDSP_9652_ENABLE_MIXER  0x800
 157 #define HDSP_S200               0x800
 158 #define HDSP_S300               (0x100 | HDSP_S200) /* dummy, purpose of 0x100 unknown */
 159 #define HDSP_CYCLIC_MODE        0x1000
 160 #define HDSP_TDO                0x10000000
 161
 162 #define HDSP_S_PROGRAM      (HDSP_CYCLIC_MODE|HDSP_PROGRAM|HDSP_CONFIG_MODE_0)
 163 #define HDSP_S_LOAD         (HDSP_CYCLIC_MODE|HDSP_PROGRAM|HDSP_CONFIG_MODE_1)
 164
 165 /* Control Register bits */
 166
 167 #define HDSP_Start                (1<<0)  /* start engine */
 168 #define HDSP_Latency0             (1<<1)  /* buffer size = 2^n where n is defined by Latency{2,1,0} */
 169 #define HDSP_Latency1             (1<<2)  /* [ see above ] */
 170 #define HDSP_Latency2             (1<<3)  /* [ see above ] */
 171 #define HDSP_ClockModeMaster      (1<<4)  /* 1=Master, 0=Slave/Autosync */
 172 #define HDSP_AudioInterruptEnable (1<<5)  /* what do you think ? */
 173 #define HDSP_Frequency0           (1<<6)  /* 0=44.1kHz/88.2kHz/176.4kHz 1=48kHz/96kHz/192kHz */
 174 #define HDSP_Frequency1           (1<<7)  /* 0=32kHz/64kHz/128kHz */
 175 #define HDSP_DoubleSpeed          (1<<8)  /* 0=normal speed, 1=double speed */
 176 #define HDSP_SPDIFProfessional    (1<<9)  /* 0=consumer, 1=professional */
 177 #define HDSP_SPDIFEmphasis        (1<<10) /* 0=none, 1=on */
 178 #define HDSP_SPDIFNonAudio        (1<<11) /* 0=off, 1=on */
 179 #define HDSP_SPDIFOpticalOut      (1<<12) /* 1=use 1st ADAT connector for SPDIF, 0=do not */
 180 #define HDSP_SyncRef2             (1<<13)
 181 #define HDSP_SPDIFInputSelect0    (1<<14)
 182 #define HDSP_SPDIFInputSelect1    (1<<15)
 183 #define HDSP_SyncRef0             (1<<16)
 184 #define HDSP_SyncRef1             (1<<17)
 185 #define HDSP_AnalogExtensionBoard (1<<18) /* For H9632 cards */
 186 #define HDSP_XLRBreakoutCable     (1<<20) /* For H9632 cards */
 187 #define HDSP_Midi0InterruptEnable (1<<22)
 188 #define HDSP_Midi1InterruptEnable (1<<23)
 189 #define HDSP_LineOut              (1<<24)
 190 #define HDSP_ADGain0              (1<<25) /* From here : H9632 specific */
 191 #define HDSP_ADGain1              (1<<26)
 192 #define HDSP_DAGain0              (1<<27)
 193 #define HDSP_DAGain1              (1<<28)
 194 #define HDSP_PhoneGain0           (1<<29)
 195 #define HDSP_PhoneGain1           (1<<30)
 196 #define HDSP_QuadSpeed            (1<<31)
 197
 198 /* RPM uses some of the registers for special purposes */
 199 #define HDSP_RPM_Inp12            0x04A00
 200 #define HDSP_RPM_Inp12_Phon_6dB   0x00800  /* Dolby */
 201 #define HDSP_RPM_Inp12_Phon_0dB   0x00000  /* .. */
 202 #define HDSP_RPM_Inp12_Phon_n6dB  0x04000  /* inp_0 */
 203 #define HDSP_RPM_Inp12_Line_0dB   0x04200  /* Dolby+PRO */
 204 #define HDSP_RPM_Inp12_Line_n6dB  0x00200  /* PRO */
 205
 206 #define HDSP_RPM_Inp34            0x32000
 207 #define HDSP_RPM_Inp34_Phon_6dB   0x20000  /* SyncRef1 */
 208 #define HDSP_RPM_Inp34_Phon_0dB   0x00000  /* .. */
 209 #define HDSP_RPM_Inp34_Phon_n6dB  0x02000  /* SyncRef2 */
 210 #define HDSP_RPM_Inp34_Line_0dB   0x30000  /* SyncRef1+SyncRef0 */
 211 #define HDSP_RPM_Inp34_Line_n6dB  0x10000  /* SyncRef0 */
 212
 213 #define HDSP_RPM_Bypass           0x01000
 214
 215 #define HDSP_RPM_Disconnect       0x00001
 216
 217 #define HDSP_ADGainMask       (HDSP_ADGain0|HDSP_ADGain1)
 218 #define HDSP_ADGainMinus10dBV  HDSP_ADGainMask
 219 #define HDSP_ADGainPlus4dBu   (HDSP_ADGain0)
 220 #define HDSP_ADGainLowGain     0
 221
 222 #define HDSP_DAGainMask         (HDSP_DAGain0|HDSP_DAGain1)
 223 #define HDSP_DAGainHighGain      HDSP_DAGainMask
 224 #define HDSP_DAGainPlus4dBu     (HDSP_DAGain0)
 225 #define HDSP_DAGainMinus10dBV    0
 226
 227 #define HDSP_PhoneGainMask      (HDSP_PhoneGain0|HDSP_PhoneGain1)
 228 #define HDSP_PhoneGain0dB        HDSP_PhoneGainMask
 229 #define HDSP_PhoneGainMinus6dB  (HDSP_PhoneGain0)
 230 #define HDSP_PhoneGainMinus12dB  0
 231
 232 #define HDSP_LatencyMask    (HDSP_Latency0|HDSP_Latency1|HDSP_Latency2)
 233 #define HDSP_FrequencyMask  (HDSP_Frequency0|HDSP_Frequency1|HDSP_DoubleSpeed|HDSP_QuadSpeed)
 234
 235 #define HDSP_SPDIFInputMask    (HDSP_SPDIFInputSelect0|HDSP_SPDIFInputSelect1)
 236 #define HDSP_SPDIFInputADAT1    0
 237 #define HDSP_SPDIFInputCoaxial (HDSP_SPDIFInputSelect0)
 238 #define HDSP_SPDIFInputCdrom   (HDSP_SPDIFInputSelect1)
 239 #define HDSP_SPDIFInputAES     (HDSP_SPDIFInputSelect0|HDSP_SPDIFInputSelect1)
 240
 241 #define HDSP_SyncRefMask        (HDSP_SyncRef0|HDSP_SyncRef1|HDSP_SyncRef2)
 242 #define HDSP_SyncRef_ADAT1       0
 243 #define HDSP_SyncRef_ADAT2      (HDSP_SyncRef0)
 244 #define HDSP_SyncRef_ADAT3      (HDSP_SyncRef1)
 245 #define HDSP_SyncRef_SPDIF      (HDSP_SyncRef0|HDSP_SyncRef1)
 246 #define HDSP_SyncRef_WORD       (HDSP_SyncRef2)
 247 #define HDSP_SyncRef_ADAT_SYNC  (HDSP_SyncRef0|HDSP_SyncRef2)
 248
 249 /* Sample Clock Sources */
 250
 251 #define HDSP_CLOCK_SOURCE_AUTOSYNC           0
 252 #define HDSP_CLOCK_SOURCE_INTERNAL_32KHZ     1
 253 #define HDSP_CLOCK_SOURCE_INTERNAL_44_1KHZ   2
 254 #define HDSP_CLOCK_SOURCE_INTERNAL_48KHZ     3
 255 #define HDSP_CLOCK_SOURCE_INTERNAL_64KHZ     4
 256 #define HDSP_CLOCK_SOURCE_INTERNAL_88_2KHZ   5
 257 #define HDSP_CLOCK_SOURCE_INTERNAL_96KHZ     6
 258 #define HDSP_CLOCK_SOURCE_INTERNAL_128KHZ    7
 259 #define HDSP_CLOCK_SOURCE_INTERNAL_176_4KHZ  8
 260 #define HDSP_CLOCK_SOURCE_INTERNAL_192KHZ    9
 261
 262 /* Preferred sync reference choices - used by "pref_sync_ref" control switch */
 263
 264 #define HDSP_SYNC_FROM_WORD      0
 265 #define HDSP_SYNC_FROM_SPDIF     1
 266 #define HDSP_SYNC_FROM_ADAT1     2
 267 #define HDSP_SYNC_FROM_ADAT_SYNC 3
 268 #define HDSP_SYNC_FROM_ADAT2     4
 269 #define HDSP_SYNC_FROM_ADAT3     5
 270
 271 /* SyncCheck status */
 272
 273 #define HDSP_SYNC_CHECK_NO_LOCK 0
 274 #define HDSP_SYNC_CHECK_LOCK    1
 275 #define HDSP_SYNC_CHECK_SYNC    2
 276
 277 /* AutoSync references - used by "autosync_ref" control switch */
 278
 279 #define HDSP_AUTOSYNC_FROM_WORD      0
 280 #define HDSP_AUTOSYNC_FROM_ADAT_SYNC 1
 281 #define HDSP_AUTOSYNC_FROM_SPDIF     2
 282 #define HDSP_AUTOSYNC_FROM_NONE      3
 283 #define HDSP_AUTOSYNC_FROM_ADAT1     4
 284 #define HDSP_AUTOSYNC_FROM_ADAT2     5
 285 #define HDSP_AUTOSYNC_FROM_ADAT3     6
 286
 287 /* Possible sources of S/PDIF input */
 288
 289 #define HDSP_SPDIFIN_OPTICAL  0 /* optical  (ADAT1) */
 290 #define HDSP_SPDIFIN_COAXIAL  1 /* coaxial (RCA) */
 291 #define HDSP_SPDIFIN_INTERNAL 2 /* internal (CDROM) */
 292 #define HDSP_SPDIFIN_AES      3 /* xlr for H9632 (AES)*/
 293
 294 #define HDSP_Frequency32KHz    HDSP_Frequency0
 295 #define HDSP_Frequency44_1KHz  HDSP_Frequency1
 296 #define HDSP_Frequency48KHz    (HDSP_Frequency1|HDSP_Frequency0)
 297 #define HDSP_Frequency64KHz    (HDSP_DoubleSpeed|HDSP_Frequency0)
 298 #define HDSP_Frequency88_2KHz  (HDSP_DoubleSpeed|HDSP_Frequency1)
 299 #define HDSP_Frequency96KHz    (HDSP_DoubleSpeed|HDSP_Frequency1|HDSP_Frequency0)
 300 /* For H9632 cards */
 301 #define HDSP_Frequency128KHz   (HDSP_QuadSpeed|HDSP_DoubleSpeed|HDSP_Frequency0)
 302 #define HDSP_Frequency176_4KHz (HDSP_QuadSpeed|HDSP_DoubleSpeed|HDSP_Frequency1)
 303 #define HDSP_Frequency192KHz   (HDSP_QuadSpeed|HDSP_DoubleSpeed|HDSP_Frequency1|HDSP_Frequency0)
 304 /* RME says n = 104857600000000, but in the windows MADI driver, I see:
 305         return 104857600000000 / rate; // 100 MHz
 306         return 110100480000000 / rate; // 105 MHz
 307 */
 308 #define DDS_NUMERATOR 104857600000000ULL;  /*  =  2^20 * 10^8 */
 309
 310 #define hdsp_encode_latency(x)       (((x)<<1) & HDSP_LatencyMask)
 311 #define hdsp_decode_latency(x)       (((x) & HDSP_LatencyMask)>>1)
 312
 313 #define hdsp_encode_spdif_in(x) (((x)&0x3)<<14)
 314 #define hdsp_decode_spdif_in(x) (((x)>>14)&0x3)
 315
 316 /* Status Register bits */
 317
 318 #define HDSP_audioIRQPending    (1<<0)
 319 #define HDSP_Lock2              (1<<1)     /* this is for Digiface and H9652 */
 320 #define HDSP_spdifFrequency3    HDSP_Lock2 /* this is for H9632 only */
 321 #define HDSP_Lock1              (1<<2)
 322 #define HDSP_Lock0              (1<<3)
 323 #define HDSP_SPDIFSync          (1<<4)
 324 #define HDSP_TimecodeLock       (1<<5)
 325 #define HDSP_BufferPositionMask 0x000FFC0 /* Bit 6..15 : h/w buffer pointer */
 326 #define HDSP_Sync2              (1<<16)
 327 #define HDSP_Sync1              (1<<17)
 328 #define HDSP_Sync0              (1<<18)
 329 #define HDSP_DoubleSpeedStatus  (1<<19)
 330 #define HDSP_ConfigError        (1<<20)
 331 #define HDSP_DllError           (1<<21)
 332 #define HDSP_spdifFrequency0    (1<<22)
 333 #define HDSP_spdifFrequency1    (1<<23)
 334 #define HDSP_spdifFrequency2    (1<<24)
 335 #define HDSP_SPDIFErrorFlag     (1<<25)
 336 #define HDSP_BufferID           (1<<26)
 337 #define HDSP_TimecodeSync       (1<<27)
 338 #define HDSP_AEBO               (1<<28) /* H9632 specific Analog Extension Boards */
 339 #define HDSP_AEBI               (1<<29) /* 0 = present, 1 = absent */
 340 #define HDSP_midi0IRQPending    (1<<30)
 341 #define HDSP_midi1IRQPending    (1<<31)
 342
 343 #define HDSP_spdifFrequencyMask    (HDSP_spdifFrequency0|HDSP_spdifFrequency1|HDSP_spdifFrequency2)
 344 #define HDSP_spdifFrequencyMask_9632 (HDSP_spdifFrequency0|\
 345                                       HDSP_spdifFrequency1|\
 346                                       HDSP_spdifFrequency2|\
 347                                       HDSP_spdifFrequency3)
 348
 349 #define HDSP_spdifFrequency32KHz   (HDSP_spdifFrequency0)
 350 #define HDSP_spdifFrequency44_1KHz (HDSP_spdifFrequency1)
 351 #define HDSP_spdifFrequency48KHz   (HDSP_spdifFrequency0|HDSP_spdifFrequency1)
 352
 353 #define HDSP_spdifFrequency64KHz   (HDSP_spdifFrequency2)
 354 #define HDSP_spdifFrequency88_2KHz (HDSP_spdifFrequency0|HDSP_spdifFrequency2)
 355 #define HDSP_spdifFrequency96KHz   (HDSP_spdifFrequency2|HDSP_spdifFrequency1)
 356
 357 /* This is for H9632 cards */
 358 #define HDSP_spdifFrequency128KHz   (HDSP_spdifFrequency0|\
 359                                      HDSP_spdifFrequency1|\
 360                                      HDSP_spdifFrequency2)
 361 #define HDSP_spdifFrequency176_4KHz HDSP_spdifFrequency3
 362 #define HDSP_spdifFrequency192KHz   (HDSP_spdifFrequency3|HDSP_spdifFrequency0)
 363
 364 /* Status2 Register bits */
 365
 366 #define HDSP_version0     (1<<0)
 367 #define HDSP_version1     (1<<1)
 368 #define HDSP_version2     (1<<2)
 369 #define HDSP_wc_lock      (1<<3)
 370 #define HDSP_wc_sync      (1<<4)
 371 #define HDSP_inp_freq0    (1<<5)
 372 #define HDSP_inp_freq1    (1<<6)
 373 #define HDSP_inp_freq2    (1<<7)
 374 #define HDSP_SelSyncRef0  (1<<8)
 375 #define HDSP_SelSyncRef1  (1<<9)
 376 #define HDSP_SelSyncRef2  (1<<10)
 377
 378 #define HDSP_wc_valid (HDSP_wc_lock|HDSP_wc_sync)
 379
 380 #define HDSP_systemFrequencyMask (HDSP_inp_freq0|HDSP_inp_freq1|HDSP_inp_freq2)
 381 #define HDSP_systemFrequency32   (HDSP_inp_freq0)
 382 #define HDSP_systemFrequency44_1 (HDSP_inp_freq1)
 383 #define HDSP_systemFrequency48   (HDSP_inp_freq0|HDSP_inp_freq1)
 384 #define HDSP_systemFrequency64   (HDSP_inp_freq2)
 385 #define HDSP_systemFrequency88_2 (HDSP_inp_freq0|HDSP_inp_freq2)
 386 #define HDSP_systemFrequency96   (HDSP_inp_freq1|HDSP_inp_freq2)
 387 /* FIXME : more values for 9632 cards ? */
 388
 389 #define HDSP_SelSyncRefMask        (HDSP_SelSyncRef0|HDSP_SelSyncRef1|HDSP_SelSyncRef2)
 390 #define HDSP_SelSyncRef_ADAT1      0
 391 #define HDSP_SelSyncRef_ADAT2      (HDSP_SelSyncRef0)
 392 #define HDSP_SelSyncRef_ADAT3      (HDSP_SelSyncRef1)
 393 #define HDSP_SelSyncRef_SPDIF      (HDSP_SelSyncRef0|HDSP_SelSyncRef1)
 394 #define HDSP_SelSyncRef_WORD       (HDSP_SelSyncRef2)
 395 #define HDSP_SelSyncRef_ADAT_SYNC  (HDSP_SelSyncRef0|HDSP_SelSyncRef2)
 396
 397 /* Card state flags */
 398
 399 #define HDSP_InitializationComplete  (1<<0)
 400 #define HDSP_FirmwareLoaded          (1<<1)
 401 #define HDSP_FirmwareCached          (1<<2)
 402
 403 /* FIFO wait times, defined in terms of 1/10ths of msecs */
 404
 405 #define HDSP_LONG_WAIT   5000
 406 #define HDSP_SHORT_WAIT  30
 407
 408 #define UNITY_GAIN                       32768
 409 #define MINUS_INFINITY_GAIN              0
 410
 411 /* the size of a substream (1 mono data stream) */
 412
 413 #define HDSP_CHANNEL_BUFFER_SAMPLES  (16*1024)
 414 #define HDSP_CHANNEL_BUFFER_BYTES    (4*HDSP_CHANNEL_BUFFER_SAMPLES)
 415
 416 /* the size of the area we need to allocate for DMA transfers. the
 417    size is the same regardless of the number of channels - the
 418    Multiface still uses the same memory area.
 419
 420    Note that we allocate 1 more channel than is apparently needed
 421    because the h/w seems to write 1 byte beyond the end of the last
 422    page. Sigh.
 423 */
 424
 425 #define HDSP_DMA_AREA_BYTES ((HDSP_MAX_CHANNELS+1) * HDSP_CHANNEL_BUFFER_BYTES)
 426 #define HDSP_DMA_AREA_KILOBYTES (HDSP_DMA_AREA_BYTES/1024)
 427
 428 #define HDSP_FIRMWARE_SIZE      (24413 * 4)
 429
 430 struct hdsp_9632_meters {
 431     u32 input_peak[16];
 432     u32 playback_peak[16];
 433     u32 output_peak[16];
 434     u32 xxx_peak[16];
 435     u32 padding[64];
 436     u32 input_rms_low[16];
 437     u32 playback_rms_low[16];
 438     u32 output_rms_low[16];
 439     u32 xxx_rms_low[16];
 440     u32 input_rms_high[16];
 441     u32 playback_rms_high[16];
 442     u32 output_rms_high[16];
 443     u32 xxx_rms_high[16];
 444 };
 445
 446 struct hdsp_midi {
 447     struct hdsp             *hdsp;
 448     int                      id;
 449     struct snd_rawmidi           *rmidi;
 450     struct snd_rawmidi_substream *input;
 451     struct snd_rawmidi_substream *output;
 452     char                     istimer; /* timer in use */
 453     struct timer_list        timer;
 454     spinlock_t               lock;
 455     int                      pending;
 456 };
 457
 458 struct hdsp {
 459         spinlock_t            lock;
 460         struct snd_pcm_substream *capture_substream;
 461         struct snd_pcm_substream *playback_substream;
 462         struct hdsp_midi      midi[2];
 463         struct tasklet_struct midi_tasklet;
 464         int                   use_midi_tasklet;
 465         int                   precise_ptr;
 466         u32                   control_register;      /* cached value */
 467         u32                   control2_register;     /* cached value */
 468         u32                   creg_spdif;
 469         u32                   creg_spdif_stream;
 470         int                   clock_source_locked;
 471         char                 *card_name;         /* digiface/multiface/rpm */
 472         enum HDSP_IO_Type     io_type;               /* ditto, but for code use */
 473         unsigned short        firmware_rev;
 474         unsigned short        state;                 /* stores state bits */
 475         const struct firmware *firmware;
 476         u32                  *fw_uploaded;
 477         size_t                period_bytes;          /* guess what this is */
 478         unsigned char         max_channels;
 479         unsigned char         qs_in_channels;        /* quad speed mode for H9632 */
 480         unsigned char         ds_in_channels;
 481         unsigned char         ss_in_channels;       /* different for multiface/digiface */
 482         unsigned char         qs_out_channels;
 483         unsigned char         ds_out_channels;
 484         unsigned char         ss_out_channels;
 485
 486         struct snd_dma_buffer capture_dma_buf;
 487         struct snd_dma_buffer playback_dma_buf;
 488         unsigned char        *capture_buffer;       /* suitably aligned address */
 489         unsigned char        *playback_buffer;      /* suitably aligned address */
 490
 491         pid_t                 capture_pid;
 492         pid_t                 playback_pid;
 493         int                   running;
 494         int                   system_sample_rate;
 495         char                 *channel_map;
 496         int                   dev;
 497         int                   irq;
 498         unsigned long         port;
 499         void __iomem         *iobase;
 500         struct snd_card *card;
 501         struct snd_pcm *pcm;
 502         struct snd_hwdep          *hwdep;
 503         struct pci_dev       *pci;
 504         struct snd_kcontrol *spdif_ctl;
 505         unsigned short        mixer_matrix[HDSP_MATRIX_MIXER_SIZE];
 506         unsigned int          dds_value; /* last value written to freq register */
 507 };
 508
 509 /* These tables map the ALSA channels 1..N to the channels that we
 510    need to use in order to find the relevant channel buffer. RME
 511    refer to this kind of mapping as between "the ADAT channel and
 512    the DMA channel." We index it using the logical audio channel,
 513    and the value is the DMA channel (i.e. channel buffer number)
 514    where the data for that channel can be read/written from/to.
 515 */
 516
 517 static char channel_map_df_ss[HDSP_MAX_CHANNELS] = {
 518         0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,
 519         18, 19, 20, 21, 22, 23, 24, 25
 520 };
 521
 522 static char channel_map_mf_ss[HDSP_MAX_CHANNELS] = { /* Multiface */
 523         /* Analog */
 524         0, 1, 2, 3, 4, 5, 6, 7,
 525         /* ADAT 2 */
 526         16, 17, 18, 19, 20, 21, 22, 23,
 527         /* SPDIF */
 528         24, 25,
 529         -1, -1, -1, -1, -1, -1, -1, -1
 530 };
 531
 532 static char channel_map_ds[HDSP_MAX_CHANNELS] = {
 533         /* ADAT channels are remapped */
 534         1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23,
 535         /* channels 12 and 13 are S/PDIF */
 536         24, 25,
 537         /* others don't exist */
 538         -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
 539 };
 540
 541 static char channel_map_H9632_ss[HDSP_MAX_CHANNELS] = {
 542         /* ADAT channels */
 543         0, 1, 2, 3, 4, 5, 6, 7,
 544         /* SPDIF */
 545         8, 9,
 546         /* Analog */
 547         10, 11,
 548         /* AO4S-192 and AI4S-192 extension boards */
 549         12, 13, 14, 15,
 550         /* others don't exist */
 551         -1, -1, -1, -1, -1, -1, -1, -1,
 552         -1, -1
 553 };
 554
 555 static char channel_map_H9632_ds[HDSP_MAX_CHANNELS] = {
 556         /* ADAT */
 557         1, 3, 5, 7,
 558         /* SPDIF */
 559         8, 9,
 560         /* Analog */
 561         10, 11,
 562         /* AO4S-192 and AI4S-192 extension boards */
 563         12, 13, 14, 15,
 564         /* others don't exist */
 565         -1, -1, -1, -1, -1, -1, -1, -1,
 566         -1, -1, -1, -1, -1, -1
 567 };
 568
 569 static char channel_map_H9632_qs[HDSP_MAX_CHANNELS] = {
 570         /* ADAT is disabled in this mode */
 571         /* SPDIF */
 572         8, 9,
 573         /* Analog */
 574         10, 11,
 575         /* AO4S-192 and AI4S-192 extension boards */
 576         12, 13, 14, 15,
 577         /* others don't exist */
 578         -1, -1, -1, -1, -1, -1, -1, -1,
 579         -1, -1, -1, -1, -1, -1, -1, -1,
 580         -1, -1
 581 };
 582
 583 static int snd_hammerfall_get_buffer(struct pci_dev *pci, struct snd_dma_buffer *dmab, size_t size)
 584 {
 585         dmab->dev.type = SNDRV_DMA_TYPE_DEV;
 586         dmab->dev.dev = snd_dma_pci_data(pci);
 587         if (snd_dma_get_reserved_buf(dmab, snd_dma_pci_buf_id(pci))) {
 588                 if (dmab->bytes >= size)
 589                         return 0;
 590         }
 591         if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
 592                                 size, dmab) < 0)
 593                 return -ENOMEM;
 594         return 0;
 595 }
 596
 597 static void snd_hammerfall_free_buffer(struct snd_dma_buffer *dmab, struct pci_dev *pci)
 598 {
 599         if (dmab->area) {
 600                 dmab->dev.dev = NULL; /* make it anonymous */
 601                 snd_dma_reserve_buf(dmab, snd_dma_pci_buf_id(pci));
 602         }
 603 }
 604
 605
 606 static DEFINE_PCI_DEVICE_TABLE(snd_hdsp_ids) = {
 607         {
 608                 .vendor = PCI_VENDOR_ID_XILINX,
 609                 .device = PCI_DEVICE_ID_XILINX_HAMMERFALL_DSP,
 610                 .subvendor = PCI_ANY_ID,
 611                 .subdevice = PCI_ANY_ID,
 612         }, /* RME Hammerfall-DSP */
 613         { 0, },
 614 };
 615
 616 MODULE_DEVICE_TABLE(pci, snd_hdsp_ids);
 617
 618 /* prototypes */
 619 static int snd_hdsp_create_alsa_devices(struct snd_card *card, struct hdsp *hdsp);
 620 static int snd_hdsp_create_pcm(struct snd_card *card, struct hdsp *hdsp);
 621 static int snd_hdsp_enable_io (struct hdsp *hdsp);
 622 static void snd_hdsp_initialize_midi_flush (struct hdsp *hdsp);
 623 static void snd_hdsp_initialize_channels (struct hdsp *hdsp);
 624 static int hdsp_fifo_wait(struct hdsp *hdsp, int count, int timeout);
 625 static int hdsp_autosync_ref(struct hdsp *hdsp);
 626 static int snd_hdsp_set_defaults(struct hdsp *hdsp);
 627 static void snd_hdsp_9652_enable_mixer (struct hdsp *hdsp);
 628
 629 static int hdsp_playback_to_output_key (struct hdsp *hdsp, int in, int out)
 630 {
 631         switch (hdsp->io_type) {
 632         case Multiface:
 633         case Digiface:
 634         case RPM:
 635         default:
 636                 if (hdsp->firmware_rev == 0xa)
 637                         return (64 * out) + (32 + (in));
 638                 else
 639                         return (52 * out) + (26 + (in));
 640         case H9632:
 641                 return (32 * out) + (16 + (in));
 642         case H9652:
 643                 return (52 * out) + (26 + (in));
 644         }
 645 }
 646
 647 static int hdsp_input_to_output_key (struct hdsp *hdsp, int in, int out)
 648 {
 649         switch (hdsp->io_type) {
 650         case Multiface:
 651         case Digiface:
 652         case RPM:
 653         default:
 654                 if (hdsp->firmware_rev == 0xa)
 655                         return (64 * out) + in;
 656                 else
 657                         return (52 * out) + in;
 658         case H9632:
 659                 return (32 * out) + in;
 660         case H9652:
 661                 return (52 * out) + in;
 662         }
 663 }
 664
 665 static void hdsp_write(struct hdsp *hdsp, int reg, int val)
 666 {
 667         writel(val, hdsp->iobase + reg);
 668 }
 669
 670 static unsigned int hdsp_read(struct hdsp *hdsp, int reg)
 671 {
 672         return readl (hdsp->iobase + reg);
 673 }
 674
 675 static int hdsp_check_for_iobox (struct hdsp *hdsp)
 676 {
 677         int i;
 678
 679         if (hdsp->io_type == H9652 || hdsp->io_type == H9632) return 0;
 680         for (i = 0; i < 500; i++) {
 681                 if (0 == (hdsp_read(hdsp, HDSP_statusRegister) &
 682                                         HDSP_ConfigError)) {
 683                         if (i) {
 684                                 snd_printd("Hammerfall-DSP: IO box found after %d ms\n",
 685                                                 (20 * i));
 686                         }
 687                         return 0;
 688                 }
 689                 msleep(20);
 690         }
 691         snd_printk(KERN_ERR "Hammerfall-DSP: no IO box connected!\n");
 692         hdsp->state &= ~HDSP_FirmwareLoaded;
 693         return -EIO;
 694 }
 695
 696 static int hdsp_wait_for_iobox(struct hdsp *hdsp, unsigned int loops,
 697                                unsigned int delay)
 698 {
 699         unsigned int i;
 700
 701         if (hdsp->io_type == H9652 || hdsp->io_type == H9632)
 702                 return 0;
 703
 704         for (i = 0; i != loops; ++i) {
 705                 if (hdsp_read(hdsp, HDSP_statusRegister) & HDSP_ConfigError)
 706                         msleep(delay);
 707                 else {
 708                         snd_printd("Hammerfall-DSP: iobox found after %ums!\n",
 709                                    i * delay);
 710                         return 0;
 711                 }
 712         }
 713
 714         snd_printk("Hammerfall-DSP: no IO box connected!\n");
 715         hdsp->state &= ~HDSP_FirmwareLoaded;
 716         return -EIO;
 717 }
 718
 719 static int snd_hdsp_load_firmware_from_cache(struct hdsp *hdsp) {
 720
 721         int i;
 722         unsigned long flags;
 723         const u32 *cache;
 724
 725         if (hdsp->fw_uploaded)
 726                 cache = hdsp->fw_uploaded;
 727         else {
 728                 if (!hdsp->firmware)
 729                         return -ENODEV;
 730                 cache = (u32 *)hdsp->firmware->data;
 731                 if (!cache)
 732                         return -ENODEV;
 733         }
 734
 735         if ((hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DllError) != 0) {
 736
 737                 snd_printk ("Hammerfall-DSP: loading firmware\n");
 738
 739                 hdsp_write (hdsp, HDSP_control2Reg, HDSP_S_PROGRAM);
 740                 hdsp_write (hdsp, HDSP_fifoData, 0);
 741
 742                 if (hdsp_fifo_wait (hdsp, 0, HDSP_LONG_WAIT)) {
 743                         snd_printk ("Hammerfall-DSP: timeout waiting for download preparation\n");
 744                         hdsp_write(hdsp, HDSP_control2Reg, HDSP_S200);
 745                         return -EIO;
 746                 }
 747
 748                 hdsp_write (hdsp, HDSP_control2Reg, HDSP_S_LOAD);
 749
 750                 for (i = 0; i < HDSP_FIRMWARE_SIZE / 4; ++i) {
 751                         hdsp_write(hdsp, HDSP_fifoData, cache[i]);
 752                         if (hdsp_fifo_wait (hdsp, 127, HDSP_LONG_WAIT)) {
 753                                 snd_printk ("Hammerfall-DSP: timeout during firmware loading\n");
 754                                 hdsp_write(hdsp, HDSP_control2Reg, HDSP_S200);
 755                                 return -EIO;
 756                         }
 757                 }
 758
 759                 hdsp_fifo_wait(hdsp, 3, HDSP_LONG_WAIT);
 760                 hdsp_write(hdsp, HDSP_control2Reg, HDSP_S200);
 761
 762                 ssleep(3);
 763 #ifdef SNDRV_BIG_ENDIAN
 764                 hdsp->control2_register = HDSP_BIGENDIAN_MODE;
 765 #else
 766                 hdsp->control2_register = 0;
 767 #endif
 768                 hdsp_write (hdsp, HDSP_control2Reg, hdsp->control2_register);
 769                 snd_printk ("Hammerfall-DSP: finished firmware loading\n");
 770
 771         }
 772         if (hdsp->state & HDSP_InitializationComplete) {
 773                 snd_printk(KERN_INFO "Hammerfall-DSP: firmware loaded from cache, restoring defaults\n");
 774                 spin_lock_irqsave(&hdsp->lock, flags);
 775                 snd_hdsp_set_defaults(hdsp);
 776                 spin_unlock_irqrestore(&hdsp->lock, flags);
 777         }
 778
 779         hdsp->state |= HDSP_FirmwareLoaded;
 780
 781         return 0;
 782 }
 783
 784 static int hdsp_get_iobox_version (struct hdsp *hdsp)
 785 {
 786         if ((hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DllError) != 0) {
 787
 788                 hdsp_write(hdsp, HDSP_control2Reg, HDSP_S_LOAD);
 789                 hdsp_write(hdsp, HDSP_fifoData, 0);
 790
 791                 if (hdsp_fifo_wait(hdsp, 0, HDSP_SHORT_WAIT) < 0) {
 792                         hdsp_write(hdsp, HDSP_control2Reg, HDSP_S300);
 793                         hdsp_write(hdsp, HDSP_control2Reg, HDSP_S_LOAD);
 794                 }
 795
 796                 hdsp_write(hdsp, HDSP_control2Reg, HDSP_S200 | HDSP_PROGRAM);
 797                 hdsp_write (hdsp, HDSP_fifoData, 0);
 798                 if (hdsp_fifo_wait(hdsp, 0, HDSP_SHORT_WAIT) < 0) {
 799                         hdsp->io_type = Multiface;
 800                         snd_printk("Hammerfall-DSP: Multiface found\n");
 801                         return 0;
 802                 }
 803
 804                 hdsp_write(hdsp, HDSP_control2Reg, HDSP_S_LOAD);
 805                 hdsp_write(hdsp, HDSP_fifoData, 0);
 806                 if (hdsp_fifo_wait(hdsp, 0, HDSP_SHORT_WAIT) == 0) {
 807                         hdsp->io_type = Digiface;
 808                         snd_printk("Hammerfall-DSP: Digiface found\n");
 809                         return 0;
 810                 }
 811
 812                 hdsp_write(hdsp, HDSP_control2Reg, HDSP_S300);
 813                 hdsp_write(hdsp, HDSP_control2Reg, HDSP_S_LOAD);
 814                 hdsp_write(hdsp, HDSP_fifoData, 0);
 815                 if (hdsp_fifo_wait(hdsp, 0, HDSP_SHORT_WAIT) == 0) {
 816                         hdsp->io_type = Multiface;
 817                         snd_printk("Hammerfall-DSP: Multiface found\n");
 818                         return 0;
 819                 }
 820
 821                 hdsp_write(hdsp, HDSP_control2Reg, HDSP_S300);
 822                 hdsp_write(hdsp, HDSP_control2Reg, HDSP_S_LOAD);
 823                 hdsp_write(hdsp, HDSP_fifoData, 0);
 824                 if (hdsp_fifo_wait(hdsp, 0, HDSP_SHORT_WAIT) < 0) {
 825                         hdsp->io_type = Multiface;
 826                         snd_printk("Hammerfall-DSP: Multiface found\n");
 827                         return 0;
 828                 }
 829
 830                 hdsp->io_type = RPM;
 831                 snd_printk("Hammerfall-DSP: RPM found\n");
 832                 return 0;
 833         } else {
 834                 /* firmware was already loaded, get iobox type */
 835                 if (hdsp_read(hdsp, HDSP_status2Register) & HDSP_version2)
 836                         hdsp->io_type = RPM;
 837                 else if (hdsp_read(hdsp, HDSP_status2Register) & HDSP_version1)
 838                         hdsp->io_type = Multiface;
 839                 else
 840                         hdsp->io_type = Digiface;
 841         }
 842         return 0;
 843 }
 844
 845
 846 static int hdsp_request_fw_loader(struct hdsp *hdsp);
 847
 848 static int hdsp_check_for_firmware (struct hdsp *hdsp, int load_on_demand)
 849 {
 850         if (hdsp->io_type == H9652 || hdsp->io_type == H9632)
 851                 return 0;
 852         if ((hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DllError) != 0) {
 853                 hdsp->state &= ~HDSP_FirmwareLoaded;
 854                 if (! load_on_demand)
 855                         return -EIO;
 856                 snd_printk(KERN_ERR "Hammerfall-DSP: firmware not present.\n");
 857                 /* try to load firmware */
 858                 if (! (hdsp->state & HDSP_FirmwareCached)) {
 859                         if (! hdsp_request_fw_loader(hdsp))
 860                                 return 0;
 861                         snd_printk(KERN_ERR
 862                                    "Hammerfall-DSP: No firmware loaded nor "
 863                                    "cached, please upload firmware.\n");
 864                         return -EIO;
 865                 }
 866                 if (snd_hdsp_load_firmware_from_cache(hdsp) != 0) {
 867                         snd_printk(KERN_ERR
 868                                    "Hammerfall-DSP: Firmware loading from "
 869                                    "cache failed, please upload manually.\n");
 870                         return -EIO;
 871                 }
 872         }
 873         return 0;
 874 }
 875
 876
 877 static int hdsp_fifo_wait(struct hdsp *hdsp, int count, int timeout)
 878 {
 879         int i;
 880
 881         /* the fifoStatus registers reports on how many words
 882            are available in the command FIFO.
 883         */
 884
 885         for (i = 0; i < timeout; i++) {
 886
 887                 if ((int)(hdsp_read (hdsp, HDSP_fifoStatus) & 0xff) <= count)
 888                         return 0;
 889
 890                 /* not very friendly, but we only do this during a firmware
 891                    load and changing the mixer, so we just put up with it.
 892                 */
 893
 894                 udelay (100);
 895         }
 896
 897         snd_printk ("Hammerfall-DSP: wait for FIFO status <= %d failed after %d iterations\n",
 898                     count, timeout);
 899         return -1;
 900 }
 901
 902 static int hdsp_read_gain (struct hdsp *hdsp, unsigned int addr)
 903 {
 904         if (addr >= HDSP_MATRIX_MIXER_SIZE)
 905                 return 0;
 906
 907         return hdsp->mixer_matrix[addr];
 908 }
 909
 910 static int hdsp_write_gain(struct hdsp *hdsp, unsigned int addr, unsigned short data)
 911 {
 912         unsigned int ad;
 913
 914         if (addr >= HDSP_MATRIX_MIXER_SIZE)
 915                 return -1;
 916
 917         if (hdsp->io_type == H9652 || hdsp->io_type == H9632) {
 918
 919                 /* from martin bjornsen:
 920
 921                    "You can only write dwords to the
 922                    mixer memory which contain two
 923                    mixer values in the low and high
 924                    word. So if you want to change
 925                    value 0 you have to read value 1
 926                    from the cache and write both to
 927                    the first dword in the mixer
 928                    memory."
 929                 */
 930
 931                 if (hdsp->io_type == H9632 && addr >= 512)
 932                         return 0;
 933
 934                 if (hdsp->io_type == H9652 && addr >= 1352)
 935                         return 0;
 936
 937                 hdsp->mixer_matrix[addr] = data;
 938
 939
 940                 /* `addr' addresses a 16-bit wide address, but
 941                    the address space accessed via hdsp_write
 942                    uses byte offsets. put another way, addr
 943                    varies from 0 to 1351, but to access the
 944                    corresponding memory location, we need
 945                    to access 0 to 2703 ...
 946                 */
 947                 ad = addr/2;
 948
 949                 hdsp_write (hdsp, 4096 + (ad*4),
 950                             (hdsp->mixer_matrix[(addr&0x7fe)+1] << 16) +
 951                             hdsp->mixer_matrix[addr&0x7fe]);
 952
 953                 return 0;
 954
 955         } else {
 956
 957                 ad = (addr << 16) + data;
 958
 959                 if (hdsp_fifo_wait(hdsp, 127, HDSP_LONG_WAIT))
 960                         return -1;
 961
 962                 hdsp_write (hdsp, HDSP_fifoData, ad);
 963                 hdsp->mixer_matrix[addr] = data;
 964
 965         }
 966
 967         return 0;
 968 }
 969
 970 static int snd_hdsp_use_is_exclusive(struct hdsp *hdsp)
 971 {
 972         unsigned long flags;
 973         int ret = 1;
 974
 975         spin_lock_irqsave(&hdsp->lock, flags);
 976         if ((hdsp->playback_pid != hdsp->capture_pid) &&
 977             (hdsp->playback_pid >= 0) && (hdsp->capture_pid >= 0))
 978                 ret = 0;
 979         spin_unlock_irqrestore(&hdsp->lock, flags);
 980         return ret;
 981 }
 982
 983 static int hdsp_spdif_sample_rate(struct hdsp *hdsp)
 984 {
 985         unsigned int status = hdsp_read(hdsp, HDSP_statusRegister);
 986         unsigned int rate_bits = (status & HDSP_spdifFrequencyMask);
 987
 988         /* For the 9632, the mask is different */
 989         if (hdsp->io_type == H9632)
 990                  rate_bits = (status & HDSP_spdifFrequencyMask_9632);
 991
 992         if (status & HDSP_SPDIFErrorFlag)
 993                 return 0;
 994
 995         switch (rate_bits) {
 996         case HDSP_spdifFrequency32KHz: return 32000;
 997         case HDSP_spdifFrequency44_1KHz: return 44100;
 998         case HDSP_spdifFrequency48KHz: return 48000;
 999         case HDSP_spdifFrequency64KHz: return 64000;
1000         case HDSP_spdifFrequency88_2KHz: return 88200;
1001         case HDSP_spdifFrequency96KHz: return 96000;
1002         case HDSP_spdifFrequency128KHz:
1003                 if (hdsp->io_type == H9632) return 128000;
1004                 break;
1005         case HDSP_spdifFrequency176_4KHz:
1006                 if (hdsp->io_type == H9632) return 176400;
1007                 break;
1008         case HDSP_spdifFrequency192KHz:
1009                 if (hdsp->io_type == H9632) return 192000;
1010                 break;
1011         default:
1012                 break;
1013         }
1014         snd_printk ("Hammerfall-DSP: unknown spdif frequency status; bits = 0x%x, status = 0x%x\n", rate_bits, status);
1015         return 0;
1016 }
1017
1018 static int hdsp_external_sample_rate(struct hdsp *hdsp)
1019 {
1020         unsigned int status2 = hdsp_read(hdsp, HDSP_status2Register);
1021         unsigned int rate_bits = status2 & HDSP_systemFrequencyMask;
1022
1023         /* For the 9632 card, there seems to be no bit for indicating external
1024          * sample rate greater than 96kHz. The card reports the corresponding
1025          * single speed. So the best means seems to get spdif rate when
1026          * autosync reference is spdif */
1027         if (hdsp->io_type == H9632 &&
1028             hdsp_autosync_ref(hdsp) == HDSP_AUTOSYNC_FROM_SPDIF)
1029                  return hdsp_spdif_sample_rate(hdsp);
1030
1031         switch (rate_bits) {
1032         case HDSP_systemFrequency32:   return 32000;
1033         case HDSP_systemFrequency44_1: return 44100;
1034         case HDSP_systemFrequency48:   return 48000;
1035         case HDSP_systemFrequency64:   return 64000;
1036         case HDSP_systemFrequency88_2: return 88200;
1037         case HDSP_systemFrequency96:   return 96000;
1038         default:
1039                 return 0;
1040         }
1041 }
1042
1043 static void hdsp_compute_period_size(struct hdsp *hdsp)
1044 {
1045         hdsp->period_bytes = 1 << ((hdsp_decode_latency(hdsp->control_register) + 8));
1046 }
1047
1048 static snd_pcm_uframes_t hdsp_hw_pointer(struct hdsp *hdsp)
1049 {
1050         int position;
1051
1052         position = hdsp_read(hdsp, HDSP_statusRegister);
1053
1054         if (!hdsp->precise_ptr)
1055                 return (position & HDSP_BufferID) ? (hdsp->period_bytes / 4) : 0;
1056
1057         position &= HDSP_BufferPositionMask;
1058         position /= 4;
1059         position &= (hdsp->period_bytes/2) - 1;
1060         return position;
1061 }
1062
1063 static void hdsp_reset_hw_pointer(struct hdsp *hdsp)
1064 {
1065         hdsp_write (hdsp, HDSP_resetPointer, 0);
1066         if (hdsp->io_type == H9632 && hdsp->firmware_rev >= 152)
1067                 /* HDSP_resetPointer = HDSP_freqReg, which is strange and
1068                  * requires (?) to write again DDS value after a reset pointer
1069                  * (at least, it works like this) */
1070                 hdsp_write (hdsp, HDSP_freqReg, hdsp->dds_value);
1071 }
1072
1073 static void hdsp_start_audio(struct hdsp *s)
1074 {
1075         s->control_register |= (HDSP_AudioInterruptEnable | HDSP_Start);
1076         hdsp_write(s, HDSP_controlRegister, s->control_register);
1077 }
1078
1079 static void hdsp_stop_audio(struct hdsp *s)
1080 {
1081         s->control_register &= ~(HDSP_Start | HDSP_AudioInterruptEnable);
1082         hdsp_write(s, HDSP_controlRegister, s->control_register);
1083 }
1084
1085 static void hdsp_silence_playback(struct hdsp *hdsp)
1086 {
1087         memset(hdsp->playback_buffer, 0, HDSP_DMA_AREA_BYTES);
1088 }
1089
1090 static int hdsp_set_interrupt_interval(struct hdsp *s, unsigned int frames)
1091 {
1092         int n;
1093
1094         spin_lock_irq(&s->lock);
1095
1096         frames >>= 7;
1097         n = 0;
1098         while (frames) {
1099                 n++;
1100                 frames >>= 1;
1101         }
1102
1103         s->control_register &= ~HDSP_LatencyMask;
1104         s->control_register |= hdsp_encode_latency(n);
1105
1106         hdsp_write(s, HDSP_controlRegister, s->control_register);
1107
1108         hdsp_compute_period_size(s);
1109
1110         spin_unlock_irq(&s->lock);
1111
1112         return 0;
1113 }
1114
1115 static void hdsp_set_dds_value(struct hdsp *hdsp, int rate)
1116 {
1117         u64 n;
1118
1119         if (rate >= 112000)
1120                 rate /= 4;
1121         else if (rate >= 56000)
1122                 rate /= 2;
1123
1124         n = DDS_NUMERATOR;
1125         n = div_u64(n, rate);
1126         /* n should be less than 2^32 for being written to FREQ register */
1127         snd_BUG_ON(n >> 32);
1128         /* HDSP_freqReg and HDSP_resetPointer are the same, so keep the DDS
1129            value to write it after a reset */
1130         hdsp->dds_value = n;
1131         hdsp_write(hdsp, HDSP_freqReg, hdsp->dds_value);
1132 }
1133
1134 static int hdsp_set_rate(struct hdsp *hdsp, int rate, int called_internally)
1135 {
1136         int reject_if_open = 0;
1137         int current_rate;
1138         int rate_bits;
1139
1140         /* ASSUMPTION: hdsp->lock is either held, or
1141            there is no need for it (e.g. during module
1142            initialization).
1143         */
1144
1145         if (!(hdsp->control_register & HDSP_ClockModeMaster)) {
1146                 if (called_internally) {
1147                         /* request from ctl or card initialization */
1148                         snd_printk(KERN_ERR "Hammerfall-DSP: device is not running as a clock master: cannot set sample rate.\n");
1149                         return -1;
1150                 } else {
1151                         /* hw_param request while in AutoSync mode */
1152                         int external_freq = hdsp_external_sample_rate(hdsp);
1153                         int spdif_freq = hdsp_spdif_sample_rate(hdsp);
1154
1155                         if ((spdif_freq == external_freq*2) && (hdsp_autosync_ref(hdsp) >= HDSP_AUTOSYNC_FROM_ADAT1))
1156                                 snd_printk(KERN_INFO "Hammerfall-DSP: Detected ADAT in double speed mode\n");
1157                         else if (hdsp->io_type == H9632 && (spdif_freq == external_freq*4) && (hdsp_autosync_ref(hdsp) >= HDSP_AUTOSYNC_FROM_ADAT1))
1158                                 snd_printk(KERN_INFO "Hammerfall-DSP: Detected ADAT in quad speed mode\n");
1159                         else if (rate != external_freq) {
1160                                 snd_printk(KERN_INFO "Hammerfall-DSP: No AutoSync source for requested rate\n");
1161                                 return -1;
1162                         }
1163                 }
1164         }
1165
1166         current_rate = hdsp->system_sample_rate;
1167
1168         /* Changing from a "single speed" to a "double speed" rate is
1169            not allowed if any substreams are open. This is because
1170            such a change causes a shift in the location of
1171            the DMA buffers and a reduction in the number of available
1172            buffers.
1173
1174            Note that a similar but essentially insoluble problem
1175            exists for externally-driven rate changes. All we can do
1176            is to flag rate changes in the read/write routines.  */
1177
1178         if (rate > 96000 && hdsp->io_type != H9632)
1179                 return -EINVAL;
1180
1181         switch (rate) {
1182         case 32000:
1183                 if (current_rate > 48000)
1184                         reject_if_open = 1;
1185                 rate_bits = HDSP_Frequency32KHz;
1186                 break;
1187         case 44100:
1188                 if (current_rate > 48000)
1189                         reject_if_open = 1;
1190                 rate_bits = HDSP_Frequency44_1KHz;
1191                 break;
1192         case 48000:
1193                 if (current_rate > 48000)
1194                         reject_if_open = 1;
1195                 rate_bits = HDSP_Frequency48KHz;
1196                 break;
1197         case 64000:
1198                 if (current_rate <= 48000 || current_rate > 96000)
1199                         reject_if_open = 1;
1200                 rate_bits = HDSP_Frequency64KHz;
1201                 break;
1202         case 88200:
1203                 if (current_rate <= 48000 || current_rate > 96000)
1204                         reject_if_open = 1;
1205                 rate_bits = HDSP_Frequency88_2KHz;
1206                 break;
1207         case 96000:
1208                 if (current_rate <= 48000 || current_rate > 96000)
1209                         reject_if_open = 1;
1210                 rate_bits = HDSP_Frequency96KHz;
1211                 break;
1212         case 128000:
1213                 if (current_rate < 128000)
1214                         reject_if_open = 1;
1215                 rate_bits = HDSP_Frequency128KHz;
1216                 break;
1217         case 176400:
1218                 if (current_rate < 128000)
1219                         reject_if_open = 1;
1220                 rate_bits = HDSP_Frequency176_4KHz;
1221                 break;
1222         case 192000:
1223                 if (current_rate < 128000)
1224                         reject_if_open = 1;
1225                 rate_bits = HDSP_Frequency192KHz;
1226                 break;
1227         default:
1228                 return -EINVAL;
1229         }
1230
1231         if (reject_if_open && (hdsp->capture_pid >= 0 || hdsp->playback_pid >= 0)) {
1232                 snd_printk ("Hammerfall-DSP: cannot change speed mode (capture PID = %d, playback PID = %d)\n",
1233                             hdsp->capture_pid,
1234                             hdsp->playback_pid);
1235                 return -EBUSY;
1236         }
1237
1238         hdsp->control_register &= ~HDSP_FrequencyMask;
1239         hdsp->control_register |= rate_bits;
1240         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1241
1242         /* For HDSP9632 rev 152, need to set DDS value in FREQ register */
1243         if (hdsp->io_type == H9632 && hdsp->firmware_rev >= 152)
1244                 hdsp_set_dds_value(hdsp, rate);
1245
1246         if (rate >= 128000) {
1247                 hdsp->channel_map = channel_map_H9632_qs;
1248         } else if (rate > 48000) {
1249                 if (hdsp->io_type == H9632)
1250                         hdsp->channel_map = channel_map_H9632_ds;
1251                 else
1252                         hdsp->channel_map = channel_map_ds;
1253         } else {
1254                 switch (hdsp->io_type) {
1255                 case RPM:
1256                 case Multiface:
1257                         hdsp->channel_map = channel_map_mf_ss;
1258                         break;
1259                 case Digiface:
1260                 case H9652:
1261                         hdsp->channel_map = channel_map_df_ss;
1262                         break;
1263                 case H9632:
1264                         hdsp->channel_map = channel_map_H9632_ss;
1265                         break;
1266                 default:
1267                         /* should never happen */
1268                         break;
1269                 }
1270         }
1271
1272         hdsp->system_sample_rate = rate;
1273
1274         return 0;
1275 }
1276
1277 /*----------------------------------------------------------------------------
1278    MIDI
1279   ----------------------------------------------------------------------------*/
1280
1281 static unsigned char snd_hdsp_midi_read_byte (struct hdsp *hdsp, int id)
1282 {
1283         /* the hardware already does the relevant bit-mask with 0xff */
1284         if (id)
1285                 return hdsp_read(hdsp, HDSP_midiDataIn1);
1286         else
1287                 return hdsp_read(hdsp, HDSP_midiDataIn0);
1288 }
1289
1290 static void snd_hdsp_midi_write_byte (struct hdsp *hdsp, int id, int val)
1291 {
1292         /* the hardware already does the relevant bit-mask with 0xff */
1293         if (id)
1294                 hdsp_write(hdsp, HDSP_midiDataOut1, val);
1295         else
1296                 hdsp_write(hdsp, HDSP_midiDataOut0, val);
1297 }
1298
1299 static int snd_hdsp_midi_input_available (struct hdsp *hdsp, int id)
1300 {
1301         if (id)
1302                 return (hdsp_read(hdsp, HDSP_midiStatusIn1) & 0xff);
1303         else
1304                 return (hdsp_read(hdsp, HDSP_midiStatusIn0) & 0xff);
1305 }
1306
1307 static int snd_hdsp_midi_output_possible (struct hdsp *hdsp, int id)
1308 {
1309         int fifo_bytes_used;
1310
1311         if (id)
1312                 fifo_bytes_used = hdsp_read(hdsp, HDSP_midiStatusOut1) & 0xff;
1313         else
1314                 fifo_bytes_used = hdsp_read(hdsp, HDSP_midiStatusOut0) & 0xff;
1315
1316         if (fifo_bytes_used < 128)
1317                 return  128 - fifo_bytes_used;
1318         else
1319                 return 0;
1320 }
1321
1322 static void snd_hdsp_flush_midi_input (struct hdsp *hdsp, int id)
1323 {
1324         while (snd_hdsp_midi_input_available (hdsp, id))
1325                 snd_hdsp_midi_read_byte (hdsp, id);
1326 }
1327
1328 static int snd_hdsp_midi_output_write (struct hdsp_midi *hmidi)
1329 {
1330         unsigned long flags;
1331         int n_pending;
1332         int to_write;
1333         int i;
1334         unsigned char buf[128];
1335
1336         /* Output is not interrupt driven */
1337
1338         spin_lock_irqsave (&hmidi->lock, flags);
1339         if (hmidi->output) {
1340                 if (!snd_rawmidi_transmit_empty (hmidi->output)) {
1341                         if ((n_pending = snd_hdsp_midi_output_possible (hmidi->hdsp, hmidi->id)) > 0) {
1342                                 if (n_pending > (int)sizeof (buf))
1343                                         n_pending = sizeof (buf);
1344
1345                                 if ((to_write = snd_rawmidi_transmit (hmidi->output, buf, n_pending)) > 0) {
1346                                         for (i = 0; i < to_write; ++i)
1347                                                 snd_hdsp_midi_write_byte (hmidi->hdsp, hmidi->id, buf[i]);
1348                                 }
1349                         }
1350                 }
1351         }
1352         spin_unlock_irqrestore (&hmidi->lock, flags);
1353         return 0;
1354 }
1355
1356 static int snd_hdsp_midi_input_read (struct hdsp_midi *hmidi)
1357 {
1358         unsigned char buf[128]; /* this buffer is designed to match the MIDI input FIFO size */
1359         unsigned long flags;
1360         int n_pending;
1361         int i;
1362
1363         spin_lock_irqsave (&hmidi->lock, flags);
1364         if ((n_pending = snd_hdsp_midi_input_available (hmidi->hdsp, hmidi->id)) > 0) {
1365                 if (hmidi->input) {
1366                         if (n_pending > (int)sizeof (buf))
1367                                 n_pending = sizeof (buf);
1368                         for (i = 0; i < n_pending; ++i)
1369                                 buf[i] = snd_hdsp_midi_read_byte (hmidi->hdsp, hmidi->id);
1370                         if (n_pending)
1371                                 snd_rawmidi_receive (hmidi->input, buf, n_pending);
1372                 } else {
1373                         /* flush the MIDI input FIFO */
1374                         while (--n_pending)
1375                                 snd_hdsp_midi_read_byte (hmidi->hdsp, hmidi->id);
1376                 }
1377         }
1378         hmidi->pending = 0;
1379         if (hmidi->id)
1380                 hmidi->hdsp->control_register |= HDSP_Midi1InterruptEnable;
1381         else
1382                 hmidi->hdsp->control_register |= HDSP_Midi0InterruptEnable;
1383         hdsp_write(hmidi->hdsp, HDSP_controlRegister, hmidi->hdsp->control_register);
1384         spin_unlock_irqrestore (&hmidi->lock, flags);
1385         return snd_hdsp_midi_output_write (hmidi);
1386 }
1387
1388 static void snd_hdsp_midi_input_trigger(struct snd_rawmidi_substream *substream, int up)
1389 {
1390         struct hdsp *hdsp;
1391         struct hdsp_midi *hmidi;
1392         unsigned long flags;
1393         u32 ie;
1394
1395         hmidi = (struct hdsp_midi *) substream->rmidi->private_data;
1396         hdsp = hmidi->hdsp;
1397         ie = hmidi->id ? HDSP_Midi1InterruptEnable : HDSP_Midi0InterruptEnable;
1398         spin_lock_irqsave (&hdsp->lock, flags);
1399         if (up) {
1400                 if (!(hdsp->control_register & ie)) {
1401                         snd_hdsp_flush_midi_input (hdsp, hmidi->id);
1402                         hdsp->control_register |= ie;
1403                 }
1404         } else {
1405                 hdsp->control_register &= ~ie;
1406                 tasklet_kill(&hdsp->midi_tasklet);
1407         }
1408
1409         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1410         spin_unlock_irqrestore (&hdsp->lock, flags);
1411 }
1412
1413 static void snd_hdsp_midi_output_timer(unsigned long data)
1414 {
1415         struct hdsp_midi *hmidi = (struct hdsp_midi *) data;
1416         unsigned long flags;
1417
1418         snd_hdsp_midi_output_write(hmidi);
1419         spin_lock_irqsave (&hmidi->lock, flags);
1420
1421         /* this does not bump hmidi->istimer, because the
1422            kernel automatically removed the timer when it
1423            expired, and we are now adding it back, thus
1424            leaving istimer wherever it was set before.
1425         */
1426
1427         if (hmidi->istimer) {
1428                 hmidi->timer.expires = 1 + jiffies;
1429                 add_timer(&hmidi->timer);
1430         }
1431
1432         spin_unlock_irqrestore (&hmidi->lock, flags);
1433 }
1434
1435 static void snd_hdsp_midi_output_trigger(struct snd_rawmidi_substream *substream, int up)
1436 {
1437         struct hdsp_midi *hmidi;
1438         unsigned long flags;
1439
1440         hmidi = (struct hdsp_midi *) substream->rmidi->private_data;
1441         spin_lock_irqsave (&hmidi->lock, flags);
1442         if (up) {
1443                 if (!hmidi->istimer) {
1444                         init_timer(&hmidi->timer);
1445                         hmidi->timer.function = snd_hdsp_midi_output_timer;
1446                         hmidi->timer.data = (unsigned long) hmidi;
1447                         hmidi->timer.expires = 1 + jiffies;
1448                         add_timer(&hmidi->timer);
1449                         hmidi->istimer++;
1450                 }
1451         } else {
1452                 if (hmidi->istimer && --hmidi->istimer <= 0)
1453                         del_timer (&hmidi->timer);
1454         }
1455         spin_unlock_irqrestore (&hmidi->lock, flags);
1456         if (up)
1457                 snd_hdsp_midi_output_write(hmidi);
1458 }
1459
1460 static int snd_hdsp_midi_input_open(struct snd_rawmidi_substream *substream)
1461 {
1462         struct hdsp_midi *hmidi;
1463
1464         hmidi = (struct hdsp_midi *) substream->rmidi->private_data;
1465         spin_lock_irq (&hmidi->lock);
1466         snd_hdsp_flush_midi_input (hmidi->hdsp, hmidi->id);
1467         hmidi->input = substream;
1468         spin_unlock_irq (&hmidi->lock);
1469
1470         return 0;
1471 }
1472
1473 static int snd_hdsp_midi_output_open(struct snd_rawmidi_substream *substream)
1474 {
1475         struct hdsp_midi *hmidi;
1476
1477         hmidi = (struct hdsp_midi *) substream->rmidi->private_data;
1478         spin_lock_irq (&hmidi->lock);
1479         hmidi->output = substream;
1480         spin_unlock_irq (&hmidi->lock);
1481
1482         return 0;
1483 }
1484
1485 static int snd_hdsp_midi_input_close(struct snd_rawmidi_substream *substream)
1486 {
1487         struct hdsp_midi *hmidi;
1488
1489         snd_hdsp_midi_input_trigger (substream, 0);
1490
1491         hmidi = (struct hdsp_midi *) substream->rmidi->private_data;
1492         spin_lock_irq (&hmidi->lock);
1493         hmidi->input = NULL;
1494         spin_unlock_irq (&hmidi->lock);
1495
1496         return 0;
1497 }
1498
1499 static int snd_hdsp_midi_output_close(struct snd_rawmidi_substream *substream)
1500 {
1501         struct hdsp_midi *hmidi;
1502
1503         snd_hdsp_midi_output_trigger (substream, 0);
1504
1505         hmidi = (struct hdsp_midi *) substream->rmidi->private_data;
1506         spin_lock_irq (&hmidi->lock);
1507         hmidi->output = NULL;
1508         spin_unlock_irq (&hmidi->lock);
1509
1510         return 0;
1511 }
1512
1513 static struct snd_rawmidi_ops snd_hdsp_midi_output =
1514 {
1515         .open =         snd_hdsp_midi_output_open,
1516         .close =        snd_hdsp_midi_output_close,
1517         .trigger =      snd_hdsp_midi_output_trigger,
1518 };
1519
1520 static struct snd_rawmidi_ops snd_hdsp_midi_input =
1521 {
1522         .open =         snd_hdsp_midi_input_open,
1523         .close =        snd_hdsp_midi_input_close,
1524         .trigger =      snd_hdsp_midi_input_trigger,
1525 };
1526
1527 static int snd_hdsp_create_midi (struct snd_card *card, struct hdsp *hdsp, int id)
1528 {
1529         char buf[32];
1530
1531         hdsp->midi[id].id = id;
1532         hdsp->midi[id].rmidi = NULL;
1533         hdsp->midi[id].input = NULL;
1534         hdsp->midi[id].output = NULL;
1535         hdsp->midi[id].hdsp = hdsp;
1536         hdsp->midi[id].istimer = 0;
1537         hdsp->midi[id].pending = 0;
1538         spin_lock_init (&hdsp->midi[id].lock);
1539
1540         sprintf (buf, "%s MIDI %d", card->shortname, id+1);
1541         if (snd_rawmidi_new (card, buf, id, 1, 1, &hdsp->midi[id].rmidi) < 0)
1542                 return -1;
1543
1544         sprintf(hdsp->midi[id].rmidi->name, "HDSP MIDI %d", id+1);
1545         hdsp->midi[id].rmidi->private_data = &hdsp->midi[id];
1546
1547         snd_rawmidi_set_ops (hdsp->midi[id].rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT, &snd_hdsp_midi_output);
1548         snd_rawmidi_set_ops (hdsp->midi[id].rmidi, SNDRV_RAWMIDI_STREAM_INPUT, &snd_hdsp_midi_input);
1549
1550         hdsp->midi[id].rmidi->info_flags |= SNDRV_RAWMIDI_INFO_OUTPUT |
1551                 SNDRV_RAWMIDI_INFO_INPUT |
1552                 SNDRV_RAWMIDI_INFO_DUPLEX;
1553
1554         return 0;
1555 }
1556
1557 /*-----------------------------------------------------------------------------
1558   Control Interface
1559   ----------------------------------------------------------------------------*/
1560
1561 static u32 snd_hdsp_convert_from_aes(struct snd_aes_iec958 *aes)
1562 {
1563         u32 val = 0;
1564         val |= (aes->status[0] & IEC958_AES0_PROFESSIONAL) ? HDSP_SPDIFProfessional : 0;
1565         val |= (aes->status[0] & IEC958_AES0_NONAUDIO) ? HDSP_SPDIFNonAudio : 0;
1566         if (val & HDSP_SPDIFProfessional)
1567                 val |= (aes->status[0] & IEC958_AES0_PRO_EMPHASIS_5015) ? HDSP_SPDIFEmphasis : 0;
1568         else
1569                 val |= (aes->status[0] & IEC958_AES0_CON_EMPHASIS_5015) ? HDSP_SPDIFEmphasis : 0;
1570         return val;
1571 }
1572
1573 static void snd_hdsp_convert_to_aes(struct snd_aes_iec958 *aes, u32 val)
1574 {
1575         aes->status[0] = ((val & HDSP_SPDIFProfessional) ? IEC958_AES0_PROFESSIONAL : 0) |
1576                          ((val & HDSP_SPDIFNonAudio) ? IEC958_AES0_NONAUDIO : 0);
1577         if (val & HDSP_SPDIFProfessional)
1578                 aes->status[0] |= (val & HDSP_SPDIFEmphasis) ? IEC958_AES0_PRO_EMPHASIS_5015 : 0;
1579         else
1580                 aes->status[0] |= (val & HDSP_SPDIFEmphasis) ? IEC958_AES0_CON_EMPHASIS_5015 : 0;
1581 }
1582
1583 static int snd_hdsp_control_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1584 {
1585         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1586         uinfo->count = 1;
1587         return 0;
1588 }
1589
1590 static int snd_hdsp_control_spdif_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1591 {
1592         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1593
1594         snd_hdsp_convert_to_aes(&ucontrol->value.iec958, hdsp->creg_spdif);
1595         return 0;
1596 }
1597
1598 static int snd_hdsp_control_spdif_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1599 {
1600         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1601         int change;
1602         u32 val;
1603
1604         val = snd_hdsp_convert_from_aes(&ucontrol->value.iec958);
1605         spin_lock_irq(&hdsp->lock);
1606         change = val != hdsp->creg_spdif;
1607         hdsp->creg_spdif = val;
1608         spin_unlock_irq(&hdsp->lock);
1609         return change;
1610 }
1611
1612 static int snd_hdsp_control_spdif_stream_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1613 {
1614         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1615         uinfo->count = 1;
1616         return 0;
1617 }
1618
1619 static int snd_hdsp_control_spdif_stream_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1620 {
1621         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1622
1623         snd_hdsp_convert_to_aes(&ucontrol->value.iec958, hdsp->creg_spdif_stream);
1624         return 0;
1625 }
1626
1627 static int snd_hdsp_control_spdif_stream_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1628 {
1629         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1630         int change;
1631         u32 val;
1632
1633         val = snd_hdsp_convert_from_aes(&ucontrol->value.iec958);
1634         spin_lock_irq(&hdsp->lock);
1635         change = val != hdsp->creg_spdif_stream;
1636         hdsp->creg_spdif_stream = val;
1637         hdsp->control_register &= ~(HDSP_SPDIFProfessional | HDSP_SPDIFNonAudio | HDSP_SPDIFEmphasis);
1638         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register |= val);
1639         spin_unlock_irq(&hdsp->lock);
1640         return change;
1641 }
1642
1643 static int snd_hdsp_control_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1644 {
1645         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1646         uinfo->count = 1;
1647         return 0;
1648 }
1649
1650 static int snd_hdsp_control_spdif_mask_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1651 {
1652         ucontrol->value.iec958.status[0] = kcontrol->private_value;
1653         return 0;
1654 }
1655
1656 #define HDSP_SPDIF_IN(xname, xindex) \
1657 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1658   .name = xname, \
1659   .index = xindex, \
1660   .info = snd_hdsp_info_spdif_in, \
1661   .get = snd_hdsp_get_spdif_in, \
1662   .put = snd_hdsp_put_spdif_in }
1663
1664 static unsigned int hdsp_spdif_in(struct hdsp *hdsp)
1665 {
1666         return hdsp_decode_spdif_in(hdsp->control_register & HDSP_SPDIFInputMask);
1667 }
1668
1669 static int hdsp_set_spdif_input(struct hdsp *hdsp, int in)
1670 {
1671         hdsp->control_register &= ~HDSP_SPDIFInputMask;
1672         hdsp->control_register |= hdsp_encode_spdif_in(in);
1673         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1674         return 0;
1675 }
1676
1677 static int snd_hdsp_info_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1678 {
1679         static char *texts[4] = {"Optical", "Coaxial", "Internal", "AES"};
1680         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1681
1682         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1683         uinfo->count = 1;
1684         uinfo->value.enumerated.items = ((hdsp->io_type == H9632) ? 4 : 3);
1685         if (uinfo->value.enumerated.item > ((hdsp->io_type == H9632) ? 3 : 2))
1686                 uinfo->value.enumerated.item = ((hdsp->io_type == H9632) ? 3 : 2);
1687         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1688         return 0;
1689 }
1690
1691 static int snd_hdsp_get_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1692 {
1693         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1694
1695         ucontrol->value.enumerated.item[0] = hdsp_spdif_in(hdsp);
1696         return 0;
1697 }
1698
1699 static int snd_hdsp_put_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1700 {
1701         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1702         int change;
1703         unsigned int val;
1704
1705         if (!snd_hdsp_use_is_exclusive(hdsp))
1706                 return -EBUSY;
1707         val = ucontrol->value.enumerated.item[0] % ((hdsp->io_type == H9632) ? 4 : 3);
1708         spin_lock_irq(&hdsp->lock);
1709         change = val != hdsp_spdif_in(hdsp);
1710         if (change)
1711                 hdsp_set_spdif_input(hdsp, val);
1712         spin_unlock_irq(&hdsp->lock);
1713         return change;
1714 }
1715
1716 #define HDSP_TOGGLE_SETTING(xname, xindex) \
1717 {   .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1718         .name = xname, \
1719         .private_value = xindex, \
1720         .info = snd_hdsp_info_toggle_setting, \
1721         .get = snd_hdsp_get_toggle_setting, \
1722         .put = snd_hdsp_put_toggle_setting \
1723 }
1724
1725 static int hdsp_toggle_setting(struct hdsp *hdsp, u32 regmask)
1726 {
1727         return (hdsp->control_register & regmask) ? 1 : 0;
1728 }
1729
1730 static int hdsp_set_toggle_setting(struct hdsp *hdsp, u32 regmask, int out)
1731 {
1732         if (out)
1733                 hdsp->control_register |= regmask;
1734         else
1735                 hdsp->control_register &= ~regmask;
1736         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1737
1738         return 0;
1739 }
1740
1741 #define snd_hdsp_info_toggle_setting               snd_ctl_boolean_mono_info
1742
1743 static int snd_hdsp_get_toggle_setting(struct snd_kcontrol *kcontrol,
1744                 struct snd_ctl_elem_value *ucontrol)
1745 {
1746         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1747         u32 regmask = kcontrol->private_value;
1748
1749         spin_lock_irq(&hdsp->lock);
1750         ucontrol->value.integer.value[0] = hdsp_toggle_setting(hdsp, regmask);
1751         spin_unlock_irq(&hdsp->lock);
1752         return 0;
1753 }
1754
1755 static int snd_hdsp_put_toggle_setting(struct snd_kcontrol *kcontrol,
1756                 struct snd_ctl_elem_value *ucontrol)
1757 {
1758         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1759         u32 regmask = kcontrol->private_value;
1760         int change;
1761         unsigned int val;
1762
1763         if (!snd_hdsp_use_is_exclusive(hdsp))
1764                 return -EBUSY;
1765         val = ucontrol->value.integer.value[0] & 1;
1766         spin_lock_irq(&hdsp->lock);
1767         change = (int) val != hdsp_toggle_setting(hdsp, regmask);
1768         if (change)
1769                 hdsp_set_toggle_setting(hdsp, regmask, val);
1770         spin_unlock_irq(&hdsp->lock);
1771         return change;
1772 }
1773
1774 #define HDSP_SPDIF_SAMPLE_RATE(xname, xindex) \
1775 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1776   .name = xname, \
1777   .index = xindex, \
1778   .access = SNDRV_CTL_ELEM_ACCESS_READ, \
1779   .info = snd_hdsp_info_spdif_sample_rate, \
1780   .get = snd_hdsp_get_spdif_sample_rate \
1781 }
1782
1783 static int snd_hdsp_info_spdif_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1784 {
1785         static char *texts[] = {"32000", "44100", "48000", "64000", "88200", "96000", "None", "128000", "176400", "192000"};
1786         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1787
1788         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1789         uinfo->count = 1;
1790         uinfo->value.enumerated.items = (hdsp->io_type == H9632) ? 10 : 7;
1791         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1792                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1793         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1794         return 0;
1795 }
1796
1797 static int snd_hdsp_get_spdif_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1798 {
1799         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1800
1801         switch (hdsp_spdif_sample_rate(hdsp)) {
1802         case 32000:
1803                 ucontrol->value.enumerated.item[0] = 0;
1804                 break;
1805         case 44100:
1806                 ucontrol->value.enumerated.item[0] = 1;
1807                 break;
1808         case 48000:
1809                 ucontrol->value.enumerated.item[0] = 2;
1810                 break;
1811         case 64000:
1812                 ucontrol->value.enumerated.item[0] = 3;
1813                 break;
1814         case 88200:
1815                 ucontrol->value.enumerated.item[0] = 4;
1816                 break;
1817         case 96000:
1818                 ucontrol->value.enumerated.item[0] = 5;
1819                 break;
1820         case 128000:
1821                 ucontrol->value.enumerated.item[0] = 7;
1822                 break;
1823         case 176400:
1824                 ucontrol->value.enumerated.item[0] = 8;
1825                 break;
1826         case 192000:
1827                 ucontrol->value.enumerated.item[0] = 9;
1828                 break;
1829         default:
1830                 ucontrol->value.enumerated.item[0] = 6;
1831         }
1832         return 0;
1833 }
1834
1835 #define HDSP_SYSTEM_SAMPLE_RATE(xname, xindex) \
1836 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1837   .name = xname, \
1838   .index = xindex, \
1839   .access = SNDRV_CTL_ELEM_ACCESS_READ, \
1840   .info = snd_hdsp_info_system_sample_rate, \
1841   .get = snd_hdsp_get_system_sample_rate \
1842 }
1843
1844 static int snd_hdsp_info_system_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1845 {
1846         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1847         uinfo->count = 1;
1848         return 0;
1849 }
1850
1851 static int snd_hdsp_get_system_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1852 {
1853         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1854
1855         ucontrol->value.enumerated.item[0] = hdsp->system_sample_rate;
1856         return 0;
1857 }
1858
1859 #define HDSP_AUTOSYNC_SAMPLE_RATE(xname, xindex) \
1860 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1861   .name = xname, \
1862   .index = xindex, \
1863   .access = SNDRV_CTL_ELEM_ACCESS_READ, \
1864   .info = snd_hdsp_info_autosync_sample_rate, \
1865   .get = snd_hdsp_get_autosync_sample_rate \
1866 }
1867
1868 static int snd_hdsp_info_autosync_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1869 {
1870         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1871         static char *texts[] = {"32000", "44100", "48000", "64000", "88200", "96000", "None", "128000", "176400", "192000"};
1872         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1873         uinfo->count = 1;
1874         uinfo->value.enumerated.items = (hdsp->io_type == H9632) ? 10 : 7 ;
1875         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1876                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1877         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1878         return 0;
1879 }
1880
1881 static int snd_hdsp_get_autosync_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1882 {
1883         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1884
1885         switch (hdsp_external_sample_rate(hdsp)) {
1886         case 32000:
1887                 ucontrol->value.enumerated.item[0] = 0;
1888                 break;
1889         case 44100:
1890                 ucontrol->value.enumerated.item[0] = 1;
1891                 break;
1892         case 48000:
1893                 ucontrol->value.enumerated.item[0] = 2;
1894                 break;
1895         case 64000:
1896                 ucontrol->value.enumerated.item[0] = 3;
1897                 break;
1898         case 88200:
1899                 ucontrol->value.enumerated.item[0] = 4;
1900                 break;
1901         case 96000:
1902                 ucontrol->value.enumerated.item[0] = 5;
1903                 break;
1904         case 128000:
1905                 ucontrol->value.enumerated.item[0] = 7;
1906                 break;
1907         case 176400:
1908                 ucontrol->value.enumerated.item[0] = 8;
1909                 break;
1910         case 192000:
1911                 ucontrol->value.enumerated.item[0] = 9;
1912                 break;
1913         default:
1914                 ucontrol->value.enumerated.item[0] = 6;
1915         }
1916         return 0;
1917 }
1918
1919 #define HDSP_SYSTEM_CLOCK_MODE(xname, xindex) \
1920 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1921   .name = xname, \
1922   .index = xindex, \
1923   .access = SNDRV_CTL_ELEM_ACCESS_READ, \
1924   .info = snd_hdsp_info_system_clock_mode, \
1925   .get = snd_hdsp_get_system_clock_mode \
1926 }
1927
1928 static int hdsp_system_clock_mode(struct hdsp *hdsp)
1929 {
1930         if (hdsp->control_register & HDSP_ClockModeMaster)
1931                 return 0;
1932         else if (hdsp_external_sample_rate(hdsp) != hdsp->system_sample_rate)
1933                         return 0;
1934         return 1;
1935 }
1936
1937 static int snd_hdsp_info_system_clock_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1938 {
1939         static char *texts[] = {"Master", "Slave" };
1940
1941         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1942         uinfo->count = 1;
1943         uinfo->value.enumerated.items = 2;
1944         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1945                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1946         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1947         return 0;
1948 }
1949
1950 static int snd_hdsp_get_system_clock_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1951 {
1952         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1953
1954         ucontrol->value.enumerated.item[0] = hdsp_system_clock_mode(hdsp);
1955         return 0;
1956 }
1957
1958 #define HDSP_CLOCK_SOURCE(xname, xindex) \
1959 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1960   .name = xname, \
1961   .index = xindex, \
1962   .info = snd_hdsp_info_clock_source, \
1963   .get = snd_hdsp_get_clock_source, \
1964   .put = snd_hdsp_put_clock_source \
1965 }
1966
1967 static int hdsp_clock_source(struct hdsp *hdsp)
1968 {
1969         if (hdsp->control_register & HDSP_ClockModeMaster) {
1970                 switch (hdsp->system_sample_rate) {
1971                 case 32000:
1972                         return 1;
1973                 case 44100:
1974                         return 2;
1975                 case 48000:
1976                         return 3;
1977                 case 64000:
1978                         return 4;
1979                 case 88200:
1980                         return 5;
1981                 case 96000:
1982                         return 6;
1983                 case 128000:
1984                         return 7;
1985                 case 176400:
1986                         return 8;
1987                 case 192000:
1988                         return 9;
1989                 default:
1990                         return 3;
1991                 }
1992         } else {
1993                 return 0;
1994         }
1995 }
1996
1997 static int hdsp_set_clock_source(struct hdsp *hdsp, int mode)
1998 {
1999         int rate;
2000         switch (mode) {
2001         case HDSP_CLOCK_SOURCE_AUTOSYNC:
2002                 if (hdsp_external_sample_rate(hdsp) != 0) {
2003                     if (!hdsp_set_rate(hdsp, hdsp_external_sample_rate(hdsp), 1)) {
2004                         hdsp->control_register &= ~HDSP_ClockModeMaster;
2005                         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2006                         return 0;
2007                     }
2008                 }
2009                 return -1;
2010         case HDSP_CLOCK_SOURCE_INTERNAL_32KHZ:
2011                 rate = 32000;
2012                 break;
2013         case HDSP_CLOCK_SOURCE_INTERNAL_44_1KHZ:
2014                 rate = 44100;
2015                 break;
2016         case HDSP_CLOCK_SOURCE_INTERNAL_48KHZ:
2017                 rate = 48000;
2018                 break;
2019         case HDSP_CLOCK_SOURCE_INTERNAL_64KHZ:
2020                 rate = 64000;
2021                 break;
2022         case HDSP_CLOCK_SOURCE_INTERNAL_88_2KHZ:
2023                 rate = 88200;
2024                 break;
2025         case HDSP_CLOCK_SOURCE_INTERNAL_96KHZ:
2026                 rate = 96000;
2027                 break;
2028         case HDSP_CLOCK_SOURCE_INTERNAL_128KHZ:
2029                 rate = 128000;
2030                 break;
2031         case HDSP_CLOCK_SOURCE_INTERNAL_176_4KHZ:
2032                 rate = 176400;
2033                 break;
2034         case HDSP_CLOCK_SOURCE_INTERNAL_192KHZ:
2035                 rate = 192000;
2036                 break;
2037         default:
2038                 rate = 48000;
2039         }
2040         hdsp->control_register |= HDSP_ClockModeMaster;
2041         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2042         hdsp_set_rate(hdsp, rate, 1);
2043         return 0;
2044 }
2045
2046 static int snd_hdsp_info_clock_source(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2047 {
2048         static char *texts[] = {"AutoSync", "Internal 32.0 kHz", "Internal 44.1 kHz", "Internal 48.0 kHz", "Internal 64.0 kHz", "Internal 88.2 kHz", "Internal 96.0 kHz", "Internal 128 kHz", "Internal 176.4 kHz", "Internal 192.0 KHz" };
2049         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2050
2051         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2052         uinfo->count = 1;
2053         if (hdsp->io_type == H9632)
2054             uinfo->value.enumerated.items = 10;
2055         else
2056             uinfo->value.enumerated.items = 7;
2057         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2058                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2059         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2060         return 0;
2061 }
2062
2063 static int snd_hdsp_get_clock_source(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2064 {
2065         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2066
2067         ucontrol->value.enumerated.item[0] = hdsp_clock_source(hdsp);
2068         return 0;
2069 }
2070
2071 static int snd_hdsp_put_clock_source(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2072 {
2073         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2074         int change;
2075         int val;
2076
2077         if (!snd_hdsp_use_is_exclusive(hdsp))
2078                 return -EBUSY;
2079         val = ucontrol->value.enumerated.item[0];
2080         if (val < 0) val = 0;
2081         if (hdsp->io_type == H9632) {
2082                 if (val > 9)
2083                         val = 9;
2084         } else {
2085                 if (val > 6)
2086                         val = 6;
2087         }
2088         spin_lock_irq(&hdsp->lock);
2089         if (val != hdsp_clock_source(hdsp))
2090                 change = (hdsp_set_clock_source(hdsp, val) == 0) ? 1 : 0;
2091         else
2092                 change = 0;
2093         spin_unlock_irq(&hdsp->lock);
2094         return change;
2095 }
2096
2097 #define snd_hdsp_info_clock_source_lock         snd_ctl_boolean_mono_info
2098
2099 static int snd_hdsp_get_clock_source_lock(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2100 {
2101         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2102
2103         ucontrol->value.integer.value[0] = hdsp->clock_source_locked;
2104         return 0;
2105 }
2106
2107 static int snd_hdsp_put_clock_source_lock(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2108 {
2109         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2110         int change;
2111
2112         change = (int)ucontrol->value.integer.value[0] != hdsp->clock_source_locked;
2113         if (change)
2114                 hdsp->clock_source_locked = !!ucontrol->value.integer.value[0];
2115         return change;
2116 }
2117
2118 #define HDSP_DA_GAIN(xname, xindex) \
2119 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2120   .name = xname, \
2121   .index = xindex, \
2122   .info = snd_hdsp_info_da_gain, \
2123   .get = snd_hdsp_get_da_gain, \
2124   .put = snd_hdsp_put_da_gain \
2125 }
2126
2127 static int hdsp_da_gain(struct hdsp *hdsp)
2128 {
2129         switch (hdsp->control_register & HDSP_DAGainMask) {
2130         case HDSP_DAGainHighGain:
2131                 return 0;
2132         case HDSP_DAGainPlus4dBu:
2133                 return 1;
2134         case HDSP_DAGainMinus10dBV:
2135                 return 2;
2136         default:
2137                 return 1;
2138         }
2139 }
2140
2141 static int hdsp_set_da_gain(struct hdsp *hdsp, int mode)
2142 {
2143         hdsp->control_register &= ~HDSP_DAGainMask;
2144         switch (mode) {
2145         case 0:
2146                 hdsp->control_register |= HDSP_DAGainHighGain;
2147                 break;
2148         case 1:
2149                 hdsp->control_register |= HDSP_DAGainPlus4dBu;
2150                 break;
2151         case 2:
2152                 hdsp->control_register |= HDSP_DAGainMinus10dBV;
2153                 break;
2154         default:
2155                 return -1;
2156
2157         }
2158         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2159         return 0;
2160 }
2161
2162 static int snd_hdsp_info_da_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2163 {
2164         static char *texts[] = {"Hi Gain", "+4 dBu", "-10 dbV"};
2165
2166         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2167         uinfo->count = 1;
2168         uinfo->value.enumerated.items = 3;
2169         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2170                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2171         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2172         return 0;
2173 }
2174
2175 static int snd_hdsp_get_da_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2176 {
2177         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2178
2179         ucontrol->value.enumerated.item[0] = hdsp_da_gain(hdsp);
2180         return 0;
2181 }
2182
2183 static int snd_hdsp_put_da_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2184 {
2185         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2186         int change;
2187         int val;
2188
2189         if (!snd_hdsp_use_is_exclusive(hdsp))
2190                 return -EBUSY;
2191         val = ucontrol->value.enumerated.item[0];
2192         if (val < 0) val = 0;
2193         if (val > 2) val = 2;
2194         spin_lock_irq(&hdsp->lock);
2195         if (val != hdsp_da_gain(hdsp))
2196                 change = (hdsp_set_da_gain(hdsp, val) == 0) ? 1 : 0;
2197         else
2198                 change = 0;
2199         spin_unlock_irq(&hdsp->lock);
2200         return change;
2201 }
2202
2203 #define HDSP_AD_GAIN(xname, xindex) \
2204 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2205   .name = xname, \
2206   .index = xindex, \
2207   .info = snd_hdsp_info_ad_gain, \
2208   .get = snd_hdsp_get_ad_gain, \
2209   .put = snd_hdsp_put_ad_gain \
2210 }
2211
2212 static int hdsp_ad_gain(struct hdsp *hdsp)
2213 {
2214         switch (hdsp->control_register & HDSP_ADGainMask) {
2215         case HDSP_ADGainMinus10dBV:
2216                 return 0;
2217         case HDSP_ADGainPlus4dBu:
2218                 return 1;
2219         case HDSP_ADGainLowGain:
2220                 return 2;
2221         default:
2222                 return 1;
2223         }
2224 }
2225
2226 static int hdsp_set_ad_gain(struct hdsp *hdsp, int mode)
2227 {
2228         hdsp->control_register &= ~HDSP_ADGainMask;
2229         switch (mode) {
2230         case 0:
2231                 hdsp->control_register |= HDSP_ADGainMinus10dBV;
2232                 break;
2233         case 1:
2234                 hdsp->control_register |= HDSP_ADGainPlus4dBu;
2235                 break;
2236         case 2:
2237                 hdsp->control_register |= HDSP_ADGainLowGain;
2238                 break;
2239         default:
2240                 return -1;
2241
2242         }
2243         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2244         return 0;
2245 }
2246
2247 static int snd_hdsp_info_ad_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2248 {
2249         static char *texts[] = {"-10 dBV", "+4 dBu", "Lo Gain"};
2250
2251         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2252         uinfo->count = 1;
2253         uinfo->value.enumerated.items = 3;
2254         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2255                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2256         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2257         return 0;
2258 }
2259
2260 static int snd_hdsp_get_ad_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2261 {
2262         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2263
2264         ucontrol->value.enumerated.item[0] = hdsp_ad_gain(hdsp);
2265         return 0;
2266 }
2267
2268 static int snd_hdsp_put_ad_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2269 {
2270         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2271         int change;
2272         int val;
2273
2274         if (!snd_hdsp_use_is_exclusive(hdsp))
2275                 return -EBUSY;
2276         val = ucontrol->value.enumerated.item[0];
2277         if (val < 0) val = 0;
2278         if (val > 2) val = 2;
2279         spin_lock_irq(&hdsp->lock);
2280         if (val != hdsp_ad_gain(hdsp))
2281                 change = (hdsp_set_ad_gain(hdsp, val) == 0) ? 1 : 0;
2282         else
2283                 change = 0;
2284         spin_unlock_irq(&hdsp->lock);
2285         return change;
2286 }
2287
2288 #define HDSP_PHONE_GAIN(xname, xindex) \
2289 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2290   .name = xname, \
2291   .index = xindex, \
2292   .info = snd_hdsp_info_phone_gain, \
2293   .get = snd_hdsp_get_phone_gain, \
2294   .put = snd_hdsp_put_phone_gain \
2295 }
2296
2297 static int hdsp_phone_gain(struct hdsp *hdsp)
2298 {
2299         switch (hdsp->control_register & HDSP_PhoneGainMask) {
2300         case HDSP_PhoneGain0dB:
2301                 return 0;
2302         case HDSP_PhoneGainMinus6dB:
2303                 return 1;
2304         case HDSP_PhoneGainMinus12dB:
2305                 return 2;
2306         default:
2307                 return 0;
2308         }
2309 }
2310
2311 static int hdsp_set_phone_gain(struct hdsp *hdsp, int mode)
2312 {
2313         hdsp->control_register &= ~HDSP_PhoneGainMask;
2314         switch (mode) {
2315         case 0:
2316                 hdsp->control_register |= HDSP_PhoneGain0dB;
2317                 break;
2318         case 1:
2319                 hdsp->control_register |= HDSP_PhoneGainMinus6dB;
2320                 break;
2321         case 2:
2322                 hdsp->control_register |= HDSP_PhoneGainMinus12dB;
2323                 break;
2324         default:
2325                 return -1;
2326
2327         }
2328         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2329         return 0;
2330 }
2331
2332 static int snd_hdsp_info_phone_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2333 {
2334         static char *texts[] = {"0 dB", "-6 dB", "-12 dB"};
2335
2336         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2337         uinfo->count = 1;
2338         uinfo->value.enumerated.items = 3;
2339         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2340                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2341         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2342         return 0;
2343 }
2344
2345 static int snd_hdsp_get_phone_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2346 {
2347         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2348
2349         ucontrol->value.enumerated.item[0] = hdsp_phone_gain(hdsp);
2350         return 0;
2351 }
2352
2353 static int snd_hdsp_put_phone_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2354 {
2355         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2356         int change;
2357         int val;
2358
2359         if (!snd_hdsp_use_is_exclusive(hdsp))
2360                 return -EBUSY;
2361         val = ucontrol->value.enumerated.item[0];
2362         if (val < 0) val = 0;
2363         if (val > 2) val = 2;
2364         spin_lock_irq(&hdsp->lock);
2365         if (val != hdsp_phone_gain(hdsp))
2366                 change = (hdsp_set_phone_gain(hdsp, val) == 0) ? 1 : 0;
2367         else
2368                 change = 0;
2369         spin_unlock_irq(&hdsp->lock);
2370         return change;
2371 }
2372
2373 #define HDSP_PREF_SYNC_REF(xname, xindex) \
2374 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2375   .name = xname, \
2376   .index = xindex, \
2377   .info = snd_hdsp_info_pref_sync_ref, \
2378   .get = snd_hdsp_get_pref_sync_ref, \
2379   .put = snd_hdsp_put_pref_sync_ref \
2380 }
2381
2382 static int hdsp_pref_sync_ref(struct hdsp *hdsp)
2383 {
2384         /* Notice that this looks at the requested sync source,
2385            not the one actually in use.
2386         */
2387
2388         switch (hdsp->control_register & HDSP_SyncRefMask) {
2389         case HDSP_SyncRef_ADAT1:
2390                 return HDSP_SYNC_FROM_ADAT1;
2391         case HDSP_SyncRef_ADAT2:
2392                 return HDSP_SYNC_FROM_ADAT2;
2393         case HDSP_SyncRef_ADAT3:
2394                 return HDSP_SYNC_FROM_ADAT3;
2395         case HDSP_SyncRef_SPDIF:
2396                 return HDSP_SYNC_FROM_SPDIF;
2397         case HDSP_SyncRef_WORD:
2398                 return HDSP_SYNC_FROM_WORD;
2399         case HDSP_SyncRef_ADAT_SYNC:
2400                 return HDSP_SYNC_FROM_ADAT_SYNC;
2401         default:
2402                 return HDSP_SYNC_FROM_WORD;
2403         }
2404         return 0;
2405 }
2406
2407 static int hdsp_set_pref_sync_ref(struct hdsp *hdsp, int pref)
2408 {
2409         hdsp->control_register &= ~HDSP_SyncRefMask;
2410         switch (pref) {
2411         case HDSP_SYNC_FROM_ADAT1:
2412                 hdsp->control_register &= ~HDSP_SyncRefMask; /* clear SyncRef bits */
2413                 break;
2414         case HDSP_SYNC_FROM_ADAT2:
2415                 hdsp->control_register |= HDSP_SyncRef_ADAT2;
2416                 break;
2417         case HDSP_SYNC_FROM_ADAT3:
2418                 hdsp->control_register |= HDSP_SyncRef_ADAT3;
2419                 break;
2420         case HDSP_SYNC_FROM_SPDIF:
2421                 hdsp->control_register |= HDSP_SyncRef_SPDIF;
2422                 break;
2423         case HDSP_SYNC_FROM_WORD:
2424                 hdsp->control_register |= HDSP_SyncRef_WORD;
2425                 break;
2426         case HDSP_SYNC_FROM_ADAT_SYNC:
2427                 hdsp->control_register |= HDSP_SyncRef_ADAT_SYNC;
2428                 break;
2429         default:
2430                 return -1;
2431         }
2432         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2433         return 0;
2434 }
2435
2436 static int snd_hdsp_info_pref_sync_ref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2437 {
2438         static char *texts[] = {"Word", "IEC958", "ADAT1", "ADAT Sync", "ADAT2", "ADAT3" };
2439         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2440
2441         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2442         uinfo->count = 1;
2443
2444         switch (hdsp->io_type) {
2445         case Digiface:
2446         case H9652:
2447                 uinfo->value.enumerated.items = 6;
2448                 break;
2449         case Multiface:
2450                 uinfo->value.enumerated.items = 4;
2451                 break;
2452         case H9632:
2453                 uinfo->value.enumerated.items = 3;
2454                 break;
2455         default:
2456                 return -EINVAL;
2457         }
2458
2459         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2460                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2461         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2462         return 0;
2463 }
2464
2465 static int snd_hdsp_get_pref_sync_ref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2466 {
2467         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2468
2469         ucontrol->value.enumerated.item[0] = hdsp_pref_sync_ref(hdsp);
2470         return 0;
2471 }
2472
2473 static int snd_hdsp_put_pref_sync_ref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2474 {
2475         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2476         int change, max;
2477         unsigned int val;
2478
2479         if (!snd_hdsp_use_is_exclusive(hdsp))
2480                 return -EBUSY;
2481
2482         switch (hdsp->io_type) {
2483         case Digiface:
2484         case H9652:
2485                 max = 6;
2486                 break;
2487         case Multiface:
2488                 max = 4;
2489                 break;
2490         case H9632:
2491                 max = 3;
2492                 break;
2493         default:
2494                 return -EIO;
2495         }
2496
2497         val = ucontrol->value.enumerated.item[0] % max;
2498         spin_lock_irq(&hdsp->lock);
2499         change = (int)val != hdsp_pref_sync_ref(hdsp);
2500         hdsp_set_pref_sync_ref(hdsp, val);
2501         spin_unlock_irq(&hdsp->lock);
2502         return change;
2503 }
2504
2505 #define HDSP_AUTOSYNC_REF(xname, xindex) \
2506 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2507   .name = xname, \
2508   .index = xindex, \
2509   .access = SNDRV_CTL_ELEM_ACCESS_READ, \
2510   .info = snd_hdsp_info_autosync_ref, \
2511   .get = snd_hdsp_get_autosync_ref, \
2512 }
2513
2514 static int hdsp_autosync_ref(struct hdsp *hdsp)
2515 {
2516         /* This looks at the autosync selected sync reference */
2517         unsigned int status2 = hdsp_read(hdsp, HDSP_status2Register);
2518
2519         switch (status2 & HDSP_SelSyncRefMask) {
2520         case HDSP_SelSyncRef_WORD:
2521                 return HDSP_AUTOSYNC_FROM_WORD;
2522         case HDSP_SelSyncRef_ADAT_SYNC:
2523                 return HDSP_AUTOSYNC_FROM_ADAT_SYNC;
2524         case HDSP_SelSyncRef_SPDIF:
2525                 return HDSP_AUTOSYNC_FROM_SPDIF;
2526         case HDSP_SelSyncRefMask:
2527                 return HDSP_AUTOSYNC_FROM_NONE;
2528         case HDSP_SelSyncRef_ADAT1:
2529                 return HDSP_AUTOSYNC_FROM_ADAT1;
2530         case HDSP_SelSyncRef_ADAT2:
2531                 return HDSP_AUTOSYNC_FROM_ADAT2;
2532         case HDSP_SelSyncRef_ADAT3:
2533                 return HDSP_AUTOSYNC_FROM_ADAT3;
2534         default:
2535                 return HDSP_AUTOSYNC_FROM_WORD;
2536         }
2537         return 0;
2538 }
2539
2540 static int snd_hdsp_info_autosync_ref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2541 {
2542         static char *texts[] = {"Word", "ADAT Sync", "IEC958", "None", "ADAT1", "ADAT2", "ADAT3" };
2543
2544         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2545         uinfo->count = 1;
2546         uinfo->value.enumerated.items = 7;
2547         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2548                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2549         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2550         return 0;
2551 }
2552
2553 static int snd_hdsp_get_autosync_ref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2554 {
2555         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2556
2557         ucontrol->value.enumerated.item[0] = hdsp_autosync_ref(hdsp);
2558         return 0;
2559 }
2560
2561 #define HDSP_PRECISE_POINTER(xname, xindex) \
2562 { .iface = SNDRV_CTL_ELEM_IFACE_CARD, \
2563   .name = xname, \
2564   .index = xindex, \
2565   .info = snd_hdsp_info_precise_pointer, \
2566   .get = snd_hdsp_get_precise_pointer, \
2567   .put = snd_hdsp_put_precise_pointer \
2568 }
2569
2570 static int hdsp_set_precise_pointer(struct hdsp *hdsp, int precise)
2571 {
2572         if (precise)
2573                 hdsp->precise_ptr = 1;
2574         else
2575                 hdsp->precise_ptr = 0;
2576         return 0;
2577 }
2578
2579 #define snd_hdsp_info_precise_pointer           snd_ctl_boolean_mono_info
2580
2581 static int snd_hdsp_get_precise_pointer(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2582 {
2583         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2584
2585         spin_lock_irq(&hdsp->lock);
2586         ucontrol->value.integer.value[0] = hdsp->precise_ptr;
2587         spin_unlock_irq(&hdsp->lock);
2588         return 0;
2589 }
2590
2591 static int snd_hdsp_put_precise_pointer(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2592 {
2593         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2594         int change;
2595         unsigned int val;
2596
2597         if (!snd_hdsp_use_is_exclusive(hdsp))
2598                 return -EBUSY;
2599         val = ucontrol->value.integer.value[0] & 1;
2600         spin_lock_irq(&hdsp->lock);
2601         change = (int)val != hdsp->precise_ptr;
2602         hdsp_set_precise_pointer(hdsp, val);
2603         spin_unlock_irq(&hdsp->lock);
2604         return change;
2605 }
2606
2607 #define HDSP_USE_MIDI_TASKLET(xname, xindex) \
2608 { .iface = SNDRV_CTL_ELEM_IFACE_CARD, \
2609   .name = xname, \
2610   .index = xindex, \
2611   .info = snd_hdsp_info_use_midi_tasklet, \
2612   .get = snd_hdsp_get_use_midi_tasklet, \
2613   .put = snd_hdsp_put_use_midi_tasklet \
2614 }
2615
2616 static int hdsp_set_use_midi_tasklet(struct hdsp *hdsp, int use_tasklet)
2617 {
2618         if (use_tasklet)
2619                 hdsp->use_midi_tasklet = 1;
2620         else
2621                 hdsp->use_midi_tasklet = 0;
2622         return 0;
2623 }
2624
2625 #define snd_hdsp_info_use_midi_tasklet          snd_ctl_boolean_mono_info
2626
2627 static int snd_hdsp_get_use_midi_tasklet(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2628 {
2629         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2630
2631         spin_lock_irq(&hdsp->lock);
2632         ucontrol->value.integer.value[0] = hdsp->use_midi_tasklet;
2633         spin_unlock_irq(&hdsp->lock);
2634         return 0;
2635 }
2636
2637 static int snd_hdsp_put_use_midi_tasklet(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2638 {
2639         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2640         int change;
2641         unsigned int val;
2642
2643         if (!snd_hdsp_use_is_exclusive(hdsp))
2644                 return -EBUSY;
2645         val = ucontrol->value.integer.value[0] & 1;
2646         spin_lock_irq(&hdsp->lock);
2647         change = (int)val != hdsp->use_midi_tasklet;
2648         hdsp_set_use_midi_tasklet(hdsp, val);
2649         spin_unlock_irq(&hdsp->lock);
2650         return change;
2651 }
2652
2653 #define HDSP_MIXER(xname, xindex) \
2654 { .iface = SNDRV_CTL_ELEM_IFACE_HWDEP, \
2655   .name = xname, \
2656   .index = xindex, \
2657   .device = 0, \
2658   .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \
2659                  SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
2660   .info = snd_hdsp_info_mixer, \
2661   .get = snd_hdsp_get_mixer, \
2662   .put = snd_hdsp_put_mixer \
2663 }
2664
2665 static int snd_hdsp_info_mixer(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2666 {
2667         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
2668         uinfo->count = 3;
2669         uinfo->value.integer.min = 0;
2670         uinfo->value.integer.max = 65536;
2671         uinfo->value.integer.step = 1;
2672         return 0;
2673 }
2674
2675 static int snd_hdsp_get_mixer(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2676 {
2677         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2678         int source;
2679         int destination;
2680         int addr;
2681
2682         source = ucontrol->value.integer.value[0];
2683         destination = ucontrol->value.integer.value[1];
2684
2685         if (source >= hdsp->max_channels)
2686                 addr = hdsp_playback_to_output_key(hdsp,source-hdsp->max_channels,destination);
2687         else
2688                 addr = hdsp_input_to_output_key(hdsp,source, destination);
2689
2690         spin_lock_irq(&hdsp->lock);
2691         ucontrol->value.integer.value[2] = hdsp_read_gain (hdsp, addr);
2692         spin_unlock_irq(&hdsp->lock);
2693         return 0;
2694 }
2695
2696 static int snd_hdsp_put_mixer(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2697 {
2698         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2699         int change;
2700         int source;
2701         int destination;
2702         int gain;
2703         int addr;
2704
2705         if (!snd_hdsp_use_is_exclusive(hdsp))
2706                 return -EBUSY;
2707
2708         source = ucontrol->value.integer.value[0];
2709         destination = ucontrol->value.integer.value[1];
2710
2711         if (source >= hdsp->max_channels)
2712                 addr = hdsp_playback_to_output_key(hdsp,source-hdsp->max_channels, destination);
2713         else
2714                 addr = hdsp_input_to_output_key(hdsp,source, destination);
2715
2716         gain = ucontrol->value.integer.value[2];
2717
2718         spin_lock_irq(&hdsp->lock);
2719         change = gain != hdsp_read_gain(hdsp, addr);
2720         if (change)
2721                 hdsp_write_gain(hdsp, addr, gain);
2722         spin_unlock_irq(&hdsp->lock);
2723         return change;
2724 }
2725
2726 #define HDSP_WC_SYNC_CHECK(xname, xindex) \
2727 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2728   .name = xname, \
2729   .index = xindex, \
2730   .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
2731   .info = snd_hdsp_info_sync_check, \
2732   .get = snd_hdsp_get_wc_sync_check \
2733 }
2734
2735 static int snd_hdsp_info_sync_check(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2736 {
2737         static char *texts[] = {"No Lock", "Lock", "Sync" };
2738         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2739         uinfo->count = 1;
2740         uinfo->value.enumerated.items = 3;
2741         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2742                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2743         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2744         return 0;
2745 }
2746
2747 static int hdsp_wc_sync_check(struct hdsp *hdsp)
2748 {
2749         int status2 = hdsp_read(hdsp, HDSP_status2Register);
2750         if (status2 & HDSP_wc_lock) {
2751                 if (status2 & HDSP_wc_sync)
2752                         return 2;
2753                 else
2754                          return 1;
2755         } else
2756                 return 0;
2757         return 0;
2758 }
2759
2760 static int snd_hdsp_get_wc_sync_check(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2761 {
2762         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2763
2764         ucontrol->value.enumerated.item[0] = hdsp_wc_sync_check(hdsp);
2765         return 0;
2766 }
2767
2768 #define HDSP_SPDIF_SYNC_CHECK(xname, xindex) \
2769 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2770   .name = xname, \
2771   .index = xindex, \
2772   .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
2773   .info = snd_hdsp_info_sync_check, \
2774   .get = snd_hdsp_get_spdif_sync_check \
2775 }
2776
2777 static int hdsp_spdif_sync_check(struct hdsp *hdsp)
2778 {
2779         int status = hdsp_read(hdsp, HDSP_statusRegister);
2780         if (status & HDSP_SPDIFErrorFlag)
2781                 return 0;
2782         else {
2783                 if (status & HDSP_SPDIFSync)
2784                         return 2;
2785                 else
2786                         return 1;
2787         }
2788         return 0;
2789 }
2790
2791 static int snd_hdsp_get_spdif_sync_check(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2792 {
2793         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2794
2795         ucontrol->value.enumerated.item[0] = hdsp_spdif_sync_check(hdsp);
2796         return 0;
2797 }
2798
2799 #define HDSP_ADATSYNC_SYNC_CHECK(xname, xindex) \
2800 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2801   .name = xname, \
2802   .index = xindex, \
2803   .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
2804   .info = snd_hdsp_info_sync_check, \
2805   .get = snd_hdsp_get_adatsync_sync_check \
2806 }
2807
2808 static int hdsp_adatsync_sync_check(struct hdsp *hdsp)
2809 {
2810         int status = hdsp_read(hdsp, HDSP_statusRegister);
2811         if (status & HDSP_TimecodeLock) {
2812                 if (status & HDSP_TimecodeSync)
2813                         return 2;
2814                 else
2815                         return 1;
2816         } else
2817                 return 0;
2818 }
2819
2820 static int snd_hdsp_get_adatsync_sync_check(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2821 {
2822         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2823
2824         ucontrol->value.enumerated.item[0] = hdsp_adatsync_sync_check(hdsp);
2825         return 0;
2826 }
2827
2828 #define HDSP_ADAT_SYNC_CHECK \
2829 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2830   .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
2831   .info = snd_hdsp_info_sync_check, \
2832   .get = snd_hdsp_get_adat_sync_check \
2833 }
2834
2835 static int hdsp_adat_sync_check(struct hdsp *hdsp, int idx)
2836 {
2837         int status = hdsp_read(hdsp, HDSP_statusRegister);
2838
2839         if (status & (HDSP_Lock0>>idx)) {
2840                 if (status & (HDSP_Sync0>>idx))
2841                         return 2;
2842                 else
2843                         return 1;
2844         } else
2845                 return 0;
2846 }
2847
2848 static int snd_hdsp_get_adat_sync_check(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2849 {
2850         int offset;
2851         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2852
2853         offset = ucontrol->id.index - 1;
2854         snd_BUG_ON(offset < 0);
2855
2856         switch (hdsp->io_type) {
2857         case Digiface:
2858         case H9652:
2859                 if (offset >= 3)
2860                         return -EINVAL;
2861                 break;
2862         case Multiface:
2863         case H9632:
2864                 if (offset >= 1)
2865                         return -EINVAL;
2866                 break;
2867         default:
2868                 return -EIO;
2869         }
2870
2871         ucontrol->value.enumerated.item[0] = hdsp_adat_sync_check(hdsp, offset);
2872         return 0;
2873 }
2874
2875 #define HDSP_DDS_OFFSET(xname, xindex) \
2876 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2877   .name = xname, \
2878   .index = xindex, \
2879   .info = snd_hdsp_info_dds_offset, \
2880   .get = snd_hdsp_get_dds_offset, \
2881   .put = snd_hdsp_put_dds_offset \
2882 }
2883
2884 static int hdsp_dds_offset(struct hdsp *hdsp)
2885 {
2886         u64 n;
2887         unsigned int dds_value = hdsp->dds_value;
2888         int system_sample_rate = hdsp->system_sample_rate;
2889
2890         if (!dds_value)
2891                 return 0;
2892
2893         n = DDS_NUMERATOR;
2894         /*
2895          * dds_value = n / rate
2896          * rate = n / dds_value
2897          */
2898         n = div_u64(n, dds_value);
2899         if (system_sample_rate >= 112000)
2900                 n *= 4;
2901         else if (system_sample_rate >= 56000)
2902                 n *= 2;
2903         return ((int)n) - system_sample_rate;
2904 }
2905
2906 static int hdsp_set_dds_offset(struct hdsp *hdsp, int offset_hz)
2907 {
2908         int rate = hdsp->system_sample_rate + offset_hz;
2909         hdsp_set_dds_value(hdsp, rate);
2910         return 0;
2911 }
2912
2913 static int snd_hdsp_info_dds_offset(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2914 {
2915         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
2916         uinfo->count = 1;
2917         uinfo->value.integer.min = -5000;
2918         uinfo->value.integer.max = 5000;
2919         return 0;
2920 }
2921
2922 static int snd_hdsp_get_dds_offset(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2923 {
2924         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2925
2926         ucontrol->value.enumerated.item[0] = hdsp_dds_offset(hdsp);
2927         return 0;
2928 }
2929
2930 static int snd_hdsp_put_dds_offset(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2931 {
2932         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2933         int change;
2934         int val;
2935
2936         if (!snd_hdsp_use_is_exclusive(hdsp))
2937                 return -EBUSY;
2938         val = ucontrol->value.enumerated.item[0];
2939         spin_lock_irq(&hdsp->lock);
2940         if (val != hdsp_dds_offset(hdsp))
2941                 change = (hdsp_set_dds_offset(hdsp, val) == 0) ? 1 : 0;
2942         else
2943                 change = 0;
2944         spin_unlock_irq(&hdsp->lock);
2945         return change;
2946 }
2947
2948 static struct snd_kcontrol_new snd_hdsp_9632_controls[] = {
2949 HDSP_DA_GAIN("DA Gain", 0),
2950 HDSP_AD_GAIN("AD Gain", 0),
2951 HDSP_PHONE_GAIN("Phones Gain", 0),
2952 HDSP_TOGGLE_SETTING("XLR Breakout Cable", HDSP_XLRBreakoutCable),
2953 HDSP_DDS_OFFSET("DDS Sample Rate Offset", 0)
2954 };
2955
2956 static struct snd_kcontrol_new snd_hdsp_controls[] = {
2957 {
2958         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
2959         .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
2960         .info =         snd_hdsp_control_spdif_info,
2961         .get =          snd_hdsp_control_spdif_get,
2962         .put =          snd_hdsp_control_spdif_put,
2963 },
2964 {
2965         .access =       SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
2966         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
2967         .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
2968         .info =         snd_hdsp_control_spdif_stream_info,
2969         .get =          snd_hdsp_control_spdif_stream_get,
2970         .put =          snd_hdsp_control_spdif_stream_put,
2971 },
2972 {
2973         .access =       SNDRV_CTL_ELEM_ACCESS_READ,
2974         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
2975         .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
2976         .info =         snd_hdsp_control_spdif_mask_info,
2977         .get =          snd_hdsp_control_spdif_mask_get,
2978         .private_value = IEC958_AES0_NONAUDIO |
2979                          IEC958_AES0_PROFESSIONAL |
2980                          IEC958_AES0_CON_EMPHASIS,
2981 },
2982 {
2983         .access =       SNDRV_CTL_ELEM_ACCESS_READ,
2984         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
2985         .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK),
2986         .info =         snd_hdsp_control_spdif_mask_info,
2987         .get =          snd_hdsp_control_spdif_mask_get,
2988         .private_value = IEC958_AES0_NONAUDIO |
2989                          IEC958_AES0_PROFESSIONAL |
2990                          IEC958_AES0_PRO_EMPHASIS,
2991 },
2992 HDSP_MIXER("Mixer", 0),
2993 HDSP_SPDIF_IN("IEC958 Input Connector", 0),
2994 HDSP_TOGGLE_SETTING("IEC958 Output also on ADAT1", HDSP_SPDIFOpticalOut),
2995 HDSP_TOGGLE_SETTING("IEC958 Professional Bit", HDSP_SPDIFProfessional),
2996 HDSP_TOGGLE_SETTING("IEC958 Emphasis Bit", HDSP_SPDIFEmphasis),
2997 HDSP_TOGGLE_SETTING("IEC958 Non-audio Bit", HDSP_SPDIFNonAudio),
2998 /* 'Sample Clock Source' complies with the alsa control naming scheme */
2999 HDSP_CLOCK_SOURCE("Sample Clock Source", 0),
3000 {
3001         .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3002         .name = "Sample Clock Source Locking",
3003         .info = snd_hdsp_info_clock_source_lock,
3004         .get = snd_hdsp_get_clock_source_lock,
3005         .put = snd_hdsp_put_clock_source_lock,
3006 },
3007 HDSP_SYSTEM_CLOCK_MODE("System Clock Mode", 0),
3008 HDSP_PREF_SYNC_REF("Preferred Sync Reference", 0),
3009 HDSP_AUTOSYNC_REF("AutoSync Reference", 0),
3010 HDSP_SPDIF_SAMPLE_RATE("SPDIF Sample Rate", 0),
3011 HDSP_SYSTEM_SAMPLE_RATE("System Sample Rate", 0),
3012 /* 'External Rate' complies with the alsa control naming scheme */
3013 HDSP_AUTOSYNC_SAMPLE_RATE("External Rate", 0),
3014 HDSP_WC_SYNC_CHECK("Word Clock Lock Status", 0),
3015 HDSP_SPDIF_SYNC_CHECK("SPDIF Lock Status", 0),
3016 HDSP_ADATSYNC_SYNC_CHECK("ADAT Sync Lock Status", 0),
3017 HDSP_TOGGLE_SETTING("Line Out", HDSP_LineOut),
3018 HDSP_PRECISE_POINTER("Precise Pointer", 0),
3019 HDSP_USE_MIDI_TASKLET("Use Midi Tasklet", 0),
3020 };
3021
3022
3023 static int hdsp_rpm_input12(struct hdsp *hdsp)
3024 {
3025         switch (hdsp->control_register & HDSP_RPM_Inp12) {
3026         case HDSP_RPM_Inp12_Phon_6dB:
3027                 return 0;
3028         case HDSP_RPM_Inp12_Phon_n6dB:
3029                 return 2;
3030         case HDSP_RPM_Inp12_Line_0dB:
3031                 return 3;
3032         case HDSP_RPM_Inp12_Line_n6dB:
3033                 return 4;
3034         }
3035         return 1;
3036 }
3037
3038
3039 static int snd_hdsp_get_rpm_input12(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3040 {
3041         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3042
3043         ucontrol->value.enumerated.item[0] = hdsp_rpm_input12(hdsp);
3044         return 0;
3045 }
3046
3047
3048 static int hdsp_set_rpm_input12(struct hdsp *hdsp, int mode)
3049 {
3050         hdsp->control_register &= ~HDSP_RPM_Inp12;
3051         switch (mode) {
3052         case 0:
3053                 hdsp->control_register |= HDSP_RPM_Inp12_Phon_6dB;
3054                 break;
3055         case 1:
3056                 break;
3057         case 2:
3058                 hdsp->control_register |= HDSP_RPM_Inp12_Phon_n6dB;
3059                 break;
3060         case 3:
3061                 hdsp->control_register |= HDSP_RPM_Inp12_Line_0dB;
3062                 break;
3063         case 4:
3064                 hdsp->control_register |= HDSP_RPM_Inp12_Line_n6dB;
3065                 break;
3066         default:
3067                 return -1;
3068         }
3069
3070         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
3071         return 0;
3072 }
3073
3074
3075 static int snd_hdsp_put_rpm_input12(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3076 {
3077         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3078         int change;
3079         int val;
3080
3081         if (!snd_hdsp_use_is_exclusive(hdsp))
3082                 return -EBUSY;
3083         val = ucontrol->value.enumerated.item[0];
3084         if (val < 0)
3085                 val = 0;
3086         if (val > 4)
3087                 val = 4;
3088         spin_lock_irq(&hdsp->lock);
3089         if (val != hdsp_rpm_input12(hdsp))
3090                 change = (hdsp_set_rpm_input12(hdsp, val) == 0) ? 1 : 0;
3091         else
3092                 change = 0;
3093         spin_unlock_irq(&hdsp->lock);
3094         return change;
3095 }
3096
3097
3098 static int snd_hdsp_info_rpm_input(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
3099 {
3100         static char *texts[] = {"Phono +6dB", "Phono 0dB", "Phono -6dB", "Line 0dB", "Line -6dB"};
3101
3102         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
3103         uinfo->count = 1;
3104         uinfo->value.enumerated.items = 5;
3105         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
3106                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
3107         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
3108         return 0;
3109 }
3110
3111
3112 static int hdsp_rpm_input34(struct hdsp *hdsp)
3113 {
3114         switch (hdsp->control_register & HDSP_RPM_Inp34) {
3115         case HDSP_RPM_Inp34_Phon_6dB:
3116                 return 0;
3117         case HDSP_RPM_Inp34_Phon_n6dB:
3118                 return 2;
3119         case HDSP_RPM_Inp34_Line_0dB:
3120                 return 3;
3121         case HDSP_RPM_Inp34_Line_n6dB:
3122                 return 4;
3123         }
3124         return 1;
3125 }
3126
3127
3128 static int snd_hdsp_get_rpm_input34(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3129 {
3130         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3131
3132         ucontrol->value.enumerated.item[0] = hdsp_rpm_input34(hdsp);
3133         return 0;
3134 }
3135
3136
3137 static int hdsp_set_rpm_input34(struct hdsp *hdsp, int mode)
3138 {
3139         hdsp->control_register &= ~HDSP_RPM_Inp34;
3140         switch (mode) {
3141         case 0:
3142                 hdsp->control_register |= HDSP_RPM_Inp34_Phon_6dB;
3143                 break;
3144         case 1:
3145                 break;
3146         case 2:
3147                 hdsp->control_register |= HDSP_RPM_Inp34_Phon_n6dB;
3148                 break;
3149         case 3:
3150                 hdsp->control_register |= HDSP_RPM_Inp34_Line_0dB;
3151                 break;
3152         case 4:
3153                 hdsp->control_register |= HDSP_RPM_Inp34_Line_n6dB;
3154                 break;
3155         default:
3156                 return -1;
3157         }
3158
3159         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
3160         return 0;
3161 }
3162
3163
3164 static int snd_hdsp_put_rpm_input34(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3165 {
3166         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3167         int change;
3168         int val;
3169
3170         if (!snd_hdsp_use_is_exclusive(hdsp))
3171                 return -EBUSY;
3172         val = ucontrol->value.enumerated.item[0];
3173         if (val < 0)
3174                 val = 0;
3175         if (val > 4)
3176                 val = 4;
3177         spin_lock_irq(&hdsp->lock);
3178         if (val != hdsp_rpm_input34(hdsp))
3179                 change = (hdsp_set_rpm_input34(hdsp, val) == 0) ? 1 : 0;
3180         else
3181                 change = 0;
3182         spin_unlock_irq(&hdsp->lock);
3183         return change;
3184 }
3185
3186
3187 /* RPM Bypass switch */
3188 static int hdsp_rpm_bypass(struct hdsp *hdsp)
3189 {
3190         return (hdsp->control_register & HDSP_RPM_Bypass) ? 1 : 0;
3191 }
3192
3193
3194 static int snd_hdsp_get_rpm_bypass(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3195 {
3196         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3197
3198         ucontrol->value.integer.value[0] = hdsp_rpm_bypass(hdsp);
3199         return 0;
3200 }
3201
3202
3203 static int hdsp_set_rpm_bypass(struct hdsp *hdsp, int on)
3204 {
3205         if (on)
3206                 hdsp->control_register |= HDSP_RPM_Bypass;
3207         else
3208                 hdsp->control_register &= ~HDSP_RPM_Bypass;
3209         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
3210         return 0;
3211 }
3212
3213
3214 static int snd_hdsp_put_rpm_bypass(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3215 {
3216         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3217         int change;
3218         unsigned int val;
3219
3220         if (!snd_hdsp_use_is_exclusive(hdsp))
3221                 return -EBUSY;
3222         val = ucontrol->value.integer.value[0] & 1;
3223         spin_lock_irq(&hdsp->lock);
3224         change = (int)val != hdsp_rpm_bypass(hdsp);
3225         hdsp_set_rpm_bypass(hdsp, val);
3226         spin_unlock_irq(&hdsp->lock);
3227         return change;
3228 }
3229
3230
3231 static int snd_hdsp_info_rpm_bypass(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
3232 {
3233         static char *texts[] = {"On", "Off"};
3234
3235         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
3236         uinfo->count = 1;
3237         uinfo->value.enumerated.items = 2;
3238         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
3239                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
3240         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
3241         return 0;
3242 }
3243
3244
3245 /* RPM Disconnect switch */
3246 static int hdsp_rpm_disconnect(struct hdsp *hdsp)
3247 {
3248         return (hdsp->control_register & HDSP_RPM_Disconnect) ? 1 : 0;
3249 }
3250
3251
3252 static int snd_hdsp_get_rpm_disconnect(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3253 {
3254         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3255
3256         ucontrol->value.integer.value[0] = hdsp_rpm_disconnect(hdsp);
3257         return 0;
3258 }
3259
3260
3261 static int hdsp_set_rpm_disconnect(struct hdsp *hdsp, int on)
3262 {
3263         if (on)
3264                 hdsp->control_register |= HDSP_RPM_Disconnect;
3265         else
3266                 hdsp->control_register &= ~HDSP_RPM_Disconnect;
3267         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
3268         return 0;
3269 }
3270
3271
3272 static int snd_hdsp_put_rpm_disconnect(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3273 {
3274         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3275         int change;
3276         unsigned int val;
3277
3278         if (!snd_hdsp_use_is_exclusive(hdsp))
3279                 return -EBUSY;
3280         val = ucontrol->value.integer.value[0] & 1;
3281         spin_lock_irq(&hdsp->lock);
3282         change = (int)val != hdsp_rpm_disconnect(hdsp);
3283         hdsp_set_rpm_disconnect(hdsp, val);
3284         spin_unlock_irq(&hdsp->lock);
3285         return change;
3286 }
3287
3288 static int snd_hdsp_info_rpm_disconnect(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
3289 {
3290         static char *texts[] = {"On", "Off"};
3291
3292         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
3293         uinfo->count = 1;
3294         uinfo->value.enumerated.items = 2;
3295         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
3296                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
3297         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
3298         return 0;
3299 }
3300
3301 static struct snd_kcontrol_new snd_hdsp_rpm_controls[] = {
3302         {
3303                 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3304                 .name = "RPM Bypass",
3305                 .get = snd_hdsp_get_rpm_bypass,
3306                 .put = snd_hdsp_put_rpm_bypass,
3307                 .info = snd_hdsp_info_rpm_bypass
3308         },
3309         {
3310                 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3311                 .name = "RPM Disconnect",
3312                 .get = snd_hdsp_get_rpm_disconnect,
3313                 .put = snd_hdsp_put_rpm_disconnect,
3314                 .info = snd_hdsp_info_rpm_disconnect
3315         },
3316         {
3317                 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3318                 .name = "Input 1/2",
3319                 .get = snd_hdsp_get_rpm_input12,
3320                 .put = snd_hdsp_put_rpm_input12,
3321                 .info = snd_hdsp_info_rpm_input
3322         },
3323         {
3324                 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3325                 .name = "Input 3/4",
3326                 .get = snd_hdsp_get_rpm_input34,
3327                 .put = snd_hdsp_put_rpm_input34,
3328                 .info = snd_hdsp_info_rpm_input
3329         },
3330         HDSP_SYSTEM_SAMPLE_RATE("System Sample Rate", 0),
3331         HDSP_MIXER("Mixer", 0)
3332 };
3333
3334 static struct snd_kcontrol_new snd_hdsp_96xx_aeb =
3335         HDSP_TOGGLE_SETTING("Analog Extension Board",
3336                         HDSP_AnalogExtensionBoard);
3337 static struct snd_kcontrol_new snd_hdsp_adat_sync_check = HDSP_ADAT_SYNC_CHECK;
3338
3339 static int snd_hdsp_create_controls(struct snd_card *card, struct hdsp *hdsp)
3340 {
3341         unsigned int idx;
3342         int err;
3343         struct snd_kcontrol *kctl;
3344
3345         if (hdsp->io_type == RPM) {
3346                 /* RPM Bypass, Disconnect and Input switches */
3347                 for (idx = 0; idx < ARRAY_SIZE(snd_hdsp_rpm_controls); idx++) {
3348                         err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_hdsp_rpm_controls[idx], hdsp));
3349                         if (err < 0)
3350                                 return err;
3351                 }
3352                 return 0;
3353         }
3354
3355         for (idx = 0; idx < ARRAY_SIZE(snd_hdsp_controls); idx++) {
3356                 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_hdsp_controls[idx], hdsp))) < 0)
3357                         return err;
3358                 if (idx == 1)   /* IEC958 (S/PDIF) Stream */
3359                         hdsp->spdif_ctl = kctl;
3360         }
3361
3362         /* ADAT SyncCheck status */
3363         snd_hdsp_adat_sync_check.name = "ADAT Lock Status";
3364         snd_hdsp_adat_sync_check.index = 1;
3365         if ((err = snd_ctl_add (card, kctl = snd_ctl_new1(&snd_hdsp_adat_sync_check, hdsp))))
3366                 return err;
3367         if (hdsp->io_type == Digiface || hdsp->io_type == H9652) {
3368                 for (idx = 1; idx < 3; ++idx) {
3369                         snd_hdsp_adat_sync_check.index = idx+1;
3370                         if ((err = snd_ctl_add (card, kctl = snd_ctl_new1(&snd_hdsp_adat_sync_check, hdsp))))
3371                                 return err;
3372                 }
3373         }
3374
3375         /* DA, AD and Phone gain and XLR breakout cable controls for H9632 cards */
3376         if (hdsp->io_type == H9632) {
3377                 for (idx = 0; idx < ARRAY_SIZE(snd_hdsp_9632_controls); idx++) {
3378                         if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_hdsp_9632_controls[idx], hdsp))) < 0)
3379                                 return err;
3380                 }
3381         }
3382
3383         /* AEB control for H96xx card */
3384         if (hdsp->io_type == H9632 || hdsp->io_type == H9652) {
3385                 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_hdsp_96xx_aeb, hdsp))) < 0)
3386                                 return err;
3387         }
3388
3389         return 0;
3390 }
3391
3392 /*------------------------------------------------------------
3393    /proc interface
3394  ------------------------------------------------------------*/
3395
3396 static void
3397 snd_hdsp_proc_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
3398 {
3399         struct hdsp *hdsp = entry->private_data;
3400         unsigned int status;
3401         unsigned int status2;
3402         char *pref_sync_ref;
3403         char *autosync_ref;
3404         char *system_clock_mode;
3405         char *clock_source;
3406         int x;
3407
3408         status = hdsp_read(hdsp, HDSP_statusRegister);
3409         status2 = hdsp_read(hdsp, HDSP_status2Register);
3410
3411         snd_iprintf(buffer, "%s (Card #%d)\n", hdsp->card_name,
3412                     hdsp->card->number + 1);
3413         snd_iprintf(buffer, "Buffers: capture %p playback %p\n",
3414                     hdsp->capture_buffer, hdsp->playback_buffer);
3415         snd_iprintf(buffer, "IRQ: %d Registers bus: 0x%lx VM: 0x%lx\n",
3416                     hdsp->irq, hdsp->port, (unsigned long)hdsp->iobase);
3417         snd_iprintf(buffer, "Control register: 0x%x\n", hdsp->control_register);
3418         snd_iprintf(buffer, "Control2 register: 0x%x\n",
3419                     hdsp->control2_register);
3420         snd_iprintf(buffer, "Status register: 0x%x\n", status);
3421         snd_iprintf(buffer, "Status2 register: 0x%x\n", status2);
3422
3423         if (hdsp_check_for_iobox(hdsp)) {
3424                 snd_iprintf(buffer, "No I/O box connected.\n"
3425                             "Please connect one and upload firmware.\n");
3426                 return;
3427         }
3428
3429         if (hdsp_check_for_firmware(hdsp, 0)) {
3430                 if (hdsp->state & HDSP_FirmwareCached) {
3431                         if (snd_hdsp_load_firmware_from_cache(hdsp) != 0) {
3432                                 snd_iprintf(buffer, "Firmware loading from "
3433                                             "cache failed, "
3434                                             "please upload manually.\n");
3435                                 return;
3436                         }
3437                 } else {
3438                         int err = -EINVAL;
3439                         err = hdsp_request_fw_loader(hdsp);
3440                         if (err < 0) {
3441                                 snd_iprintf(buffer,
3442                                             "No firmware loaded nor cached, "
3443                                             "please upload firmware.\n");
3444                                 return;
3445                         }
3446                 }
3447         }
3448
3449         snd_iprintf(buffer, "FIFO status: %d\n", hdsp_read(hdsp, HDSP_fifoStatus) & 0xff);
3450         snd_iprintf(buffer, "MIDI1 Output status: 0x%x\n", hdsp_read(hdsp, HDSP_midiStatusOut0));
3451         snd_iprintf(buffer, "MIDI1 Input status: 0x%x\n", hdsp_read(hdsp, HDSP_midiStatusIn0));
3452         snd_iprintf(buffer, "MIDI2 Output status: 0x%x\n", hdsp_read(hdsp, HDSP_midiStatusOut1));
3453         snd_iprintf(buffer, "MIDI2 Input status: 0x%x\n", hdsp_read(hdsp, HDSP_midiStatusIn1));
3454         snd_iprintf(buffer, "Use Midi Tasklet: %s\n", hdsp->use_midi_tasklet ? "on" : "off");
3455
3456         snd_iprintf(buffer, "\n");
3457
3458         x = 1 << (6 + hdsp_decode_latency(hdsp->control_register & HDSP_LatencyMask));
3459
3460         snd_iprintf(buffer, "Buffer Size (Latency): %d samples (2 periods of %lu bytes)\n", x, (unsigned long) hdsp->period_bytes);
3461         snd_iprintf(buffer, "Hardware pointer (frames): %ld\n", hdsp_hw_pointer(hdsp));
3462         snd_iprintf(buffer, "Precise pointer: %s\n", hdsp->precise_ptr ? "on" : "off");
3463         snd_iprintf(buffer, "Line out: %s\n", (hdsp->control_register & HDSP_LineOut) ? "on" : "off");
3464
3465         snd_iprintf(buffer, "Firmware version: %d\n", (status2&HDSP_version0)|(status2&HDSP_version1)<<1|(status2&HDSP_version2)<<2);
3466
3467         snd_iprintf(buffer, "\n");
3468
3469         switch (hdsp_clock_source(hdsp)) {
3470         case HDSP_CLOCK_SOURCE_AUTOSYNC:
3471                 clock_source = "AutoSync";
3472                 break;
3473         case HDSP_CLOCK_SOURCE_INTERNAL_32KHZ:
3474                 clock_source = "Internal 32 kHz";
3475                 break;
3476         case HDSP_CLOCK_SOURCE_INTERNAL_44_1KHZ:
3477                 clock_source = "Internal 44.1 kHz";
3478                 break;
3479         case HDSP_CLOCK_SOURCE_INTERNAL_48KHZ:
3480                 clock_source = "Internal 48 kHz";
3481                 break;
3482         case HDSP_CLOCK_SOURCE_INTERNAL_64KHZ:
3483                 clock_source = "Internal 64 kHz";
3484                 break;
3485         case HDSP_CLOCK_SOURCE_INTERNAL_88_2KHZ:
3486                 clock_source = "Internal 88.2 kHz";
3487                 break;
3488         case HDSP_CLOCK_SOURCE_INTERNAL_96KHZ:
3489                 clock_source = "Internal 96 kHz";
3490                 break;
3491         case HDSP_CLOCK_SOURCE_INTERNAL_128KHZ:
3492                 clock_source = "Internal 128 kHz";
3493                 break;
3494         case HDSP_CLOCK_SOURCE_INTERNAL_176_4KHZ:
3495                 clock_source = "Internal 176.4 kHz";
3496                 break;
3497                 case HDSP_CLOCK_SOURCE_INTERNAL_192KHZ:
3498                 clock_source = "Internal 192 kHz";
3499                 break;
3500         default:
3501                 clock_source = "Error";
3502         }
3503         snd_iprintf (buffer, "Sample Clock Source: %s\n", clock_source);
3504
3505         if (hdsp_system_clock_mode(hdsp))
3506                 system_clock_mode = "Slave";
3507         else
3508                 system_clock_mode = "Master";
3509
3510         switch (hdsp_pref_sync_ref (hdsp)) {
3511         case HDSP_SYNC_FROM_WORD:
3512                 pref_sync_ref = "Word Clock";
3513                 break;
3514         case HDSP_SYNC_FROM_ADAT_SYNC:
3515                 pref_sync_ref = "ADAT Sync";
3516                 break;
3517         case HDSP_SYNC_FROM_SPDIF:
3518                 pref_sync_ref = "SPDIF";
3519                 break;
3520         case HDSP_SYNC_FROM_ADAT1:
3521                 pref_sync_ref = "ADAT1";
3522                 break;
3523         case HDSP_SYNC_FROM_ADAT2:
3524                 pref_sync_ref = "ADAT2";
3525                 break;
3526         case HDSP_SYNC_FROM_ADAT3:
3527                 pref_sync_ref = "ADAT3";
3528                 break;
3529         default:
3530                 pref_sync_ref = "Word Clock";
3531                 break;
3532         }
3533         snd_iprintf (buffer, "Preferred Sync Reference: %s\n", pref_sync_ref);
3534
3535         switch (hdsp_autosync_ref (hdsp)) {
3536         case HDSP_AUTOSYNC_FROM_WORD:
3537                 autosync_ref = "Word Clock";
3538                 break;
3539         case HDSP_AUTOSYNC_FROM_ADAT_SYNC:
3540                 autosync_ref = "ADAT Sync";
3541                 break;
3542         case HDSP_AUTOSYNC_FROM_SPDIF:
3543                 autosync_ref = "SPDIF";
3544                 break;
3545         case HDSP_AUTOSYNC_FROM_NONE:
3546                 autosync_ref = "None";
3547                 break;
3548         case HDSP_AUTOSYNC_FROM_ADAT1:
3549                 autosync_ref = "ADAT1";
3550                 break;
3551         case HDSP_AUTOSYNC_FROM_ADAT2:
3552                 autosync_ref = "ADAT2";
3553                 break;
3554         case HDSP_AUTOSYNC_FROM_ADAT3:
3555                 autosync_ref = "ADAT3";
3556                 break;
3557         default:
3558                 autosync_ref = "---";
3559                 break;
3560         }
3561         snd_iprintf (buffer, "AutoSync Reference: %s\n", autosync_ref);
3562
3563         snd_iprintf (buffer, "AutoSync Frequency: %d\n", hdsp_external_sample_rate(hdsp));
3564
3565         snd_iprintf (buffer, "System Clock Mode: %s\n", system_clock_mode);
3566
3567         snd_iprintf (buffer, "System Clock Frequency: %d\n", hdsp->system_sample_rate);
3568         snd_iprintf (buffer, "System Clock Locked: %s\n", hdsp->clock_source_locked ? "Yes" : "No");
3569
3570         snd_iprintf(buffer, "\n");
3571
3572         if (hdsp->io_type != RPM) {
3573                 switch (hdsp_spdif_in(hdsp)) {
3574                 case HDSP_SPDIFIN_OPTICAL:
3575                         snd_iprintf(buffer, "IEC958 input: Optical\n");
3576                         break;
3577                 case HDSP_SPDIFIN_COAXIAL:
3578                         snd_iprintf(buffer, "IEC958 input: Coaxial\n");
3579                         break;
3580                 case HDSP_SPDIFIN_INTERNAL:
3581                         snd_iprintf(buffer, "IEC958 input: Internal\n");
3582                         break;
3583                 case HDSP_SPDIFIN_AES:
3584                         snd_iprintf(buffer, "IEC958 input: AES\n");
3585                         break;
3586                 default:
3587                         snd_iprintf(buffer, "IEC958 input: ???\n");
3588                         break;
3589                 }
3590         }
3591
3592         if (RPM == hdsp->io_type) {
3593                 if (hdsp->control_register & HDSP_RPM_Bypass)
3594                         snd_iprintf(buffer, "RPM Bypass: disabled\n");
3595                 else
3596                         snd_iprintf(buffer, "RPM Bypass: enabled\n");
3597                 if (hdsp->control_register & HDSP_RPM_Disconnect)
3598                         snd_iprintf(buffer, "RPM disconnected\n");
3599                 else
3600                         snd_iprintf(buffer, "RPM connected\n");
3601
3602                 switch (hdsp->control_register & HDSP_RPM_Inp12) {
3603                 case HDSP_RPM_Inp12_Phon_6dB:
3604                         snd_iprintf(buffer, "Input 1/2: Phono, 6dB\n");
3605                         break;
3606                 case HDSP_RPM_Inp12_Phon_0dB:
3607                         snd_iprintf(buffer, "Input 1/2: Phono, 0dB\n");
3608                         break;
3609                 case HDSP_RPM_Inp12_Phon_n6dB:
3610                         snd_iprintf(buffer, "Input 1/2: Phono, -6dB\n");
3611                         break;
3612                 case HDSP_RPM_Inp12_Line_0dB:
3613                         snd_iprintf(buffer, "Input 1/2: Line, 0dB\n");
3614                         break;
3615                 case HDSP_RPM_Inp12_Line_n6dB:
3616                         snd_iprintf(buffer, "Input 1/2: Line, -6dB\n");
3617                         break;
3618                 default:
3619                         snd_iprintf(buffer, "Input 1/2: ???\n");
3620                 }
3621
3622                 switch (hdsp->control_register & HDSP_RPM_Inp34) {
3623                 case HDSP_RPM_Inp34_Phon_6dB:
3624                         snd_iprintf(buffer, "Input 3/4: Phono, 6dB\n");
3625                         break;
3626                 case HDSP_RPM_Inp34_Phon_0dB:
3627                         snd_iprintf(buffer, "Input 3/4: Phono, 0dB\n");
3628                         break;
3629                 case HDSP_RPM_Inp34_Phon_n6dB:
3630                         snd_iprintf(buffer, "Input 3/4: Phono, -6dB\n");
3631                         break;
3632                 case HDSP_RPM_Inp34_Line_0dB:
3633                         snd_iprintf(buffer, "Input 3/4: Line, 0dB\n");
3634                         break;
3635                 case HDSP_RPM_Inp34_Line_n6dB:
3636                         snd_iprintf(buffer, "Input 3/4: Line, -6dB\n");
3637                         break;
3638                 default:
3639                         snd_iprintf(buffer, "Input 3/4: ???\n");
3640                 }
3641
3642         } else {
3643                 if (hdsp->control_register & HDSP_SPDIFOpticalOut)
3644                         snd_iprintf(buffer, "IEC958 output: Coaxial & ADAT1\n");
3645                 else
3646                         snd_iprintf(buffer, "IEC958 output: Coaxial only\n");
3647
3648                 if (hdsp->control_register & HDSP_SPDIFProfessional)
3649                         snd_iprintf(buffer, "IEC958 quality: Professional\n");
3650                 else
3651                         snd_iprintf(buffer, "IEC958 quality: Consumer\n");
3652
3653                 if (hdsp->control_register & HDSP_SPDIFEmphasis)
3654                         snd_iprintf(buffer, "IEC958 emphasis: on\n");
3655                 else
3656                         snd_iprintf(buffer, "IEC958 emphasis: off\n");
3657
3658                 if (hdsp->control_register & HDSP_SPDIFNonAudio)
3659                         snd_iprintf(buffer, "IEC958 NonAudio: on\n");
3660                 else
3661                         snd_iprintf(buffer, "IEC958 NonAudio: off\n");
3662                 x = hdsp_spdif_sample_rate(hdsp);
3663                 if (x != 0)
3664                         snd_iprintf(buffer, "IEC958 sample rate: %d\n", x);
3665                 else
3666                         snd_iprintf(buffer, "IEC958 sample rate: Error flag set\n");
3667         }
3668         snd_iprintf(buffer, "\n");
3669
3670         /* Sync Check */
3671         x = status & HDSP_Sync0;
3672         if (status & HDSP_Lock0)
3673                 snd_iprintf(buffer, "ADAT1: %s\n", x ? "Sync" : "Lock");
3674         else
3675                 snd_iprintf(buffer, "ADAT1: No Lock\n");
3676
3677         switch (hdsp->io_type) {
3678         case Digiface:
3679         case H9652:
3680                 x = status & HDSP_Sync1;
3681                 if (status & HDSP_Lock1)
3682                         snd_iprintf(buffer, "ADAT2: %s\n", x ? "Sync" : "Lock");
3683                 else
3684                         snd_iprintf(buffer, "ADAT2: No Lock\n");
3685                 x = status & HDSP_Sync2;
3686                 if (status & HDSP_Lock2)
3687                         snd_iprintf(buffer, "ADAT3: %s\n", x ? "Sync" : "Lock");
3688                 else
3689                         snd_iprintf(buffer, "ADAT3: No Lock\n");
3690                 break;
3691         default:
3692                 /* relax */
3693                 break;
3694         }
3695
3696         x = status & HDSP_SPDIFSync;
3697         if (status & HDSP_SPDIFErrorFlag)
3698                 snd_iprintf (buffer, "SPDIF: No Lock\n");
3699         else
3700                 snd_iprintf (buffer, "SPDIF: %s\n", x ? "Sync" : "Lock");
3701
3702         x = status2 & HDSP_wc_sync;
3703         if (status2 & HDSP_wc_lock)
3704                 snd_iprintf (buffer, "Word Clock: %s\n", x ? "Sync" : "Lock");
3705         else
3706                 snd_iprintf (buffer, "Word Clock: No Lock\n");
3707
3708         x = status & HDSP_TimecodeSync;
3709         if (status & HDSP_TimecodeLock)
3710                 snd_iprintf(buffer, "ADAT Sync: %s\n", x ? "Sync" : "Lock");
3711         else
3712                 snd_iprintf(buffer, "ADAT Sync: No Lock\n");
3713
3714         snd_iprintf(buffer, "\n");
3715
3716         /* Informations about H9632 specific controls */
3717         if (hdsp->io_type == H9632) {
3718                 char *tmp;
3719
3720                 switch (hdsp_ad_gain(hdsp)) {
3721                 case 0:
3722                         tmp = "-10 dBV";
3723                         break;
3724                 case 1:
3725                         tmp = "+4 dBu";
3726                         break;
3727                 default:
3728                         tmp = "Lo Gain";
3729                         break;
3730                 }
3731                 snd_iprintf(buffer, "AD Gain : %s\n", tmp);
3732
3733                 switch (hdsp_da_gain(hdsp)) {
3734                 case 0:
3735                         tmp = "Hi Gain";
3736                         break;
3737                 case 1:
3738                         tmp = "+4 dBu";
3739                         break;
3740                 default:
3741                         tmp = "-10 dBV";
3742                         break;
3743                 }
3744                 snd_iprintf(buffer, "DA Gain : %s\n", tmp);
3745
3746                 switch (hdsp_phone_gain(hdsp)) {
3747                 case 0:
3748                         tmp = "0 dB";
3749                         break;
3750                 case 1:
3751                         tmp = "-6 dB";
3752                         break;
3753                 default:
3754                         tmp = "-12 dB";
3755                         break;
3756                 }
3757                 snd_iprintf(buffer, "Phones Gain : %s\n", tmp);
3758
3759                 snd_iprintf(buffer, "XLR Breakout Cable : %s\n",
3760                         hdsp_toggle_setting(hdsp, HDSP_XLRBreakoutCable) ?
3761                         "yes" : "no");
3762
3763                 if (hdsp->control_register & HDSP_AnalogExtensionBoard)
3764                         snd_iprintf(buffer, "AEB : on (ADAT1 internal)\n");
3765                 else
3766                         snd_iprintf(buffer, "AEB : off (ADAT1 external)\n");
3767                 snd_iprintf(buffer, "\n");
3768         }
3769
3770 }
3771
3772 static void snd_hdsp_proc_init(struct hdsp *hdsp)
3773 {
3774         struct snd_info_entry *entry;
3775
3776         if (! snd_card_proc_new(hdsp->card, "hdsp", &entry))
3777                 snd_info_set_text_ops(entry, hdsp, snd_hdsp_proc_read);
3778 }
3779
3780 static void snd_hdsp_free_buffers(struct hdsp *hdsp)
3781 {
3782         snd_hammerfall_free_buffer(&hdsp->capture_dma_buf, hdsp->pci);
3783         snd_hammerfall_free_buffer(&hdsp->playback_dma_buf, hdsp->pci);
3784 }
3785
3786 static int snd_hdsp_initialize_memory(struct hdsp *hdsp)
3787 {
3788         unsigned long pb_bus, cb_bus;
3789
3790         if (snd_hammerfall_get_buffer(hdsp->pci, &hdsp->capture_dma_buf, HDSP_DMA_AREA_BYTES) < 0 ||
3791             snd_hammerfall_get_buffer(hdsp->pci, &hdsp->playback_dma_buf, HDSP_DMA_AREA_BYTES) < 0) {
3792                 if (hdsp->capture_dma_buf.area)
3793                         snd_dma_free_pages(&hdsp->capture_dma_buf);
3794                 printk(KERN_ERR "%s: no buffers available\n", hdsp->card_name);
3795                 return -ENOMEM;
3796         }
3797
3798         /* Align to bus-space 64K boundary */
3799
3800         cb_bus = ALIGN(hdsp->capture_dma_buf.addr, 0x10000ul);
3801         pb_bus = ALIGN(hdsp->playback_dma_buf.addr, 0x10000ul);
3802
3803         /* Tell the card where it is */
3804
3805         hdsp_write(hdsp, HDSP_inputBufferAddress, cb_bus);
3806         hdsp_write(hdsp, HDSP_outputBufferAddress, pb_bus);
3807
3808         hdsp->capture_buffer = hdsp->capture_dma_buf.area + (cb_bus - hdsp->capture_dma_buf.addr);
3809         hdsp->playback_buffer = hdsp->playback_dma_buf.area + (pb_bus - hdsp->playback_dma_buf.addr);
3810
3811         return 0;
3812 }
3813
3814 static int snd_hdsp_set_defaults(struct hdsp *hdsp)
3815 {
3816         unsigned int i;
3817
3818         /* ASSUMPTION: hdsp->lock is either held, or
3819            there is no need to hold it (e.g. during module
3820            initialization).
3821          */
3822
3823         /* set defaults:
3824
3825            SPDIF Input via Coax
3826            Master clock mode
3827            maximum latency (7 => 2^7 = 8192 samples, 64Kbyte buffer,
3828                             which implies 2 4096 sample, 32Kbyte periods).
3829            Enable line out.
3830          */
3831
3832         hdsp->control_register = HDSP_ClockModeMaster |
3833                                  HDSP_SPDIFInputCoaxial |
3834                                  hdsp_encode_latency(7) |
3835                                  HDSP_LineOut;
3836
3837
3838         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
3839
3840 #ifdef SNDRV_BIG_ENDIAN
3841         hdsp->control2_register = HDSP_BIGENDIAN_MODE;
3842 #else
3843         hdsp->control2_register = 0;
3844 #endif
3845         if (hdsp->io_type == H9652)
3846                 snd_hdsp_9652_enable_mixer (hdsp);
3847         else
3848                 hdsp_write (hdsp, HDSP_control2Reg, hdsp->control2_register);
3849
3850         hdsp_reset_hw_pointer(hdsp);
3851         hdsp_compute_period_size(hdsp);
3852
3853         /* silence everything */
3854
3855         for (i = 0; i < HDSP_MATRIX_MIXER_SIZE; ++i)
3856                 hdsp->mixer_matrix[i] = MINUS_INFINITY_GAIN;
3857
3858         for (i = 0; i < ((hdsp->io_type == H9652 || hdsp->io_type == H9632) ? 1352 : HDSP_MATRIX_MIXER_SIZE); ++i) {
3859                 if (hdsp_write_gain (hdsp, i, MINUS_INFINITY_GAIN))
3860                         return -EIO;
3861         }
3862
3863         /* H9632 specific defaults */
3864         if (hdsp->io_type == H9632) {
3865                 hdsp->control_register |= (HDSP_DAGainPlus4dBu | HDSP_ADGainPlus4dBu | HDSP_PhoneGain0dB);
3866                 hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
3867         }
3868
3869         /* set a default rate so that the channel map is set up.
3870          */
3871
3872         hdsp_set_rate(hdsp, 48000, 1);
3873
3874         return 0;
3875 }
3876
3877 static void hdsp_midi_tasklet(unsigned long arg)
3878 {
3879         struct hdsp *hdsp = (struct hdsp *)arg;
3880
3881         if (hdsp->midi[0].pending)
3882                 snd_hdsp_midi_input_read (&hdsp->midi[0]);
3883         if (hdsp->midi[1].pending)
3884                 snd_hdsp_midi_input_read (&hdsp->midi[1]);
3885 }
3886
3887 static irqreturn_t snd_hdsp_interrupt(int irq, void *dev_id)
3888 {
3889         struct hdsp *hdsp = (struct hdsp *) dev_id;
3890         unsigned int status;
3891         int audio;
3892         int midi0;
3893         int midi1;
3894         unsigned int midi0status;
3895         unsigned int midi1status;
3896         int schedule = 0;
3897
3898         status = hdsp_read(hdsp, HDSP_statusRegister);
3899
3900         audio = status & HDSP_audioIRQPending;
3901         midi0 = status & HDSP_midi0IRQPending;
3902         midi1 = status & HDSP_midi1IRQPending;
3903
3904         if (!audio && !midi0 && !midi1)
3905                 return IRQ_NONE;
3906
3907         hdsp_write(hdsp, HDSP_interruptConfirmation, 0);
3908
3909         midi0status = hdsp_read (hdsp, HDSP_midiStatusIn0) & 0xff;
3910         midi1status = hdsp_read (hdsp, HDSP_midiStatusIn1) & 0xff;
3911
3912         if (!(hdsp->state & HDSP_InitializationComplete))
3913                 return IRQ_HANDLED;
3914
3915         if (audio) {
3916                 if (hdsp->capture_substream)
3917                         snd_pcm_period_elapsed(hdsp->pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream);
3918
3919                 if (hdsp->playback_substream)
3920                         snd_pcm_period_elapsed(hdsp->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream);
3921         }
3922
3923         if (midi0 && midi0status) {
3924                 if (hdsp->use_midi_tasklet) {
3925                         /* we disable interrupts for this input until processing is done */
3926                         hdsp->control_register &= ~HDSP_Midi0InterruptEnable;
3927                         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
3928                         hdsp->midi[0].pending = 1;
3929                         schedule = 1;
3930                 } else {
3931                         snd_hdsp_midi_input_read (&hdsp->midi[0]);
3932                 }
3933         }
3934         if (hdsp->io_type != Multiface && hdsp->io_type != RPM && hdsp->io_type != H9632 && midi1 && midi1status) {
3935                 if (hdsp->use_midi_tasklet) {
3936                         /* we disable interrupts for this input until processing is done */
3937                         hdsp->control_register &= ~HDSP_Midi1InterruptEnable;
3938                         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
3939                         hdsp->midi[1].pending = 1;
3940                         schedule = 1;
3941                 } else {
3942                         snd_hdsp_midi_input_read (&hdsp->midi[1]);
3943                 }
3944         }
3945         if (hdsp->use_midi_tasklet && schedule)
3946                 tasklet_schedule(&hdsp->midi_tasklet);
3947         return IRQ_HANDLED;
3948 }
3949
3950 static snd_pcm_uframes_t snd_hdsp_hw_pointer(struct snd_pcm_substream *substream)
3951 {
3952         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
3953         return hdsp_hw_pointer(hdsp);
3954 }
3955
3956 static char *hdsp_channel_buffer_location(struct hdsp *hdsp,
3957                                              int stream,
3958                                              int channel)
3959
3960 {
3961         int mapped_channel;
3962
3963         if (snd_BUG_ON(channel < 0 || channel >= hdsp->max_channels))
3964                 return NULL;
3965
3966         if ((mapped_channel = hdsp->channel_map[channel]) < 0)
3967                 return NULL;
3968
3969         if (stream == SNDRV_PCM_STREAM_CAPTURE)
3970                 return hdsp->capture_buffer + (mapped_channel * HDSP_CHANNEL_BUFFER_BYTES);
3971         else
3972                 return hdsp->playback_buffer + (mapped_channel * HDSP_CHANNEL_BUFFER_BYTES);
3973 }
3974
3975 static int snd_hdsp_playback_copy(struct snd_pcm_substream *substream, int channel,
3976                                   snd_pcm_uframes_t pos, void __user *src, snd_pcm_uframes_t count)
3977 {
3978         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
3979         char *channel_buf;
3980
3981         if (snd_BUG_ON(pos + count > HDSP_CHANNEL_BUFFER_BYTES / 4))
3982                 return -EINVAL;
3983
3984         channel_buf = hdsp_channel_buffer_location (hdsp, substream->pstr->stream, channel);
3985         if (snd_BUG_ON(!channel_buf))
3986                 return -EIO;
3987         if (copy_from_user(channel_buf + pos * 4, src, count * 4))
3988                 return -EFAULT;
3989         return count;
3990 }
3991
3992 static int snd_hdsp_capture_copy(struct snd_pcm_substream *substream, int channel,
3993                                  snd_pcm_uframes_t pos, void __user *dst, snd_pcm_uframes_t count)
3994 {
3995         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
3996         char *channel_buf;
3997
3998         if (snd_BUG_ON(pos + count > HDSP_CHANNEL_BUFFER_BYTES / 4))
3999                 return -EINVAL;
4000
4001         channel_buf = hdsp_channel_buffer_location (hdsp, substream->pstr->stream, channel);
4002         if (snd_BUG_ON(!channel_buf))
4003                 return -EIO;
4004         if (copy_to_user(dst, channel_buf + pos * 4, count * 4))
4005                 return -EFAULT;
4006         return count;
4007 }
4008
4009 static int snd_hdsp_hw_silence(struct snd_pcm_substream *substream, int channel,
4010                                   snd_pcm_uframes_t pos, snd_pcm_uframes_t count)
4011 {
4012         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4013         char *channel_buf;
4014
4015         channel_buf = hdsp_channel_buffer_location (hdsp, substream->pstr->stream, channel);
4016         if (snd_BUG_ON(!channel_buf))
4017                 return -EIO;
4018         memset(channel_buf + pos * 4, 0, count * 4);
4019         return count;
4020 }
4021
4022 static int snd_hdsp_reset(struct snd_pcm_substream *substream)
4023 {
4024         struct snd_pcm_runtime *runtime = substream->runtime;
4025         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4026         struct snd_pcm_substream *other;
4027         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
4028                 other = hdsp->capture_substream;
4029         else
4030                 other = hdsp->playback_substream;
4031         if (hdsp->running)
4032                 runtime->status->hw_ptr = hdsp_hw_pointer(hdsp);
4033         else
4034                 runtime->status->hw_ptr = 0;
4035         if (other) {
4036                 struct snd_pcm_substream *s;
4037                 struct snd_pcm_runtime *oruntime = other->runtime;
4038                 snd_pcm_group_for_each_entry(s, substream) {
4039                         if (s == other) {
4040                                 oruntime->status->hw_ptr = runtime->status->hw_ptr;
4041                                 break;
4042                         }
4043                 }
4044         }
4045         return 0;
4046 }
4047
4048 static int snd_hdsp_hw_params(struct snd_pcm_substream *substream,
4049                                  struct snd_pcm_hw_params *params)
4050 {
4051         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4052         int err;
4053         pid_t this_pid;
4054         pid_t other_pid;
4055
4056         if (hdsp_check_for_iobox (hdsp))
4057                 return -EIO;
4058
4059         if (hdsp_check_for_firmware(hdsp, 1))
4060                 return -EIO;
4061
4062         spin_lock_irq(&hdsp->lock);
4063
4064         if (substream->pstr->stream == SNDRV_PCM_STREAM_PLAYBACK) {
4065                 hdsp->control_register &= ~(HDSP_SPDIFProfessional | HDSP_SPDIFNonAudio | HDSP_SPDIFEmphasis);
4066                 hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register |= hdsp->creg_spdif_stream);
4067                 this_pid = hdsp->playback_pid;
4068                 other_pid = hdsp->capture_pid;
4069         } else {
4070                 this_pid = hdsp->capture_pid;
4071                 other_pid = hdsp->playback_pid;
4072         }
4073
4074         if ((other_pid > 0) && (this_pid != other_pid)) {
4075
4076                 /* The other stream is open, and not by the same
4077                    task as this one. Make sure that the parameters
4078                    that matter are the same.
4079                  */
4080
4081                 if (params_rate(params) != hdsp->system_sample_rate) {
4082                         spin_unlock_irq(&hdsp->lock);
4083                         _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE);
4084                         return -EBUSY;
4085                 }
4086
4087                 if (params_period_size(params) != hdsp->period_bytes / 4) {
4088                         spin_unlock_irq(&hdsp->lock);
4089                         _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
4090                         return -EBUSY;
4091                 }
4092
4093                 /* We're fine. */
4094
4095                 spin_unlock_irq(&hdsp->lock);
4096                 return 0;
4097
4098         } else {
4099                 spin_unlock_irq(&hdsp->lock);
4100         }
4101
4102         /* how to make sure that the rate matches an externally-set one ?
4103          */
4104
4105         spin_lock_irq(&hdsp->lock);
4106         if (! hdsp->clock_source_locked) {
4107                 if ((err = hdsp_set_rate(hdsp, params_rate(params), 0)) < 0) {
4108                         spin_unlock_irq(&hdsp->lock);
4109                         _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE);
4110                         return err;
4111                 }
4112         }
4113         spin_unlock_irq(&hdsp->lock);
4114
4115         if ((err = hdsp_set_interrupt_interval(hdsp, params_period_size(params))) < 0) {
4116                 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
4117                 return err;
4118         }
4119
4120         return 0;
4121 }
4122
4123 static int snd_hdsp_channel_info(struct snd_pcm_substream *substream,
4124                                     struct snd_pcm_channel_info *info)
4125 {
4126         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4127         int mapped_channel;
4128
4129         if (snd_BUG_ON(info->channel >= hdsp->max_channels))
4130                 return -EINVAL;
4131
4132         if ((mapped_channel = hdsp->channel_map[info->channel]) < 0)
4133                 return -EINVAL;
4134
4135         info->offset = mapped_channel * HDSP_CHANNEL_BUFFER_BYTES;
4136         info->first = 0;
4137         info->step = 32;
4138         return 0;
4139 }
4140
4141 static int snd_hdsp_ioctl(struct snd_pcm_substream *substream,
4142                              unsigned int cmd, void *arg)
4143 {
4144         switch (cmd) {
4145         case SNDRV_PCM_IOCTL1_RESET:
4146                 return snd_hdsp_reset(substream);
4147         case SNDRV_PCM_IOCTL1_CHANNEL_INFO:
4148                 return snd_hdsp_channel_info(substream, arg);
4149         default:
4150                 break;
4151         }
4152
4153         return snd_pcm_lib_ioctl(substream, cmd, arg);
4154 }
4155
4156 static int snd_hdsp_trigger(struct snd_pcm_substream *substream, int cmd)
4157 {
4158         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4159         struct snd_pcm_substream *other;
4160         int running;
4161
4162         if (hdsp_check_for_iobox (hdsp))
4163                 return -EIO;
4164
4165         if (hdsp_check_for_firmware(hdsp, 0)) /* no auto-loading in trigger */
4166                 return -EIO;
4167
4168         spin_lock(&hdsp->lock);
4169         running = hdsp->running;
4170         switch (cmd) {
4171         case SNDRV_PCM_TRIGGER_START:
4172                 running |= 1 << substream->stream;
4173                 break;
4174         case SNDRV_PCM_TRIGGER_STOP:
4175                 running &= ~(1 << substream->stream);
4176                 break;
4177         default:
4178                 snd_BUG();
4179                 spin_unlock(&hdsp->lock);
4180                 return -EINVAL;
4181         }
4182         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
4183                 other = hdsp->capture_substream;
4184         else
4185                 other = hdsp->playback_substream;
4186
4187         if (other) {
4188                 struct snd_pcm_substream *s;
4189                 snd_pcm_group_for_each_entry(s, substream) {
4190                         if (s == other) {
4191                                 snd_pcm_trigger_done(s, substream);
4192                                 if (cmd == SNDRV_PCM_TRIGGER_START)
4193                                         running |= 1 << s->stream;
4194                                 else
4195                                         running &= ~(1 << s->stream);
4196                                 goto _ok;
4197                         }
4198                 }
4199                 if (cmd == SNDRV_PCM_TRIGGER_START) {
4200                         if (!(running & (1 << SNDRV_PCM_STREAM_PLAYBACK)) &&
4201                             substream->stream == SNDRV_PCM_STREAM_CAPTURE)
4202                                 hdsp_silence_playback(hdsp);
4203                 } else {
4204                         if (running &&
4205                             substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
4206                                 hdsp_silence_playback(hdsp);
4207                 }
4208         } else {
4209                 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
4210                                 hdsp_silence_playback(hdsp);
4211         }
4212  _ok:
4213         snd_pcm_trigger_done(substream, substream);
4214         if (!hdsp->running && running)
4215                 hdsp_start_audio(hdsp);
4216         else if (hdsp->running && !running)
4217                 hdsp_stop_audio(hdsp);
4218         hdsp->running = running;
4219         spin_unlock(&hdsp->lock);
4220
4221         return 0;
4222 }
4223
4224 static int snd_hdsp_prepare(struct snd_pcm_substream *substream)
4225 {
4226         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4227         int result = 0;
4228
4229         if (hdsp_check_for_iobox (hdsp))
4230                 return -EIO;
4231
4232         if (hdsp_check_for_firmware(hdsp, 1))
4233                 return -EIO;
4234
4235         spin_lock_irq(&hdsp->lock);
4236         if (!hdsp->running)
4237                 hdsp_reset_hw_pointer(hdsp);
4238         spin_unlock_irq(&hdsp->lock);
4239         return result;
4240 }
4241
4242 static struct snd_pcm_hardware snd_hdsp_playback_subinfo =
4243 {
4244         .info =                 (SNDRV_PCM_INFO_MMAP |
4245                                  SNDRV_PCM_INFO_MMAP_VALID |
4246                                  SNDRV_PCM_INFO_NONINTERLEAVED |
4247                                  SNDRV_PCM_INFO_SYNC_START |
4248                                  SNDRV_PCM_INFO_DOUBLE),
4249 #ifdef SNDRV_BIG_ENDIAN
4250         .formats =              SNDRV_PCM_FMTBIT_S32_BE,
4251 #else
4252         .formats =              SNDRV_PCM_FMTBIT_S32_LE,
4253 #endif
4254         .rates =                (SNDRV_PCM_RATE_32000 |
4255                                  SNDRV_PCM_RATE_44100 |
4256                                  SNDRV_PCM_RATE_48000 |
4257                                  SNDRV_PCM_RATE_64000 |
4258                                  SNDRV_PCM_RATE_88200 |
4259                                  SNDRV_PCM_RATE_96000),
4260         .rate_min =             32000,
4261         .rate_max =             96000,
4262         .channels_min =         6,
4263         .channels_max =         HDSP_MAX_CHANNELS,
4264         .buffer_bytes_max =     HDSP_CHANNEL_BUFFER_BYTES * HDSP_MAX_CHANNELS,
4265         .period_bytes_min =     (64 * 4) * 10,
4266         .period_bytes_max =     (8192 * 4) * HDSP_MAX_CHANNELS,
4267         .periods_min =          2,
4268         .periods_max =          2,
4269         .fifo_size =            0
4270 };
4271
4272 static struct snd_pcm_hardware snd_hdsp_capture_subinfo =
4273 {
4274         .info =                 (SNDRV_PCM_INFO_MMAP |
4275                                  SNDRV_PCM_INFO_MMAP_VALID |
4276                                  SNDRV_PCM_INFO_NONINTERLEAVED |
4277                                  SNDRV_PCM_INFO_SYNC_START),
4278 #ifdef SNDRV_BIG_ENDIAN
4279         .formats =              SNDRV_PCM_FMTBIT_S32_BE,
4280 #else
4281         .formats =              SNDRV_PCM_FMTBIT_S32_LE,
4282 #endif
4283         .rates =                (SNDRV_PCM_RATE_32000 |
4284                                  SNDRV_PCM_RATE_44100 |
4285                                  SNDRV_PCM_RATE_48000 |
4286                                  SNDRV_PCM_RATE_64000 |
4287                                  SNDRV_PCM_RATE_88200 |
4288                                  SNDRV_PCM_RATE_96000),
4289         .rate_min =             32000,
4290         .rate_max =             96000,
4291         .channels_min =         5,
4292         .channels_max =         HDSP_MAX_CHANNELS,
4293         .buffer_bytes_max =     HDSP_CHANNEL_BUFFER_BYTES * HDSP_MAX_CHANNELS,
4294         .period_bytes_min =     (64 * 4) * 10,
4295         .period_bytes_max =     (8192 * 4) * HDSP_MAX_CHANNELS,
4296         .periods_min =          2,
4297         .periods_max =          2,
4298         .fifo_size =            0
4299 };
4300
4301 static unsigned int hdsp_period_sizes[] = { 64, 128, 256, 512, 1024, 2048, 4096, 8192 };
4302
4303 static struct snd_pcm_hw_constraint_list hdsp_hw_constraints_period_sizes = {
4304         .count = ARRAY_SIZE(hdsp_period_sizes),
4305         .list = hdsp_period_sizes,
4306         .mask = 0
4307 };
4308
4309 static unsigned int hdsp_9632_sample_rates[] = { 32000, 44100, 48000, 64000, 88200, 96000, 128000, 176400, 192000 };
4310
4311 static struct snd_pcm_hw_constraint_list hdsp_hw_constraints_9632_sample_rates = {
4312         .count = ARRAY_SIZE(hdsp_9632_sample_rates),
4313         .list = hdsp_9632_sample_rates,
4314         .mask = 0
4315 };
4316
4317 static int snd_hdsp_hw_rule_in_channels(struct snd_pcm_hw_params *params,
4318                                         struct snd_pcm_hw_rule *rule)
4319 {
4320         struct hdsp *hdsp = rule->private;
4321         struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
4322         if (hdsp->io_type == H9632) {
4323                 unsigned int list[3];
4324                 list[0] = hdsp->qs_in_channels;
4325                 list[1] = hdsp->ds_in_channels;
4326                 list[2] = hdsp->ss_in_channels;
4327                 return snd_interval_list(c, 3, list, 0);
4328         } else {
4329                 unsigned int list[2];
4330                 list[0] = hdsp->ds_in_channels;
4331                 list[1] = hdsp->ss_in_channels;
4332                 return snd_interval_list(c, 2, list, 0);
4333         }
4334 }
4335
4336 static int snd_hdsp_hw_rule_out_channels(struct snd_pcm_hw_params *params,
4337                                         struct snd_pcm_hw_rule *rule)
4338 {
4339         unsigned int list[3];
4340         struct hdsp *hdsp = rule->private;
4341         struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
4342         if (hdsp->io_type == H9632) {
4343                 list[0] = hdsp->qs_out_channels;
4344                 list[1] = hdsp->ds_out_channels;
4345                 list[2] = hdsp->ss_out_channels;
4346                 return snd_interval_list(c, 3, list, 0);
4347         } else {
4348                 list[0] = hdsp->ds_out_channels;
4349                 list[1] = hdsp->ss_out_channels;
4350         }
4351         return snd_interval_list(c, 2, list, 0);
4352 }
4353
4354 static int snd_hdsp_hw_rule_in_channels_rate(struct snd_pcm_hw_params *params,
4355                                              struct snd_pcm_hw_rule *rule)
4356 {
4357         struct hdsp *hdsp = rule->private;
4358         struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
4359         struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
4360         if (r->min > 96000 && hdsp->io_type == H9632) {
4361                 struct snd_interval t = {
4362                         .min = hdsp->qs_in_channels,
4363                         .max = hdsp->qs_in_channels,
4364                         .integer = 1,
4365                 };
4366                 return snd_interval_refine(c, &t);
4367         } else if (r->min > 48000 && r->max <= 96000) {
4368                 struct snd_interval t = {
4369                         .min = hdsp->ds_in_channels,
4370                         .max = hdsp->ds_in_channels,
4371                         .integer = 1,
4372                 };
4373                 return snd_interval_refine(c, &t);
4374         } else if (r->max < 64000) {
4375                 struct snd_interval t = {
4376                         .min = hdsp->ss_in_channels,
4377                         .max = hdsp->ss_in_channels,
4378                         .integer = 1,
4379                 };
4380                 return snd_interval_refine(c, &t);
4381         }
4382         return 0;
4383 }
4384
4385 static int snd_hdsp_hw_rule_out_channels_rate(struct snd_pcm_hw_params *params,
4386                                              struct snd_pcm_hw_rule *rule)
4387 {
4388         struct hdsp *hdsp = rule->private;
4389         struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
4390         struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
4391         if (r->min > 96000 && hdsp->io_type == H9632) {
4392                 struct snd_interval t = {
4393                         .min = hdsp->qs_out_channels,
4394                         .max = hdsp->qs_out_channels,
4395                         .integer = 1,
4396                 };
4397                 return snd_interval_refine(c, &t);
4398         } else if (r->min > 48000 && r->max <= 96000) {
4399                 struct snd_interval t = {
4400                         .min = hdsp->ds_out_channels,
4401                         .max = hdsp->ds_out_channels,
4402                         .integer = 1,
4403                 };
4404                 return snd_interval_refine(c, &t);
4405         } else if (r->max < 64000) {
4406                 struct snd_interval t = {
4407                         .min = hdsp->ss_out_channels,
4408                         .max = hdsp->ss_out_channels,
4409                         .integer = 1,
4410                 };
4411                 return snd_interval_refine(c, &t);
4412         }
4413         return 0;
4414 }
4415
4416 static int snd_hdsp_hw_rule_rate_out_channels(struct snd_pcm_hw_params *params,
4417                                              struct snd_pcm_hw_rule *rule)
4418 {
4419         struct hdsp *hdsp = rule->private;
4420         struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
4421         struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
4422         if (c->min >= hdsp->ss_out_channels) {
4423                 struct snd_interval t = {
4424                         .min = 32000,
4425                         .max = 48000,
4426                         .integer = 1,
4427                 };
4428                 return snd_interval_refine(r, &t);
4429         } else if (c->max <= hdsp->qs_out_channels && hdsp->io_type == H9632) {
4430                 struct snd_interval t = {
4431                         .min = 128000,
4432                         .max = 192000,
4433                         .integer = 1,
4434                 };
4435                 return snd_interval_refine(r, &t);
4436         } else if (c->max <= hdsp->ds_out_channels) {
4437                 struct snd_interval t = {
4438                         .min = 64000,
4439                         .max = 96000,
4440                         .integer = 1,
4441                 };
4442                 return snd_interval_refine(r, &t);
4443         }
4444         return 0;
4445 }
4446
4447 static int snd_hdsp_hw_rule_rate_in_channels(struct snd_pcm_hw_params *params,
4448                                              struct snd_pcm_hw_rule *rule)
4449 {
4450         struct hdsp *hdsp = rule->private;
4451         struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
4452         struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
4453         if (c->min >= hdsp->ss_in_channels) {
4454                 struct snd_interval t = {
4455                         .min = 32000,
4456                         .max = 48000,
4457                         .integer = 1,
4458                 };
4459                 return snd_interval_refine(r, &t);
4460         } else if (c->max <= hdsp->qs_in_channels && hdsp->io_type == H9632) {
4461                 struct snd_interval t = {
4462                         .min = 128000,
4463                         .max = 192000,
4464                         .integer = 1,
4465                 };
4466                 return snd_interval_refine(r, &t);
4467         } else if (c->max <= hdsp->ds_in_channels) {
4468                 struct snd_interval t = {
4469                         .min = 64000,
4470                         .max = 96000,
4471                         .integer = 1,
4472                 };
4473                 return snd_interval_refine(r, &t);
4474         }
4475         return 0;
4476 }
4477
4478 static int snd_hdsp_playback_open(struct snd_pcm_substream *substream)
4479 {
4480         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4481         struct snd_pcm_runtime *runtime = substream->runtime;
4482
4483         if (hdsp_check_for_iobox (hdsp))
4484                 return -EIO;
4485
4486         if (hdsp_check_for_firmware(hdsp, 1))
4487                 return -EIO;
4488
4489         spin_lock_irq(&hdsp->lock);
4490
4491         snd_pcm_set_sync(substream);
4492
4493         runtime->hw = snd_hdsp_playback_subinfo;
4494         runtime->dma_area = hdsp->playback_buffer;
4495         runtime->dma_bytes = HDSP_DMA_AREA_BYTES;
4496
4497         hdsp->playback_pid = current->pid;
4498         hdsp->playback_substream = substream;
4499
4500         spin_unlock_irq(&hdsp->lock);
4501
4502         snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
4503         snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hdsp_hw_constraints_period_sizes);
4504         if (hdsp->clock_source_locked) {
4505                 runtime->hw.rate_min = runtime->hw.rate_max = hdsp->system_sample_rate;
4506         } else if (hdsp->io_type == H9632) {
4507                 runtime->hw.rate_max = 192000;
4508                 runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
4509                 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hdsp_hw_constraints_9632_sample_rates);
4510         }
4511         if (hdsp->io_type == H9632) {
4512                 runtime->hw.channels_min = hdsp->qs_out_channels;
4513                 runtime->hw.channels_max = hdsp->ss_out_channels;
4514         }
4515
4516         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
4517                              snd_hdsp_hw_rule_out_channels, hdsp,
4518                              SNDRV_PCM_HW_PARAM_CHANNELS, -1);
4519         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
4520                              snd_hdsp_hw_rule_out_channels_rate, hdsp,
4521                              SNDRV_PCM_HW_PARAM_RATE, -1);
4522         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
4523                              snd_hdsp_hw_rule_rate_out_channels, hdsp,
4524                              SNDRV_PCM_HW_PARAM_CHANNELS, -1);
4525
4526         if (RPM != hdsp->io_type) {
4527                 hdsp->creg_spdif_stream = hdsp->creg_spdif;
4528                 hdsp->spdif_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
4529                 snd_ctl_notify(hdsp->card, SNDRV_CTL_EVENT_MASK_VALUE |
4530                         SNDRV_CTL_EVENT_MASK_INFO, &hdsp->spdif_ctl->id);
4531         }
4532         return 0;
4533 }
4534
4535 static int snd_hdsp_playback_release(struct snd_pcm_substream *substream)
4536 {
4537         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4538
4539         spin_lock_irq(&hdsp->lock);
4540
4541         hdsp->playback_pid = -1;
4542         hdsp->playback_substream = NULL;
4543
4544         spin_unlock_irq(&hdsp->lock);
4545
4546         if (RPM != hdsp->io_type) {
4547                 hdsp->spdif_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
4548                 snd_ctl_notify(hdsp->card, SNDRV_CTL_EVENT_MASK_VALUE |
4549                         SNDRV_CTL_EVENT_MASK_INFO, &hdsp->spdif_ctl->id);
4550         }
4551         return 0;
4552 }
4553
4554
4555 static int snd_hdsp_capture_open(struct snd_pcm_substream *substream)
4556 {
4557         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4558         struct snd_pcm_runtime *runtime = substream->runtime;
4559
4560         if (hdsp_check_for_iobox (hdsp))
4561                 return -EIO;
4562
4563         if (hdsp_check_for_firmware(hdsp, 1))
4564                 return -EIO;
4565
4566         spin_lock_irq(&hdsp->lock);
4567
4568         snd_pcm_set_sync(substream);
4569
4570         runtime->hw = snd_hdsp_capture_subinfo;
4571         runtime->dma_area = hdsp->capture_buffer;
4572         runtime->dma_bytes = HDSP_DMA_AREA_BYTES;
4573
4574         hdsp->capture_pid = current->pid;
4575         hdsp->capture_substream = substream;
4576
4577         spin_unlock_irq(&hdsp->lock);
4578
4579         snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
4580         snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hdsp_hw_constraints_period_sizes);
4581         if (hdsp->io_type == H9632) {
4582                 runtime->hw.channels_min = hdsp->qs_in_channels;
4583                 runtime->hw.channels_max = hdsp->ss_in_channels;
4584                 runtime->hw.rate_max = 192000;
4585                 runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
4586                 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hdsp_hw_constraints_9632_sample_rates);
4587         }
4588         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
4589                              snd_hdsp_hw_rule_in_channels, hdsp,
4590                              SNDRV_PCM_HW_PARAM_CHANNELS, -1);
4591         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
4592                              snd_hdsp_hw_rule_in_channels_rate, hdsp,
4593                              SNDRV_PCM_HW_PARAM_RATE, -1);
4594         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
4595                              snd_hdsp_hw_rule_rate_in_channels, hdsp,
4596                              SNDRV_PCM_HW_PARAM_CHANNELS, -1);
4597         return 0;
4598 }
4599
4600 static int snd_hdsp_capture_release(struct snd_pcm_substream *substream)
4601 {
4602         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4603
4604         spin_lock_irq(&hdsp->lock);
4605
4606         hdsp->capture_pid = -1;
4607         hdsp->capture_substream = NULL;
4608
4609         spin_unlock_irq(&hdsp->lock);
4610         return 0;
4611 }
4612
4613 /* helper functions for copying meter values */
4614 static inline int copy_u32_le(void __user *dest, void __iomem *src)
4615 {
4616         u32 val = readl(src);
4617         return copy_to_user(dest, &val, 4);
4618 }
4619
4620 static inline int copy_u64_le(void __user *dest, void __iomem *src_low, void __iomem *src_high)
4621 {
4622         u32 rms_low, rms_high;
4623         u64 rms;
4624         rms_low = readl(src_low);
4625         rms_high = readl(src_high);
4626         rms = ((u64)rms_high << 32) | rms_low;
4627         return copy_to_user(dest, &rms, 8);
4628 }
4629
4630 static inline int copy_u48_le(void __user *dest, void __iomem *src_low, void __iomem *src_high)
4631 {
4632         u32 rms_low, rms_high;
4633         u64 rms;
4634         rms_low = readl(src_low) & 0xffffff00;
4635         rms_high = readl(src_high) & 0xffffff00;
4636         rms = ((u64)rms_high << 32) | rms_low;
4637         return copy_to_user(dest, &rms, 8);
4638 }
4639
4640 static int hdsp_9652_get_peak(struct hdsp *hdsp, struct hdsp_peak_rms __user *peak_rms)
4641 {
4642         int doublespeed = 0;
4643         int i, j, channels, ofs;
4644
4645         if (hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DoubleSpeedStatus)
4646                 doublespeed = 1;
4647         channels = doublespeed ? 14 : 26;
4648         for (i = 0, j = 0; i < 26; ++i) {
4649                 if (doublespeed && (i & 4))
4650                         continue;
4651                 ofs = HDSP_9652_peakBase - j * 4;
4652                 if (copy_u32_le(&peak_rms->input_peaks[i], hdsp->iobase + ofs))
4653                         return -EFAULT;
4654                 ofs -= channels * 4;
4655                 if (copy_u32_le(&peak_rms->playback_peaks[i], hdsp->iobase + ofs))
4656                         return -EFAULT;
4657                 ofs -= channels * 4;
4658                 if (copy_u32_le(&peak_rms->output_peaks[i], hdsp->iobase + ofs))
4659                         return -EFAULT;
4660                 ofs = HDSP_9652_rmsBase + j * 8;
4661                 if (copy_u48_le(&peak_rms->input_rms[i], hdsp->iobase + ofs,
4662                                 hdsp->iobase + ofs + 4))
4663                         return -EFAULT;
4664                 ofs += channels * 8;
4665                 if (copy_u48_le(&peak_rms->playback_rms[i], hdsp->iobase + ofs,
4666                                 hdsp->iobase + ofs + 4))
4667                         return -EFAULT;
4668                 ofs += channels * 8;
4669                 if (copy_u48_le(&peak_rms->output_rms[i], hdsp->iobase + ofs,
4670                                 hdsp->iobase + ofs + 4))
4671                         return -EFAULT;
4672                 j++;
4673         }
4674         return 0;
4675 }
4676
4677 static int hdsp_9632_get_peak(struct hdsp *hdsp, struct hdsp_peak_rms __user *peak_rms)
4678 {
4679         int i, j;
4680         struct hdsp_9632_meters __iomem *m;
4681         int doublespeed = 0;
4682
4683         if (hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DoubleSpeedStatus)
4684                 doublespeed = 1;
4685         m = (struct hdsp_9632_meters __iomem *)(hdsp->iobase+HDSP_9632_metersBase);
4686         for (i = 0, j = 0; i < 16; ++i, ++j) {
4687                 if (copy_u32_le(&peak_rms->input_peaks[i], &m->input_peak[j]))
4688                         return -EFAULT;
4689                 if (copy_u32_le(&peak_rms->playback_peaks[i], &m->playback_peak[j]))
4690                         return -EFAULT;
4691                 if (copy_u32_le(&peak_rms->output_peaks[i], &m->output_peak[j]))
4692                         return -EFAULT;
4693                 if (copy_u64_le(&peak_rms->input_rms[i], &m->input_rms_low[j],
4694                                 &m->input_rms_high[j]))
4695                         return -EFAULT;
4696                 if (copy_u64_le(&peak_rms->playback_rms[i], &m->playback_rms_low[j],
4697                                 &m->playback_rms_high[j]))
4698                         return -EFAULT;
4699                 if (copy_u64_le(&peak_rms->output_rms[i], &m->output_rms_low[j],
4700                                 &m->output_rms_high[j]))
4701                         return -EFAULT;
4702                 if (doublespeed && i == 3) i += 4;
4703         }
4704         return 0;
4705 }
4706
4707 static int hdsp_get_peak(struct hdsp *hdsp, struct hdsp_peak_rms __user *peak_rms)
4708 {
4709         int i;
4710
4711         for (i = 0; i < 26; i++) {
4712                 if (copy_u32_le(&peak_rms->playback_peaks[i],
4713                                 hdsp->iobase + HDSP_playbackPeakLevel + i * 4))
4714                         return -EFAULT;
4715                 if (copy_u32_le(&peak_rms->input_peaks[i],
4716                                 hdsp->iobase + HDSP_inputPeakLevel + i * 4))
4717                         return -EFAULT;
4718         }
4719         for (i = 0; i < 28; i++) {
4720                 if (copy_u32_le(&peak_rms->output_peaks[i],
4721                                 hdsp->iobase + HDSP_outputPeakLevel + i * 4))
4722                         return -EFAULT;
4723         }
4724         for (i = 0; i < 26; ++i) {
4725                 if (copy_u64_le(&peak_rms->playback_rms[i],
4726                                 hdsp->iobase + HDSP_playbackRmsLevel + i * 8 + 4,
4727                                 hdsp->iobase + HDSP_playbackRmsLevel + i * 8))
4728                         return -EFAULT;
4729                 if (copy_u64_le(&peak_rms->input_rms[i],
4730                                 hdsp->iobase + HDSP_inputRmsLevel + i * 8 + 4,
4731                                 hdsp->iobase + HDSP_inputRmsLevel + i * 8))
4732                         return -EFAULT;
4733         }
4734         return 0;
4735 }
4736
4737 static int snd_hdsp_hwdep_ioctl(struct snd_hwdep *hw, struct file *file, unsigned int cmd, unsigned long arg)
4738 {
4739         struct hdsp *hdsp = hw->private_data;
4740         void __user *argp = (void __user *)arg;
4741         int err;
4742
4743         switch (cmd) {
4744         case SNDRV_HDSP_IOCTL_GET_PEAK_RMS: {
4745                 struct hdsp_peak_rms __user *peak_rms = (struct hdsp_peak_rms __user *)arg;
4746
4747                 err = hdsp_check_for_iobox(hdsp);
4748                 if (err < 0)
4749                         return err;
4750
4751                 err = hdsp_check_for_firmware(hdsp, 1);
4752                 if (err < 0)
4753                         return err;
4754
4755                 if (!(hdsp->state & HDSP_FirmwareLoaded)) {
4756                         snd_printk(KERN_ERR "Hammerfall-DSP: firmware needs to be uploaded to the card.\n");
4757                         return -EINVAL;
4758                 }
4759
4760                 switch (hdsp->io_type) {
4761                 case H9652:
4762                         return hdsp_9652_get_peak(hdsp, peak_rms);
4763                 case H9632:
4764                         return hdsp_9632_get_peak(hdsp, peak_rms);
4765                 default:
4766                         return hdsp_get_peak(hdsp, peak_rms);
4767                 }
4768         }
4769         case SNDRV_HDSP_IOCTL_GET_CONFIG_INFO: {
4770                 struct hdsp_config_info info;
4771                 unsigned long flags;
4772                 int i;
4773
4774                 err = hdsp_check_for_iobox(hdsp);
4775                 if (err < 0)
4776                         return err;
4777
4778                 err = hdsp_check_for_firmware(hdsp, 1);
4779                 if (err < 0)
4780                         return err;
4781
4782                 memset(&info, 0, sizeof(info));
4783                 spin_lock_irqsave(&hdsp->lock, flags);
4784                 info.pref_sync_ref = (unsigned char)hdsp_pref_sync_ref(hdsp);
4785                 info.wordclock_sync_check = (unsigned char)hdsp_wc_sync_check(hdsp);
4786                 if (hdsp->io_type != H9632)
4787                     info.adatsync_sync_check = (unsigned char)hdsp_adatsync_sync_check(hdsp);
4788                 info.spdif_sync_check = (unsigned char)hdsp_spdif_sync_check(hdsp);
4789                 for (i = 0; i < ((hdsp->io_type != Multiface && hdsp->io_type != RPM && hdsp->io_type != H9632) ? 3 : 1); ++i)
4790                         info.adat_sync_check[i] = (unsigned char)hdsp_adat_sync_check(hdsp, i);
4791                 info.spdif_in = (unsigned char)hdsp_spdif_in(hdsp);
4792                 info.spdif_out = (unsigned char)hdsp_toggle_setting(hdsp,
4793                                 HDSP_SPDIFOpticalOut);
4794                 info.spdif_professional = (unsigned char)
4795                         hdsp_toggle_setting(hdsp, HDSP_SPDIFProfessional);
4796                 info.spdif_emphasis = (unsigned char)
4797                         hdsp_toggle_setting(hdsp, HDSP_SPDIFEmphasis);
4798                 info.spdif_nonaudio = (unsigned char)
4799                         hdsp_toggle_setting(hdsp, HDSP_SPDIFNonAudio);
4800                 info.spdif_sample_rate = hdsp_spdif_sample_rate(hdsp);
4801                 info.system_sample_rate = hdsp->system_sample_rate;
4802                 info.autosync_sample_rate = hdsp_external_sample_rate(hdsp);
4803                 info.system_clock_mode = (unsigned char)hdsp_system_clock_mode(hdsp);
4804                 info.clock_source = (unsigned char)hdsp_clock_source(hdsp);
4805                 info.autosync_ref = (unsigned char)hdsp_autosync_ref(hdsp);
4806                 info.line_out = (unsigned char)
4807                         hdsp_toggle_setting(hdsp, HDSP_LineOut);
4808                 if (hdsp->io_type == H9632) {
4809                         info.da_gain = (unsigned char)hdsp_da_gain(hdsp);
4810                         info.ad_gain = (unsigned char)hdsp_ad_gain(hdsp);
4811                         info.phone_gain = (unsigned char)hdsp_phone_gain(hdsp);
4812                         info.xlr_breakout_cable =
4813                                 (unsigned char)hdsp_toggle_setting(hdsp,
4814                                         HDSP_XLRBreakoutCable);
4815
4816                 } else if (hdsp->io_type == RPM) {
4817                         info.da_gain = (unsigned char) hdsp_rpm_input12(hdsp);
4818                         info.ad_gain = (unsigned char) hdsp_rpm_input34(hdsp);
4819                 }
4820                 if (hdsp->io_type == H9632 || hdsp->io_type == H9652)
4821                         info.analog_extension_board =
4822                                 (unsigned char)hdsp_toggle_setting(hdsp,
4823                                             HDSP_AnalogExtensionBoard);
4824                 spin_unlock_irqrestore(&hdsp->lock, flags);
4825                 if (copy_to_user(argp, &info, sizeof(info)))
4826                         return -EFAULT;
4827                 break;
4828         }
4829         case SNDRV_HDSP_IOCTL_GET_9632_AEB: {
4830                 struct hdsp_9632_aeb h9632_aeb;
4831
4832                 if (hdsp->io_type != H9632) return -EINVAL;
4833                 h9632_aeb.aebi = hdsp->ss_in_channels - H9632_SS_CHANNELS;
4834                 h9632_aeb.aebo = hdsp->ss_out_channels - H9632_SS_CHANNELS;
4835                 if (copy_to_user(argp, &h9632_aeb, sizeof(h9632_aeb)))
4836                         return -EFAULT;
4837                 break;
4838         }
4839         case SNDRV_HDSP_IOCTL_GET_VERSION: {
4840                 struct hdsp_version hdsp_version;
4841                 int err;
4842
4843                 if (hdsp->io_type == H9652 || hdsp->io_type == H9632) return -EINVAL;
4844                 if (hdsp->io_type == Undefined) {
4845                         if ((err = hdsp_get_iobox_version(hdsp)) < 0)
4846                                 return err;
4847                 }
4848                 memset(&hdsp_version, 0, sizeof(hdsp_version));
4849                 hdsp_version.io_type = hdsp->io_type;
4850                 hdsp_version.firmware_rev = hdsp->firmware_rev;
4851                 if ((err = copy_to_user(argp, &hdsp_version, sizeof(hdsp_version))))
4852                         return -EFAULT;
4853                 break;
4854         }
4855         case SNDRV_HDSP_IOCTL_UPLOAD_FIRMWARE: {
4856                 struct hdsp_firmware __user *firmware;
4857                 u32 __user *firmware_data;
4858                 int err;
4859
4860                 if (hdsp->io_type == H9652 || hdsp->io_type == H9632) return -EINVAL;
4861                 /* SNDRV_HDSP_IOCTL_GET_VERSION must have been called */
4862                 if (hdsp->io_type == Undefined) return -EINVAL;
4863
4864                 if (hdsp->state & (HDSP_FirmwareCached | HDSP_FirmwareLoaded))
4865                         return -EBUSY;
4866
4867                 snd_printk(KERN_INFO "Hammerfall-DSP: initializing firmware upload\n");
4868                 firmware = (struct hdsp_firmware __user *)argp;
4869
4870                 if (get_user(firmware_data, &firmware->firmware_data))
4871                         return -EFAULT;
4872
4873                 if (hdsp_check_for_iobox (hdsp))
4874                         return -EIO;
4875
4876                 if (!hdsp->fw_uploaded) {
4877                         hdsp->fw_uploaded = vmalloc(HDSP_FIRMWARE_SIZE);
4878                         if (!hdsp->fw_uploaded)
4879                                 return -ENOMEM;
4880                 }
4881
4882                 if (copy_from_user(hdsp->fw_uploaded, firmware_data,
4883                                    HDSP_FIRMWARE_SIZE)) {
4884                         vfree(hdsp->fw_uploaded);
4885                         hdsp->fw_uploaded = NULL;
4886                         return -EFAULT;
4887                 }
4888
4889                 hdsp->state |= HDSP_FirmwareCached;
4890
4891                 if ((err = snd_hdsp_load_firmware_from_cache(hdsp)) < 0)
4892                         return err;
4893
4894                 if (!(hdsp->state & HDSP_InitializationComplete)) {
4895                         if ((err = snd_hdsp_enable_io(hdsp)) < 0)
4896                                 return err;
4897
4898                         snd_hdsp_initialize_channels(hdsp);
4899                         snd_hdsp_initialize_midi_flush(hdsp);
4900
4901                         if ((err = snd_hdsp_create_alsa_devices(hdsp->card, hdsp)) < 0) {
4902                                 snd_printk(KERN_ERR "Hammerfall-DSP: error creating alsa devices\n");
4903                                 return err;
4904                         }
4905                 }
4906                 break;
4907         }
4908         case SNDRV_HDSP_IOCTL_GET_MIXER: {
4909                 struct hdsp_mixer __user *mixer = (struct hdsp_mixer __user *)argp;
4910                 if (copy_to_user(mixer->matrix, hdsp->mixer_matrix, sizeof(unsigned short)*HDSP_MATRIX_MIXER_SIZE))
4911                         return -EFAULT;
4912                 break;
4913         }
4914         default:
4915                 return -EINVAL;
4916         }
4917         return 0;
4918 }
4919
4920 static struct snd_pcm_ops snd_hdsp_playback_ops = {
4921         .open =         snd_hdsp_playback_open,
4922         .close =        snd_hdsp_playback_release,
4923         .ioctl =        snd_hdsp_ioctl,
4924         .hw_params =    snd_hdsp_hw_params,
4925         .prepare =      snd_hdsp_prepare,
4926         .trigger =      snd_hdsp_trigger,
4927         .pointer =      snd_hdsp_hw_pointer,
4928         .copy =         snd_hdsp_playback_copy,
4929         .silence =      snd_hdsp_hw_silence,
4930 };
4931
4932 static struct snd_pcm_ops snd_hdsp_capture_ops = {
4933         .open =         snd_hdsp_capture_open,
4934         .close =        snd_hdsp_capture_release,
4935         .ioctl =        snd_hdsp_ioctl,
4936         .hw_params =    snd_hdsp_hw_params,
4937         .prepare =      snd_hdsp_prepare,
4938         .trigger =      snd_hdsp_trigger,
4939         .pointer =      snd_hdsp_hw_pointer,
4940         .copy =         snd_hdsp_capture_copy,
4941 };
4942
4943 static int snd_hdsp_create_hwdep(struct snd_card *card, struct hdsp *hdsp)
4944 {
4945         struct snd_hwdep *hw;
4946         int err;
4947
4948         if ((err = snd_hwdep_new(card, "HDSP hwdep", 0, &hw)) < 0)
4949                 return err;
4950
4951         hdsp->hwdep = hw;
4952         hw->private_data = hdsp;
4953         strcpy(hw->name, "HDSP hwdep interface");
4954
4955         hw->ops.ioctl = snd_hdsp_hwdep_ioctl;
4956         hw->ops.ioctl_compat = snd_hdsp_hwdep_ioctl;
4957
4958         return 0;
4959 }
4960
4961 static int snd_hdsp_create_pcm(struct snd_card *card, struct hdsp *hdsp)
4962 {
4963         struct snd_pcm *pcm;
4964         int err;
4965
4966         if ((err = snd_pcm_new(card, hdsp->card_name, 0, 1, 1, &pcm)) < 0)
4967                 return err;
4968
4969         hdsp->pcm = pcm;
4970         pcm->private_data = hdsp;
4971         strcpy(pcm->name, hdsp->card_name);
4972
4973         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_hdsp_playback_ops);
4974         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_hdsp_capture_ops);
4975
4976         pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
4977
4978         return 0;
4979 }
4980
4981 static void snd_hdsp_9652_enable_mixer (struct hdsp *hdsp)
4982 {
4983         hdsp->control2_register |= HDSP_9652_ENABLE_MIXER;
4984         hdsp_write (hdsp, HDSP_control2Reg, hdsp->control2_register);
4985 }
4986
4987 static int snd_hdsp_enable_io (struct hdsp *hdsp)
4988 {
4989         int i;
4990
4991         if (hdsp_fifo_wait (hdsp, 0, 100)) {
4992                 snd_printk(KERN_ERR "Hammerfall-DSP: enable_io fifo_wait failed\n");
4993                 return -EIO;
4994         }
4995
4996         for (i = 0; i < hdsp->max_channels; ++i) {
4997                 hdsp_write (hdsp, HDSP_inputEnable + (4 * i), 1);
4998                 hdsp_write (hdsp, HDSP_outputEnable + (4 * i), 1);
4999         }
5000
5001         return 0;
5002 }
5003
5004 static void snd_hdsp_initialize_channels(struct hdsp *hdsp)
5005 {
5006         int status, aebi_channels, aebo_channels;
5007
5008         switch (hdsp->io_type) {
5009         case Digiface:
5010                 hdsp->card_name = "RME Hammerfall DSP + Digiface";
5011                 hdsp->ss_in_channels = hdsp->ss_out_channels = DIGIFACE_SS_CHANNELS;
5012                 hdsp->ds_in_channels = hdsp->ds_out_channels = DIGIFACE_DS_CHANNELS;
5013                 break;
5014
5015         case H9652:
5016                 hdsp->card_name = "RME Hammerfall HDSP 9652";
5017                 hdsp->ss_in_channels = hdsp->ss_out_channels = H9652_SS_CHANNELS;
5018                 hdsp->ds_in_channels = hdsp->ds_out_channels = H9652_DS_CHANNELS;
5019                 break;
5020
5021         case H9632:
5022                 status = hdsp_read(hdsp, HDSP_statusRegister);
5023                 /* HDSP_AEBx bits are low when AEB are connected */
5024                 aebi_channels = (status & HDSP_AEBI) ? 0 : 4;
5025                 aebo_channels = (status & HDSP_AEBO) ? 0 : 4;
5026                 hdsp->card_name = "RME Hammerfall HDSP 9632";
5027                 hdsp->ss_in_channels = H9632_SS_CHANNELS+aebi_channels;
5028                 hdsp->ds_in_channels = H9632_DS_CHANNELS+aebi_channels;
5029                 hdsp->qs_in_channels = H9632_QS_CHANNELS+aebi_channels;
5030                 hdsp->ss_out_channels = H9632_SS_CHANNELS+aebo_channels;
5031                 hdsp->ds_out_channels = H9632_DS_CHANNELS+aebo_channels;
5032                 hdsp->qs_out_channels = H9632_QS_CHANNELS+aebo_channels;
5033                 break;
5034
5035         case Multiface:
5036                 hdsp->card_name = "RME Hammerfall DSP + Multiface";
5037                 hdsp->ss_in_channels = hdsp->ss_out_channels = MULTIFACE_SS_CHANNELS;
5038                 hdsp->ds_in_channels = hdsp->ds_out_channels = MULTIFACE_DS_CHANNELS;
5039                 break;
5040
5041         case RPM:
5042                 hdsp->card_name = "RME Hammerfall DSP + RPM";
5043                 hdsp->ss_in_channels = RPM_CHANNELS-1;
5044                 hdsp->ss_out_channels = RPM_CHANNELS;
5045                 hdsp->ds_in_channels = RPM_CHANNELS-1;
5046                 hdsp->ds_out_channels = RPM_CHANNELS;
5047                 break;
5048
5049         default:
5050                 /* should never get here */
5051                 break;
5052         }
5053 }
5054
5055 static void snd_hdsp_initialize_midi_flush (struct hdsp *hdsp)
5056 {
5057         snd_hdsp_flush_midi_input (hdsp, 0);
5058         snd_hdsp_flush_midi_input (hdsp, 1);
5059 }
5060
5061 static int snd_hdsp_create_alsa_devices(struct snd_card *card, struct hdsp *hdsp)
5062 {
5063         int err;
5064
5065         if ((err = snd_hdsp_create_pcm(card, hdsp)) < 0) {
5066                 snd_printk(KERN_ERR "Hammerfall-DSP: Error creating pcm interface\n");
5067                 return err;
5068         }
5069
5070
5071         if ((err = snd_hdsp_create_midi(card, hdsp, 0)) < 0) {
5072                 snd_printk(KERN_ERR "Hammerfall-DSP: Error creating first midi interface\n");
5073                 return err;
5074         }
5075
5076         if (hdsp->io_type == Digiface || hdsp->io_type == H9652) {
5077                 if ((err = snd_hdsp_create_midi(card, hdsp, 1)) < 0) {
5078                         snd_printk(KERN_ERR "Hammerfall-DSP: Error creating second midi interface\n");
5079                         return err;
5080                 }
5081         }
5082
5083         if ((err = snd_hdsp_create_controls(card, hdsp)) < 0) {
5084                 snd_printk(KERN_ERR "Hammerfall-DSP: Error creating ctl interface\n");
5085                 return err;
5086         }
5087
5088         snd_hdsp_proc_init(hdsp);
5089
5090         hdsp->system_sample_rate = -1;
5091         hdsp->playback_pid = -1;
5092         hdsp->capture_pid = -1;
5093         hdsp->capture_substream = NULL;
5094         hdsp->playback_substream = NULL;
5095
5096         if ((err = snd_hdsp_set_defaults(hdsp)) < 0) {
5097                 snd_printk(KERN_ERR "Hammerfall-DSP: Error setting default values\n");
5098                 return err;
5099         }
5100
5101         if (!(hdsp->state & HDSP_InitializationComplete)) {
5102                 strcpy(card->shortname, "Hammerfall DSP");
5103                 sprintf(card->longname, "%s at 0x%lx, irq %d", hdsp->card_name,
5104                         hdsp->port, hdsp->irq);
5105
5106                 if ((err = snd_card_register(card)) < 0) {
5107                         snd_printk(KERN_ERR "Hammerfall-DSP: error registering card\n");
5108                         return err;
5109                 }
5110                 hdsp->state |= HDSP_InitializationComplete;
5111         }
5112
5113         return 0;
5114 }
5115
5116 /* load firmware via hotplug fw loader */
5117 static int hdsp_request_fw_loader(struct hdsp *hdsp)
5118 {
5119         const char *fwfile;
5120         const struct firmware *fw;
5121         int err;
5122
5123         if (hdsp->io_type == H9652 || hdsp->io_type == H9632)
5124                 return 0;
5125         if (hdsp->io_type == Undefined) {
5126                 if ((err = hdsp_get_iobox_version(hdsp)) < 0)
5127                         return err;
5128                 if (hdsp->io_type == H9652 || hdsp->io_type == H9632)
5129                         return 0;
5130         }
5131
5132         /* caution: max length of firmware filename is 30! */
5133         switch (hdsp->io_type) {
5134         case RPM:
5135                 fwfile = "rpm_firmware.bin";
5136                 break;
5137         case Multiface:
5138                 if (hdsp->firmware_rev == 0xa)
5139                         fwfile = "multiface_firmware.bin";
5140                 else
5141                         fwfile = "multiface_firmware_rev11.bin";
5142                 break;
5143         case Digiface:
5144                 if (hdsp->firmware_rev == 0xa)
5145                         fwfile = "digiface_firmware.bin";
5146                 else
5147                         fwfile = "digiface_firmware_rev11.bin";
5148                 break;
5149         default:
5150                 snd_printk(KERN_ERR "Hammerfall-DSP: invalid io_type %d\n", hdsp->io_type);
5151                 return -EINVAL;
5152         }
5153
5154         if (request_firmware(&fw, fwfile, &hdsp->pci->dev)) {
5155                 snd_printk(KERN_ERR "Hammerfall-DSP: cannot load firmware %s\n", fwfile);
5156                 return -ENOENT;
5157         }
5158         if (fw->size < HDSP_FIRMWARE_SIZE) {
5159                 snd_printk(KERN_ERR "Hammerfall-DSP: too short firmware size %d (expected %d)\n",
5160                            (int)fw->size, HDSP_FIRMWARE_SIZE);
5161                 return -EINVAL;
5162         }
5163
5164         hdsp->firmware = fw;
5165
5166         hdsp->state |= HDSP_FirmwareCached;
5167
5168         if ((err = snd_hdsp_load_firmware_from_cache(hdsp)) < 0)
5169                 return err;
5170
5171         if (!(hdsp->state & HDSP_InitializationComplete)) {
5172                 if ((err = snd_hdsp_enable_io(hdsp)) < 0)
5173                         return err;
5174
5175                 if ((err = snd_hdsp_create_hwdep(hdsp->card, hdsp)) < 0) {
5176                         snd_printk(KERN_ERR "Hammerfall-DSP: error creating hwdep device\n");
5177                         return err;
5178                 }
5179                 snd_hdsp_initialize_channels(hdsp);
5180                 snd_hdsp_initialize_midi_flush(hdsp);
5181                 if ((err = snd_hdsp_create_alsa_devices(hdsp->card, hdsp)) < 0) {
5182                         snd_printk(KERN_ERR "Hammerfall-DSP: error creating alsa devices\n");
5183                         return err;
5184                 }
5185         }
5186         return 0;
5187 }
5188
5189 static int snd_hdsp_create(struct snd_card *card,
5190                            struct hdsp *hdsp)
5191 {
5192         struct pci_dev *pci = hdsp->pci;
5193         int err;
5194         int is_9652 = 0;
5195         int is_9632 = 0;
5196
5197         hdsp->irq = -1;
5198         hdsp->state = 0;
5199         hdsp->midi[0].rmidi = NULL;
5200         hdsp->midi[1].rmidi = NULL;
5201         hdsp->midi[0].input = NULL;
5202         hdsp->midi[1].input = NULL;
5203         hdsp->midi[0].output = NULL;
5204         hdsp->midi[1].output = NULL;
5205         hdsp->midi[0].pending = 0;
5206         hdsp->midi[1].pending = 0;
5207         spin_lock_init(&hdsp->midi[0].lock);
5208         spin_lock_init(&hdsp->midi[1].lock);
5209         hdsp->iobase = NULL;
5210         hdsp->control_register = 0;
5211         hdsp->control2_register = 0;
5212         hdsp->io_type = Undefined;
5213         hdsp->max_channels = 26;
5214
5215         hdsp->card = card;
5216
5217         spin_lock_init(&hdsp->lock);
5218
5219         tasklet_init(&hdsp->midi_tasklet, hdsp_midi_tasklet, (unsigned long)hdsp);
5220
5221         pci_read_config_word(hdsp->pci, PCI_CLASS_REVISION, &hdsp->firmware_rev);
5222         hdsp->firmware_rev &= 0xff;
5223
5224         /* From Martin Bjoernsen :
5225             "It is important that the card's latency timer register in
5226             the PCI configuration space is set to a value much larger
5227             than 0 by the computer's BIOS or the driver.
5228             The windows driver always sets this 8 bit register [...]
5229             to its maximum 255 to avoid problems with some computers."
5230         */
5231         pci_write_config_byte(hdsp->pci, PCI_LATENCY_TIMER, 0xFF);
5232
5233         strcpy(card->driver, "H-DSP");
5234         strcpy(card->mixername, "Xilinx FPGA");
5235
5236         if (hdsp->firmware_rev < 0xa)
5237                 return -ENODEV;
5238         else if (hdsp->firmware_rev < 0x64)
5239                 hdsp->card_name = "RME Hammerfall DSP";
5240         else if (hdsp->firmware_rev < 0x96) {
5241                 hdsp->card_name = "RME HDSP 9652";
5242                 is_9652 = 1;
5243         } else {
5244                 hdsp->card_name = "RME HDSP 9632";
5245                 hdsp->max_channels = 16;
5246                 is_9632 = 1;
5247         }
5248
5249         if ((err = pci_enable_device(pci)) < 0)
5250                 return err;
5251
5252         pci_set_master(hdsp->pci);
5253
5254         if ((err = pci_request_regions(pci, "hdsp")) < 0)
5255                 return err;
5256         hdsp->port = pci_resource_start(pci, 0);
5257         if ((hdsp->iobase = ioremap_nocache(hdsp->port, HDSP_IO_EXTENT)) == NULL) {
5258                 snd_printk(KERN_ERR "Hammerfall-DSP: unable to remap region 0x%lx-0x%lx\n", hdsp->port, hdsp->port + HDSP_IO_EXTENT - 1);
5259                 return -EBUSY;
5260         }
5261
5262         if (request_irq(pci->irq, snd_hdsp_interrupt, IRQF_SHARED,
5263                         KBUILD_MODNAME, hdsp)) {
5264                 snd_printk(KERN_ERR "Hammerfall-DSP: unable to use IRQ %d\n", pci->irq);
5265                 return -EBUSY;
5266         }
5267
5268         hdsp->irq = pci->irq;
5269         hdsp->precise_ptr = 0;
5270         hdsp->use_midi_tasklet = 1;
5271         hdsp->dds_value = 0;
5272
5273         if ((err = snd_hdsp_initialize_memory(hdsp)) < 0)
5274                 return err;
5275
5276         if (!is_9652 && !is_9632) {
5277                 /* we wait a maximum of 10 seconds to let freshly
5278                  * inserted cardbus cards do their hardware init */
5279                 err = hdsp_wait_for_iobox(hdsp, 1000, 10);
5280
5281                 if (err < 0)
5282                         return err;
5283
5284                 if ((hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DllError) != 0) {
5285                         if ((err = hdsp_request_fw_loader(hdsp)) < 0)
5286                                 /* we don't fail as this can happen
5287                                    if userspace is not ready for
5288                                    firmware upload
5289                                 */
5290                                 snd_printk(KERN_ERR "Hammerfall-DSP: couldn't get firmware from userspace. try using hdsploader\n");
5291                         else
5292                                 /* init is complete, we return */
5293                                 return 0;
5294                         /* we defer initialization */
5295                         snd_printk(KERN_INFO "Hammerfall-DSP: card initialization pending : waiting for firmware\n");
5296                         if ((err = snd_hdsp_create_hwdep(card, hdsp)) < 0)
5297                                 return err;
5298                         return 0;
5299                 } else {
5300                         snd_printk(KERN_INFO "Hammerfall-DSP: Firmware already present, initializing card.\n");
5301                         if (hdsp_read(hdsp, HDSP_status2Register) & HDSP_version2)
5302                                 hdsp->io_type = RPM;
5303                         else if (hdsp_read(hdsp, HDSP_status2Register) & HDSP_version1)
5304                                 hdsp->io_type = Multiface;
5305                         else
5306                                 hdsp->io_type = Digiface;
5307                 }
5308         }
5309
5310         if ((err = snd_hdsp_enable_io(hdsp)) != 0)
5311                 return err;
5312
5313         if (is_9652)
5314                 hdsp->io_type = H9652;
5315
5316         if (is_9632)
5317                 hdsp->io_type = H9632;
5318
5319         if ((err = snd_hdsp_create_hwdep(card, hdsp)) < 0)
5320                 return err;
5321
5322         snd_hdsp_initialize_channels(hdsp);
5323         snd_hdsp_initialize_midi_flush(hdsp);
5324
5325         hdsp->state |= HDSP_FirmwareLoaded;
5326
5327         if ((err = snd_hdsp_create_alsa_devices(card, hdsp)) < 0)
5328                 return err;
5329
5330         return 0;
5331 }
5332
5333 static int snd_hdsp_free(struct hdsp *hdsp)
5334 {
5335         if (hdsp->port) {
5336                 /* stop the audio, and cancel all interrupts */
5337                 tasklet_kill(&hdsp->midi_tasklet);
5338                 hdsp->control_register &= ~(HDSP_Start|HDSP_AudioInterruptEnable|HDSP_Midi0InterruptEnable|HDSP_Midi1InterruptEnable);
5339                 hdsp_write (hdsp, HDSP_controlRegister, hdsp->control_register);
5340         }
5341
5342         if (hdsp->irq >= 0)
5343                 free_irq(hdsp->irq, (void *)hdsp);
5344
5345         snd_hdsp_free_buffers(hdsp);
5346
5347         if (hdsp->firmware)
5348                 release_firmware(hdsp->firmware);
5349         vfree(hdsp->fw_uploaded);
5350
5351         if (hdsp->iobase)
5352                 iounmap(hdsp->iobase);
5353
5354         if (hdsp->port)
5355                 pci_release_regions(hdsp->pci);
5356
5357         pci_disable_device(hdsp->pci);
5358         return 0;
5359 }
5360
5361 static void snd_hdsp_card_free(struct snd_card *card)
5362 {
5363         struct hdsp *hdsp = card->private_data;
5364
5365         if (hdsp)
5366                 snd_hdsp_free(hdsp);
5367 }
5368
5369 static int snd_hdsp_probe(struct pci_dev *pci,
5370                           const struct pci_device_id *pci_id)
5371 {
5372         static int dev;
5373         struct hdsp *hdsp;
5374         struct snd_card *card;
5375         int err;
5376
5377         if (dev >= SNDRV_CARDS)
5378                 return -ENODEV;
5379         if (!enable[dev]) {
5380                 dev++;
5381                 return -ENOENT;
5382         }
5383
5384         err = snd_card_create(index[dev], id[dev], THIS_MODULE,
5385                               sizeof(struct hdsp), &card);
5386         if (err < 0)
5387                 return err;
5388
5389         hdsp = card->private_data;
5390         card->private_free = snd_hdsp_card_free;
5391         hdsp->dev = dev;
5392         hdsp->pci = pci;
5393         snd_card_set_dev(card, &pci->dev);
5394
5395         if ((err = snd_hdsp_create(card, hdsp)) < 0) {
5396                 snd_card_free(card);
5397                 return err;
5398         }
5399
5400         strcpy(card->shortname, "Hammerfall DSP");
5401         sprintf(card->longname, "%s at 0x%lx, irq %d", hdsp->card_name,
5402                 hdsp->port, hdsp->irq);
5403
5404         if ((err = snd_card_register(card)) < 0) {
5405                 snd_card_free(card);
5406                 return err;
5407         }
5408         pci_set_drvdata(pci, card);
5409         dev++;
5410         return 0;
5411 }
5412
5413 static void snd_hdsp_remove(struct pci_dev *pci)
5414 {
5415         snd_card_free(pci_get_drvdata(pci));
5416 }
5417
5418 static struct pci_driver hdsp_driver = {
5419         .name =     KBUILD_MODNAME,
5420         .id_table = snd_hdsp_ids,
5421         .probe =    snd_hdsp_probe,
5422         .remove = snd_hdsp_remove,
5423 };
5424
5425 module_pci_driver(hdsp_driver);