1 /* Copyright (c) 2014, The Linux Foundation. All rights reserved.
3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and
5 * only version 2 as published by the Free Software Foundation.
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
12 #ifndef MSM8X16_WCD_REGISTERS_H
13 #define MSM8X16_WCD_REGISTERS_H
15 #define MSM8X16_WCD_A_DIGITAL_REVISION1 (0x000)
16 #define MSM8X16_WCD_A_DIGITAL_REVISION1__POR (0x00)
17 #define MSM8X16_WCD_A_DIGITAL_REVISION2 (0x001)
18 #define MSM8X16_WCD_A_DIGITAL_REVISION2__POR (0x00)
19 #define MSM8X16_WCD_A_DIGITAL_PERPH_TYPE (0x004)
20 #define MSM8X16_WCD_A_DIGITAL_PERPH_TYPE__POR (0x23)
21 #define MSM8X16_WCD_A_DIGITAL_PERPH_SUBTYPE (0x005)
22 #define MSM8X16_WCD_A_DIGITAL_PERPH_SUBTYPE__POR (0x01)
23 #define MSM8X16_WCD_A_DIGITAL_INT_RT_STS (0x010)
24 #define MSM8X16_WCD_A_DIGITAL_INT_RT_STS__POR (0x00)
25 #define MSM8X16_WCD_A_DIGITAL_INT_SET_TYPE (0x011)
26 #define MSM8X16_WCD_A_DIGITAL_INT_SET_TYPE__POR (0xFF)
27 #define MSM8X16_WCD_A_DIGITAL_INT_POLARITY_HIGH (0x012)
28 #define MSM8X16_WCD_A_DIGITAL_INT_POLARITY_HIGH__POR (0xFF)
29 #define MSM8X16_WCD_A_DIGITAL_INT_POLARITY_LOW (0x013)
30 #define MSM8X16_WCD_A_DIGITAL_INT_POLARITY_LOW__POR (0x00)
31 #define MSM8X16_WCD_A_DIGITAL_INT_LATCHED_CLR (0x014)
32 #define MSM8X16_WCD_A_DIGITAL_INT_LATCHED_CLR__POR (0x00)
33 #define MSM8X16_WCD_A_DIGITAL_INT_EN_SET (0x015)
34 #define MSM8X16_WCD_A_DIGITAL_INT_EN_SET__POR (0x00)
35 #define MSM8X16_WCD_A_DIGITAL_INT_EN_CLR (0x016)
36 #define MSM8X16_WCD_A_DIGITAL_INT_EN_CLR__POR (0x00)
37 #define MSM8X16_WCD_A_DIGITAL_INT_LATCHED_STS (0x018)
38 #define MSM8X16_WCD_A_DIGITAL_INT_LATCHED_STS__POR (0x00)
39 #define MSM8X16_WCD_A_DIGITAL_INT_PENDING_STS (0x019)
40 #define MSM8X16_WCD_A_DIGITAL_INT_PENDING_STS__POR (0x00)
41 #define MSM8X16_WCD_A_DIGITAL_INT_MID_SEL (0x01A)
42 #define MSM8X16_WCD_A_DIGITAL_INT_MID_SEL__POR (0x00)
43 #define MSM8X16_WCD_A_DIGITAL_INT_PRIORITY (0x01B)
44 #define MSM8X16_WCD_A_DIGITAL_INT_PRIORITY__POR (0x00)
45 #define MSM8X16_WCD_A_DIGITAL_GPIO_MODE (0x040)
46 #define MSM8X16_WCD_A_DIGITAL_GPIO_MODE__POR (0x00)
47 #define MSM8X16_WCD_A_DIGITAL_PIN_CTL_OE (0x041)
48 #define MSM8X16_WCD_A_DIGITAL_PIN_CTL_OE__POR (0x01)
49 #define MSM8X16_WCD_A_DIGITAL_PIN_CTL_DATA (0x042)
50 #define MSM8X16_WCD_A_DIGITAL_PIN_CTL_DATA__POR (0x00)
51 #define MSM8X16_WCD_A_DIGITAL_PIN_STATUS (0x043)
52 #define MSM8X16_WCD_A_DIGITAL_PIN_STATUS__POR (0x00)
53 #define MSM8X16_WCD_A_DIGITAL_HDRIVE_CTL (0x044)
54 #define MSM8X16_WCD_A_DIGITAL_HDRIVE_CTL__POR (0x00)
55 #define MSM8X16_WCD_A_DIGITAL_CDC_RST_CTL (0x046)
56 #define MSM8X16_WCD_A_DIGITAL_CDC_RST_CTL__POR (0x00)
57 #define MSM8X16_WCD_A_DIGITAL_CDC_TOP_CLK_CTL (0x048)
58 #define MSM8X16_WCD_A_DIGITAL_CDC_TOP_CLK_CTL__POR (0x00)
59 #define MSM8X16_WCD_A_DIGITAL_CDC_ANA_CLK_CTL (0x049)
60 #define MSM8X16_WCD_A_DIGITAL_CDC_ANA_CLK_CTL__POR (0x00)
61 #define MSM8X16_WCD_A_DIGITAL_CDC_DIG_CLK_CTL (0x04A)
62 #define MSM8X16_WCD_A_DIGITAL_CDC_DIG_CLK_CTL__POR (0x00)
63 #define MSM8X16_WCD_A_DIGITAL_CDC_CONN_TX1_CTL (0x050)
64 #define MSM8X16_WCD_A_DIGITAL_CDC_CONN_TX1_CTL__POR (0x02)
65 #define MSM8X16_WCD_A_DIGITAL_CDC_CONN_TX2_CTL (0x051)
66 #define MSM8X16_WCD_A_DIGITAL_CDC_CONN_TX2_CTL__POR (0x02)
67 #define MSM8X16_WCD_A_DIGITAL_CDC_CONN_HPHR_DAC_CTL (0x052)
68 #define MSM8X16_WCD_A_DIGITAL_CDC_CONN_HPHR_DAC_CTL__POR (0x00)
69 #define MSM8X16_WCD_A_DIGITAL_CDC_CONN_RX1_CTL (0x053)
70 #define MSM8X16_WCD_A_DIGITAL_CDC_CONN_RX1_CTL__POR (0x00)
71 #define MSM8X16_WCD_A_DIGITAL_CDC_CONN_RX2_CTL (0x054)
72 #define MSM8X16_WCD_A_DIGITAL_CDC_CONN_RX2_CTL__POR (0x00)
73 #define MSM8X16_WCD_A_DIGITAL_CDC_CONN_RX3_CTL (0x055)
74 #define MSM8X16_WCD_A_DIGITAL_CDC_CONN_RX3_CTL__POR (0x00)
75 #define MSM8X16_WCD_A_DIGITAL_CDC_CONN_RX_LB_CTL (0x056)
76 #define MSM8X16_WCD_A_DIGITAL_CDC_CONN_RX_LB_CTL__POR (0x00)
77 #define MSM8X16_WCD_A_DIGITAL_CDC_RX_CTL1 (0x058)
78 #define MSM8X16_WCD_A_DIGITAL_CDC_RX_CTL1__POR (0x7C)
79 #define MSM8X16_WCD_A_DIGITAL_CDC_RX_CTL2 (0x059)
80 #define MSM8X16_WCD_A_DIGITAL_CDC_RX_CTL2__POR (0x7C)
81 #define MSM8X16_WCD_A_DIGITAL_CDC_RX_CTL3 (0x05A)
82 #define MSM8X16_WCD_A_DIGITAL_CDC_RX_CTL3__POR (0x7C)
83 #define MSM8X16_WCD_A_DIGITAL_DEM_BYPASS_DATA0 (0x05B)
84 #define MSM8X16_WCD_A_DIGITAL_DEM_BYPASS_DATA0__POR (0x00)
85 #define MSM8X16_WCD_A_DIGITAL_DEM_BYPASS_DATA1 (0x05C)
86 #define MSM8X16_WCD_A_DIGITAL_DEM_BYPASS_DATA1__POR (0x00)
87 #define MSM8X16_WCD_A_DIGITAL_DEM_BYPASS_DATA2 (0x05D)
88 #define MSM8X16_WCD_A_DIGITAL_DEM_BYPASS_DATA2__POR (0x00)
89 #define MSM8X16_WCD_A_DIGITAL_DEM_BYPASS_DATA3 (0x05E)
90 #define MSM8X16_WCD_A_DIGITAL_DEM_BYPASS_DATA3__POR (0x00)
91 #define MSM8X16_WCD_A_DIGITAL_DIG_DEBUG_CTL (0x068)
92 #define MSM8X16_WCD_A_DIGITAL_DIG_DEBUG_CTL__POR (0x00)
93 #define MSM8X16_WCD_A_DIGITAL_DIG_DEBUG_EN (0x069)
94 #define MSM8X16_WCD_A_DIGITAL_DIG_DEBUG_EN__POR (0x00)
95 #define MSM8X16_WCD_A_DIGITAL_SPARE_0 (0x070)
96 #define MSM8X16_WCD_A_DIGITAL_SPARE_0__POR (0x00)
97 #define MSM8X16_WCD_A_DIGITAL_SPARE_1 (0x071)
98 #define MSM8X16_WCD_A_DIGITAL_SPARE_1__POR (0x00)
99 #define MSM8X16_WCD_A_DIGITAL_SPARE_2 (0x072)
100 #define MSM8X16_WCD_A_DIGITAL_SPARE_2__POR (0x00)
101 #define MSM8X16_WCD_A_DIGITAL_SEC_ACCESS (0x0D0)
102 #define MSM8X16_WCD_A_DIGITAL_SEC_ACCESS__POR (0x00)
103 #define MSM8X16_WCD_A_DIGITAL_PERPH_RESET_CTL1 (0x0D8)
104 #define MSM8X16_WCD_A_DIGITAL_PERPH_RESET_CTL1__POR (0x00)
105 #define MSM8X16_WCD_A_DIGITAL_PERPH_RESET_CTL2 (0x0D9)
106 #define MSM8X16_WCD_A_DIGITAL_PERPH_RESET_CTL2__POR (0x01)
107 #define MSM8X16_WCD_A_DIGITAL_PERPH_RESET_CTL3 (0x0DA)
108 #define MSM8X16_WCD_A_DIGITAL_PERPH_RESET_CTL3__POR (0x05)
109 #define MSM8X16_WCD_A_DIGITAL_PERPH_RESET_CTL4 (0x0DB)
110 #define MSM8X16_WCD_A_DIGITAL_PERPH_RESET_CTL4__POR (0x00)
111 #define MSM8X16_WCD_A_DIGITAL_INT_TEST1 (0x0E0)
112 #define MSM8X16_WCD_A_DIGITAL_INT_TEST1__POR (0x00)
113 #define MSM8X16_WCD_A_DIGITAL_INT_TEST_VAL (0x0E1)
114 #define MSM8X16_WCD_A_DIGITAL_INT_TEST_VAL__POR (0x00)
115 #define MSM8X16_WCD_A_DIGITAL_TRIM_NUM (0x0F0)
116 #define MSM8X16_WCD_A_DIGITAL_TRIM_NUM__POR (0x00)
117 #define MSM8X16_WCD_A_DIGITAL_TRIM_CTRL (0x0F1)
118 #define MSM8X16_WCD_A_DIGITAL_TRIM_CTRL__POR (0x00)
120 #define MSM8X16_WCD_A_ANALOG_REVISION1 (0x100)
121 #define MSM8X16_WCD_A_ANALOG_REVISION1__POR (0x00)
122 #define MSM8X16_WCD_A_ANALOG_REVISION2 (0x101)
123 #define MSM8X16_WCD_A_ANALOG_REVISION2__POR (0x00)
124 #define MSM8X16_WCD_A_ANALOG_REVISION3 (0x102)
125 #define MSM8X16_WCD_A_ANALOG_REVISION3__POR (0x00)
126 #define MSM8X16_WCD_A_ANALOG_REVISION4 (0x103)
127 #define MSM8X16_WCD_A_ANALOG_REVISION4__POR (0x00)
128 #define MSM8X16_WCD_A_ANALOG_PERPH_TYPE (0x104)
129 #define MSM8X16_WCD_A_ANALOG_PERPH_TYPE__POR (0x23)
130 #define MSM8X16_WCD_A_ANALOG_PERPH_SUBTYPE (0x105)
131 #define MSM8X16_WCD_A_ANALOG_PERPH_SUBTYPE__POR (0x09)
132 #define MSM8X16_WCD_A_ANALOG_INT_RT_STS (0x110)
133 #define MSM8X16_WCD_A_ANALOG_INT_RT_STS__POR (0x00)
134 #define MSM8X16_WCD_A_ANALOG_INT_SET_TYPE (0x111)
135 #define MSM8X16_WCD_A_ANALOG_INT_SET_TYPE__POR (0x3F)
136 #define MSM8X16_WCD_A_ANALOG_INT_POLARITY_HIGH (0x112)
137 #define MSM8X16_WCD_A_ANALOG_INT_POLARITY_HIGH__POR (0x3F)
138 #define MSM8X16_WCD_A_ANALOG_INT_POLARITY_LOW (0x113)
139 #define MSM8X16_WCD_A_ANALOG_INT_POLARITY_LOW__POR (0x00)
140 #define MSM8X16_WCD_A_ANALOG_INT_LATCHED_CLR (0x114)
141 #define MSM8X16_WCD_A_ANALOG_INT_LATCHED_CLR__POR (0x00)
142 #define MSM8X16_WCD_A_ANALOG_INT_EN_SET (0x115)
143 #define MSM8X16_WCD_A_ANALOG_INT_EN_SET__POR (0x00)
144 #define MSM8X16_WCD_A_ANALOG_INT_EN_CLR (0x116)
145 #define MSM8X16_WCD_A_ANALOG_INT_EN_CLR__POR (0x00)
146 #define MSM8X16_WCD_A_ANALOG_INT_LATCHED_STS (0x118)
147 #define MSM8X16_WCD_A_ANALOG_INT_LATCHED_STS__POR (0x00)
148 #define MSM8X16_WCD_A_ANALOG_INT_PENDING_STS (0x119)
149 #define MSM8X16_WCD_A_ANALOG_INT_PENDING_STS__POR (0x00)
150 #define MSM8X16_WCD_A_ANALOG_INT_MID_SEL (0x11A)
151 #define MSM8X16_WCD_A_ANALOG_INT_MID_SEL__POR (0x00)
152 #define MSM8X16_WCD_A_ANALOG_INT_PRIORITY (0x11B)
153 #define MSM8X16_WCD_A_ANALOG_INT_PRIORITY__POR (0x00)
154 #define MSM8X16_WCD_A_ANALOG_MICB_1_EN (0x140)
155 #define MSM8X16_WCD_A_ANALOG_MICB_1_EN__POR (0x00)
156 #define MSM8X16_WCD_A_ANALOG_MICB_1_VAL (0x141)
157 #define MSM8X16_WCD_A_ANALOG_MICB_1_VAL__POR (0x20)
158 #define MSM8X16_WCD_A_ANALOG_MICB_1_CTL (0x142)
159 #define MSM8X16_WCD_A_ANALOG_MICB_1_CTL__POR (0x00)
160 #define MSM8X16_WCD_A_ANALOG_MICB_1_INT_RBIAS (0x143)
161 #define MSM8X16_WCD_A_ANALOG_MICB_1_INT_RBIAS__POR (0x49)
162 #define MSM8X16_WCD_A_ANALOG_MICB_2_EN (0x144)
163 #define MSM8X16_WCD_A_ANALOG_MICB_2_EN__POR (0x20)
164 #define MSM8X16_WCD_A_ANALOG_TX_1_2_ATEST_CTL_2 (0x145)
165 #define MSM8X16_WCD_A_ANALOG_TX_1_2_ATEST_CTL_2__POR (0x00)
166 #define MSM8X16_WCD_A_ANALOG_MASTER_BIAS_CTL (0x146)
167 #define MSM8X16_WCD_A_ANALOG_MASTER_BIAS_CTL__POR (0x00)
168 #define MSM8X16_WCD_A_ANALOG_MBHC_DET_CTL_1 (0x147)
169 #define MSM8X16_WCD_A_ANALOG_MBHC_DET_CTL_1__POR (0x35)
170 #define MSM8X16_WCD_A_ANALOG_MBHC_DET_CTL_2 (0x150)
171 #define MSM8X16_WCD_A_ANALOG_MBHC_DET_CTL_2__POR (0x08)
172 #define MSM8X16_WCD_A_ANALOG_MBHC_FSM_CTL (0x151)
173 #define MSM8X16_WCD_A_ANALOG_MBHC_FSM_CTL__POR (0x00)
174 #define MSM8X16_WCD_A_ANALOG_MBHC_DBNC_TIMER (0x152)
175 #define MSM8X16_WCD_A_ANALOG_MBHC_DBNC_TIMER__POR (0x98)
176 #define MSM8X16_WCD_A_ANALOG_MBHC_BTN0_ZDETL_CTL (0x153)
177 #define MSM8X16_WCD_A_ANALOG_MBHC_BTN0_ZDETL_CTL__POR (0x00)
178 #define MSM8X16_WCD_A_ANALOG_MBHC_BTN1_ZDETM_CTL (0x154)
179 #define MSM8X16_WCD_A_ANALOG_MBHC_BTN1_ZDETM_CTL__POR (0x20)
180 #define MSM8X16_WCD_A_ANALOG_MBHC_BTN2_ZDETH_CTL (0x155)
181 #define MSM8X16_WCD_A_ANALOG_MBHC_BTN2_ZDETH_CTL__POR (0x40)
182 #define MSM8X16_WCD_A_ANALOG_MBHC_BTN3_CTL (0x156)
183 #define MSM8X16_WCD_A_ANALOG_MBHC_BTN3_CTL__POR (0x61)
184 #define MSM8X16_WCD_A_ANALOG_MBHC_BTN4_CTL (0x157)
185 #define MSM8X16_WCD_A_ANALOG_MBHC_BTN4_CTL__POR (0x80)
186 #define MSM8X16_WCD_A_ANALOG_MBHC_BTN_RESULT (0x158)
187 #define MSM8X16_WCD_A_ANALOG_MBHC_BTN_RESULT__POR (0x00)
188 #define MSM8X16_WCD_A_ANALOG_MBHC_ZDET_ELECT_RESULT (0x159)
189 #define MSM8X16_WCD_A_ANALOG_MBHC_ZDET_ELECT_RESULT__POR (0x00)
190 #define MSM8X16_WCD_A_ANALOG_TX_1_EN (0x160)
191 #define MSM8X16_WCD_A_ANALOG_TX_1_EN__POR (0x03)
192 #define MSM8X16_WCD_A_ANALOG_TX_2_EN (0x161)
193 #define MSM8X16_WCD_A_ANALOG_TX_2_EN__POR (0x03)
194 #define MSM8X16_WCD_A_ANALOG_TX_1_2_TEST_CTL_1 (0x162)
195 #define MSM8X16_WCD_A_ANALOG_TX_1_2_TEST_CTL_1__POR (0xBF)
196 #define MSM8X16_WCD_A_ANALOG_TX_1_2_TEST_CTL_2 (0x163)
197 #define MSM8X16_WCD_A_ANALOG_TX_1_2_TEST_CTL_2__POR (0x8C)
198 #define MSM8X16_WCD_A_ANALOG_TX_1_2_ATEST_CTL (0x164)
199 #define MSM8X16_WCD_A_ANALOG_TX_1_2_ATEST_CTL__POR (0x00)
200 #define MSM8X16_WCD_A_ANALOG_TX_1_2_OPAMP_BIAS (0x165)
201 #define MSM8X16_WCD_A_ANALOG_TX_1_2_OPAMP_BIAS__POR (0x6B)
202 #define MSM8X16_WCD_A_ANALOG_TX_1_2_TXFE_CLKDIV (0x166)
203 #define MSM8X16_WCD_A_ANALOG_TX_1_2_TXFE_CLKDIV__POR (0x51)
204 #define MSM8X16_WCD_A_ANALOG_TX_3_EN (0x167)
205 #define MSM8X16_WCD_A_ANALOG_TX_3_EN__POR (0x02)
206 #define MSM8X16_WCD_A_ANALOG_NCP_EN (0x180)
207 #define MSM8X16_WCD_A_ANALOG_NCP_EN__POR (0x26)
208 #define MSM8X16_WCD_A_ANALOG_NCP_CLK (0x181)
209 #define MSM8X16_WCD_A_ANALOG_NCP_CLK__POR (0x23)
210 #define MSM8X16_WCD_A_ANALOG_NCP_DEGLITCH (0x182)
211 #define MSM8X16_WCD_A_ANALOG_NCP_DEGLITCH__POR (0x5B)
212 #define MSM8X16_WCD_A_ANALOG_NCP_FBCTRL (0x183)
213 #define MSM8X16_WCD_A_ANALOG_NCP_FBCTRL__POR (0x08)
214 #define MSM8X16_WCD_A_ANALOG_NCP_BIAS (0x184)
215 #define MSM8X16_WCD_A_ANALOG_NCP_BIAS__POR (0x29)
216 #define MSM8X16_WCD_A_ANALOG_NCP_VCTRL (0x185)
217 #define MSM8X16_WCD_A_ANALOG_NCP_VCTRL__POR (0x24)
218 #define MSM8X16_WCD_A_ANALOG_NCP_TEST (0x186)
219 #define MSM8X16_WCD_A_ANALOG_NCP_TEST__POR (0x00)
220 #define MSM8X16_WCD_A_ANALOG_NCP_CLIM_ADDR (0x187)
221 #define MSM8X16_WCD_A_ANALOG_NCP_CLIM_ADDR__POR (0xD5)
222 #define MSM8X16_WCD_A_ANALOG_RX_CLOCK_DIVIDER (0x190)
223 #define MSM8X16_WCD_A_ANALOG_RX_CLOCK_DIVIDER__POR (0xE8)
224 #define MSM8X16_WCD_A_ANALOG_RX_COM_OCP_CTL (0x191)
225 #define MSM8X16_WCD_A_ANALOG_RX_COM_OCP_CTL__POR (0xCF)
226 #define MSM8X16_WCD_A_ANALOG_RX_COM_OCP_COUNT (0x192)
227 #define MSM8X16_WCD_A_ANALOG_RX_COM_OCP_COUNT__POR (0x6E)
228 #define MSM8X16_WCD_A_ANALOG_RX_COM_BIAS_DAC (0x193)
229 #define MSM8X16_WCD_A_ANALOG_RX_COM_BIAS_DAC__POR (0x10)
230 #define MSM8X16_WCD_A_ANALOG_RX_HPH_BIAS_PA (0x194)
231 #define MSM8X16_WCD_A_ANALOG_RX_HPH_BIAS_PA__POR (0x5A)
232 #define MSM8X16_WCD_A_ANALOG_RX_HPH_BIAS_LDO_OCP (0x195)
233 #define MSM8X16_WCD_A_ANALOG_RX_HPH_BIAS_LDO_OCP__POR (0x69)
234 #define MSM8X16_WCD_A_ANALOG_RX_HPH_BIAS_CNP (0x196)
235 #define MSM8X16_WCD_A_ANALOG_RX_HPH_BIAS_CNP__POR (0x29)
236 #define MSM8X16_WCD_A_ANALOG_RX_HPH_CNP_EN (0x197)
237 #define MSM8X16_WCD_A_ANALOG_RX_HPH_CNP_EN__POR (0x80)
238 #define MSM8X16_WCD_A_ANALOG_RX_HPH_CNP_WG_CTL (0x198)
239 #define MSM8X16_WCD_A_ANALOG_RX_HPH_CNP_WG_CTL__POR (0xDA)
240 #define MSM8X16_WCD_A_ANALOG_RX_HPH_CNP_WG_TIME (0x199)
241 #define MSM8X16_WCD_A_ANALOG_RX_HPH_CNP_WG_TIME__POR (0x16)
242 #define MSM8X16_WCD_A_ANALOG_RX_HPH_L_TEST (0x19A)
243 #define MSM8X16_WCD_A_ANALOG_RX_HPH_L_TEST__POR (0x00)
244 #define MSM8X16_WCD_A_ANALOG_RX_HPH_L_PA_DAC_CTL (0x19B)
245 #define MSM8X16_WCD_A_ANALOG_RX_HPH_L_PA_DAC_CTL__POR (0x20)
246 #define MSM8X16_WCD_A_ANALOG_RX_HPH_R_TEST (0x19C)
247 #define MSM8X16_WCD_A_ANALOG_RX_HPH_R_TEST__POR (0x00)
248 #define MSM8X16_WCD_A_ANALOG_RX_HPH_R_PA_DAC_CTL (0x19D)
249 #define MSM8X16_WCD_A_ANALOG_RX_HPH_R_PA_DAC_CTL__POR (0x20)
250 #define MSM8X16_WCD_A_ANALOG_RX_EAR_CTL (0x19E)
251 #define MSM8X16_WCD_A_ANALOG_RX_EAR_CTL___POR (0x12)
252 #define MSM8X16_WCD_A_ANALOG_RX_ATEST (0x19F)
253 #define MSM8X16_WCD_A_ANALOG_RX_ATEST__POR (0x00)
254 #define MSM8X16_WCD_A_ANALOG_RX_HPH_STATUS (0x1A0)
255 #define MSM8X16_WCD_A_ANALOG_RX_HPH_STATUS__POR (0x0C)
256 #define MSM8X16_WCD_A_ANALOG_RX_EAR_STATUS (0x1A1)
257 #define MSM8X16_WCD_A_ANALOG_RX_EAR_STATUS__POR (0x00)
258 #define MSM8X16_WCD_A_ANALOG_SPKR_DAC_CTL (0x1B0)
259 #define MSM8X16_WCD_A_ANALOG_SPKR_DAC_CTL__POR (0x83)
260 #define MSM8X16_WCD_A_ANALOG_SPKR_DRV_CLIP_DET (0x1B1)
261 #define MSM8X16_WCD_A_ANALOG_SPKR_DRV_CLIP_DET__POR (0x91)
262 #define MSM8X16_WCD_A_ANALOG_SPKR_DRV_CTL (0x1B2)
263 #define MSM8X16_WCD_A_ANALOG_SPKR_DRV_CTL__POR (0x29)
264 #define MSM8X16_WCD_A_ANALOG_SPKR_ANA_BIAS_SET (0x1B3)
265 #define MSM8X16_WCD_A_ANALOG_SPKR_ANA_BIAS_SET__POR (0x4D)
266 #define MSM8X16_WCD_A_ANALOG_SPKR_OCP_CTL (0x1B4)
267 #define MSM8X16_WCD_A_ANALOG_SPKR_OCP_CTL__POR (0xE1)
268 #define MSM8X16_WCD_A_ANALOG_SPKR_PWRSTG_CTL (0x1B5)
269 #define MSM8X16_WCD_A_ANALOG_SPKR_PWRSTG_CTL__POR (0x1E)
270 #define MSM8X16_WCD_A_ANALOG_SPKR_DRV_MISC (0x1B6)
271 #define MSM8X16_WCD_A_ANALOG_SPKR_DRV_MISC__POR (0xCB)
272 #define MSM8X16_WCD_A_ANALOG_SPKR_DRV_DBG (0x1B7)
273 #define MSM8X16_WCD_A_ANALOG_SPKR_DRV_DBG__POR (0x00)
274 #define MSM8X16_WCD_A_ANALOG_CURRENT_LIMIT (0x1C0)
275 #define MSM8X16_WCD_A_ANALOG_CURRENT_LIMIT__POR (0x02)
276 #define MSM8X16_WCD_A_ANALOG_OUTPUT_VOLTAGE (0x1C1)
277 #define MSM8X16_WCD_A_ANALOG_OUTPUT_VOLTAGE__POR (0x14)
278 #define MSM8X16_WCD_A_ANALOG_BYPASS_MODE (0x1C2)
279 #define MSM8X16_WCD_A_ANALOG_BYPASS_MODE__POR (0x00)
280 #define MSM8X16_WCD_A_ANALOG_BOOST_EN_CTL (0x1C3)
281 #define MSM8X16_WCD_A_ANALOG_BOOST_EN_CTL__POR (0x1F)
282 #define MSM8X16_WCD_A_ANALOG_SLOPE_COMP_IP_ZERO (0x1C4)
283 #define MSM8X16_WCD_A_ANALOG_SLOPE_COMP_IP_ZERO__POR (0x8C)
284 #define MSM8X16_WCD_A_ANALOG_RDSON_MAX_DUTY_CYCLE (0x1C5)
285 #define MSM8X16_WCD_A_ANALOG_RDSON_MAX_DUTY_CYCLE__POR (0xC0)
286 #define MSM8X16_WCD_A_ANALOG_BOOST_TEST1_1 (0x1C6)
287 #define MSM8X16_WCD_A_ANALOG_BOOST_TEST1_1__POR (0x00)
288 #define MSM8X16_WCD_A_ANALOG_BOOST_TEST_2 (0x1C7)
289 #define MSM8X16_WCD_A_ANALOG_BOOST_TEST_2__POR (0x00)
290 #define MSM8X16_WCD_A_ANALOG_SPKR_SAR_STATUS (0x1C8)
291 #define MSM8X16_WCD_A_ANALOG_SPKR_SAR_STATUS__POR (0x00)
292 #define MSM8X16_WCD_A_ANALOG_SPKR_DRV_STATUS (0x1C9)
293 #define MSM8X16_WCD_A_ANALOG_SPKR_DRV_STATUS__POR (0x00)
294 #define MSM8X16_WCD_A_ANALOG_PBUS_ADD_CSR (0x1CE)
295 #define MSM8X16_WCD_A_ANALOG_PBUS_ADD_CSR__POR (0x00)
296 #define MSM8X16_WCD_A_ANALOG_PBUS_ADD_SEL (0x1CF)
297 #define MSM8X16_WCD_A_ANALOG_PBUS_ADD_SEL__POR (0x00)
298 #define MSM8X16_WCD_A_ANALOG_SEC_ACCESS (0x1D0)
299 #define MSM8X16_WCD_A_ANALOG_SEC_ACCESS__POR (0x00)
300 #define MSM8X16_WCD_A_ANALOG_PERPH_RESET_CTL1 (0x1D8)
301 #define MSM8X16_WCD_A_ANALOG_PERPH_RESET_CTL1__POR (0x00)
302 #define MSM8X16_WCD_A_ANALOG_PERPH_RESET_CTL2 (0x1D9)
303 #define MSM8X16_WCD_A_ANALOG_PERPH_RESET_CTL2__POR (0x01)
304 #define MSM8X16_WCD_A_ANALOG_PERPH_RESET_CTL3 (0x1DA)
305 #define MSM8X16_WCD_A_ANALOG_PERPH_RESET_CTL3__POR (0x05)
306 #define MSM8X16_WCD_A_ANALOG_PERPH_RESET_CTL4 (0x1DB)
307 #define MSM8X16_WCD_A_ANALOG_PERPH_RESET_CTL4__POR (0x00)
308 #define MSM8X16_WCD_A_ANALOG_INT_TEST1 (0x1E0)
309 #define MSM8X16_WCD_A_ANALOG_INT_TEST1__POR (0x00)
310 #define MSM8X16_WCD_A_ANALOG_INT_TEST_VAL (0x1E1)
311 #define MSM8X16_WCD_A_ANALOG_INT_TEST_VAL__POR (0x00)
312 #define MSM8X16_WCD_A_ANALOG_TRIM_NUM (0x1F0)
313 #define MSM8X16_WCD_A_ANALOG_TRIM_NUM__POR (0x04)
314 #define MSM8X16_WCD_A_ANALOG_TRIM_CTRL1 (0x1F1)
315 #define MSM8X16_WCD_A_ANALOG_TRIM_CTRL1__POR (0x00)
316 #define MSM8X16_WCD_A_ANALOG_TRIM_CTRL2 (0x1F2)
317 #define MSM8X16_WCD_A_ANALOG_TRIM_CTRL2__POR (0x00)
318 #define MSM8X16_WCD_A_ANALOG_TRIM_CTRL3 (0x1F3)
319 #define MSM8X16_WCD_A_ANALOG_TRIM_CTRL3__POR (0x00)
320 #define MSM8X16_WCD_A_ANALOG_TRIM_CTRL4 (0x1F4)
321 #define MSM8X16_WCD_A_ANALOG_TRIM_CTRL4__POR (0x00)
324 #define MSM8X16_WCD_A_CDC_CLK_RX_RESET_CTL (0x200)
325 #define MSM8X16_WCD_A_CDC_CLK_RX_RESET_CTL__POR (0x00)
326 #define MSM8X16_WCD_A_CDC_CLK_TX_RESET_B1_CTL (0x204)
327 #define MSM8X16_WCD_A_CDC_CLK_TX_RESET_B1_CTL__POR (0x00)
328 #define MSM8X16_WCD_A_CDC_CLK_DMIC_B1_CTL (0x208)
329 #define MSM8X16_WCD_A_CDC_CLK_DMIC_B1_CTL__POR (0x00)
330 #define MSM8X16_WCD_A_CDC_CLK_RX_I2S_CTL (0x20C)
331 #define MSM8X16_WCD_A_CDC_CLK_RX_I2S_CTL__POR (0x13)
332 #define MSM8X16_WCD_A_CDC_CLK_TX_I2S_CTL (0x210)
333 #define MSM8X16_WCD_A_CDC_CLK_TX_I2S_CTL__POR (0x13)
334 #define MSM8X16_WCD_A_CDC_CLK_OTHR_RESET_B1_CTL (0x214)
335 #define MSM8X16_WCD_A_CDC_CLK_OTHR_RESET_B1_CTL__POR (0x00)
336 #define MSM8X16_WCD_A_CDC_CLK_TX_CLK_EN_B1_CTL (0x218)
337 #define MSM8X16_WCD_A_CDC_CLK_TX_CLK_EN_B1_CTL__POR (0x00)
338 #define MSM8X16_WCD_A_CDC_CLK_OTHR_CTL (0x21C)
339 #define MSM8X16_WCD_A_CDC_CLK_OTHR_CTL__POR (0x04)
340 #define MSM8X16_WCD_A_CDC_CLK_RX_B1_CTL (0x220)
341 #define MSM8X16_WCD_A_CDC_CLK_RX_B1_CTL__POR (0x00)
342 #define MSM8X16_WCD_A_CDC_CLK_MCLK_CTL (0x224)
343 #define MSM8X16_WCD_A_CDC_CLK_MCLK_CTL__POR (0x00)
344 #define MSM8X16_WCD_A_CDC_CLK_PDM_CTL (0x228)
345 #define MSM8X16_WCD_A_CDC_CLK_PDM_CTL__POR (0x00)
346 #define MSM8X16_WCD_A_CDC_CLK_SD_CTL (0x22C)
347 #define MSM8X16_WCD_A_CDC_CLK_SD_CTL__POR (0x00)
348 #define MSM8X16_WCD_A_CDC_RX1_B1_CTL (0x240)
349 #define MSM8X16_WCD_A_CDC_RX1_B1_CTL__POR (0x00)
350 #define MSM8X16_WCD_A_CDC_RX2_B1_CTL (0x260)
351 #define MSM8X16_WCD_A_CDC_RX2_B1_CTL__POR (0x00)
352 #define MSM8X16_WCD_A_CDC_RX3_B1_CTL (0x280)
353 #define MSM8X16_WCD_A_CDC_RX3_B1_CTL__POR (0x00)
354 #define MSM8X16_WCD_A_CDC_RX1_B2_CTL (0x244)
355 #define MSM8X16_WCD_A_CDC_RX1_B2_CTL__POR (0x00)
356 #define MSM8X16_WCD_A_CDC_RX2_B2_CTL (0x264)
357 #define MSM8X16_WCD_A_CDC_RX2_B2_CTL__POR (0x00)
358 #define MSM8X16_WCD_A_CDC_RX3_B2_CTL (0x284)
359 #define MSM8X16_WCD_A_CDC_RX3_B2_CTL__POR (0x00)
360 #define MSM8X16_WCD_A_CDC_RX1_B3_CTL (0x248)
361 #define MSM8X16_WCD_A_CDC_RX1_B3_CTL__POR (0x00)
362 #define MSM8X16_WCD_A_CDC_RX2_B3_CTL (0x268)
363 #define MSM8X16_WCD_A_CDC_RX2_B3_CTL__POR (0x00)
364 #define MSM8X16_WCD_A_CDC_RX3_B3_CTL (0x288)
365 #define MSM8X16_WCD_A_CDC_RX3_B3_CTL__POR (0x00)
366 #define MSM8X16_WCD_A_CDC_RX1_B4_CTL (0x24C)
367 #define MSM8X16_WCD_A_CDC_RX1_B4_CTL__POR (0x00)
368 #define MSM8X16_WCD_A_CDC_RX2_B4_CTL (0x26C)
369 #define MSM8X16_WCD_A_CDC_RX2_B4_CTL__POR (0x00)
370 #define MSM8X16_WCD_A_CDC_RX3_B4_CTL (0x28C)
371 #define MSM8X16_WCD_A_CDC_RX3_B4_CTL__POR (0x00)
372 #define MSM8X16_WCD_A_CDC_RX1_B5_CTL (0x250)
373 #define MSM8X16_WCD_A_CDC_RX1_B5_CTL__POR (0x68)
374 #define MSM8X16_WCD_A_CDC_RX2_B5_CTL (0x270)
375 #define MSM8X16_WCD_A_CDC_RX2_B5_CTL__POR (0x68)
376 #define MSM8X16_WCD_A_CDC_RX3_B5_CTL (0x290)
377 #define MSM8X16_WCD_A_CDC_RX3_B5_CTL__POR (0x68)
378 #define MSM8X16_WCD_A_CDC_RX1_B6_CTL (0x254)
379 #define MSM8X16_WCD_A_CDC_RX1_B6_CTL__POR (0x00)
380 #define MSM8X16_WCD_A_CDC_RX2_B6_CTL (0x274)
381 #define MSM8X16_WCD_A_CDC_RX2_B6_CTL__POR (0x00)
382 #define MSM8X16_WCD_A_CDC_RX3_B6_CTL (0x294)
383 #define MSM8X16_WCD_A_CDC_RX3_B6_CTL__POR (0x00)
384 #define MSM8X16_WCD_A_CDC_RX1_VOL_CTL_B1_CTL (0x258)
385 #define MSM8X16_WCD_A_CDC_RX1_VOL_CTL_B1_CTL__POR (0x00)
386 #define MSM8X16_WCD_A_CDC_RX2_VOL_CTL_B1_CTL (0x278)
387 #define MSM8X16_WCD_A_CDC_RX2_VOL_CTL_B1_CTL__POR (0x00)
388 #define MSM8X16_WCD_A_CDC_RX3_VOL_CTL_B1_CTL (0x298)
389 #define MSM8X16_WCD_A_CDC_RX3_VOL_CTL_B1_CTL__POR (0x00)
390 #define MSM8X16_WCD_A_CDC_RX1_VOL_CTL_B2_CTL (0x25C)
391 #define MSM8X16_WCD_A_CDC_RX1_VOL_CTL_B2_CTL__POR (0x00)
392 #define MSM8X16_WCD_A_CDC_RX2_VOL_CTL_B2_CTL (0x27C)
393 #define MSM8X16_WCD_A_CDC_RX2_VOL_CTL_B2_CTL__POR (0x00)
394 #define MSM8X16_WCD_A_CDC_RX3_VOL_CTL_B2_CTL (0x29C)
395 #define MSM8X16_WCD_A_CDC_RX3_VOL_CTL_B2_CTL__POR (0x00)
396 #define MSM8X16_WCD_A_CDC_TOP_GAIN_UPDATE (0x2A0)
397 #define MSM8X16_WCD_A_CDC_TOP_GAIN_UPDATE__POR (0x00)
398 #define MSM8X16_WCD_A_CDC_TOP_CTL (0x2A4)
399 #define MSM8X16_WCD_A_CDC_TOP_CTL__POR (0x01)
400 #define MSM8X16_WCD_A_CDC_DEBUG_DESER1_CTL (0x2E0)
401 #define MSM8X16_WCD_A_CDC_DEBUG_DESER1_CTL__POR (0x00)
402 #define MSM8X16_WCD_A_CDC_DEBUG_DESER2_CTL (0x2E4)
403 #define MSM8X16_WCD_A_CDC_DEBUG_DESER2_CTL__POR (0x00)
404 #define MSM8X16_WCD_A_CDC_DEBUG_B1_CTL_CFG (0x2E8)
405 #define MSM8X16_WCD_A_CDC_DEBUG_B1_CTL__POR (0x00)
406 #define MSM8X16_WCD_A_CDC_DEBUG_B2_CTL_CFG (0x2EC)
407 #define MSM8X16_WCD_A_CDC_DEBUG_B2_CTL__POR (0x00)
408 #define MSM8X16_WCD_A_CDC_DEBUG_B3_CTL_CFG (0x2F0)
409 #define MSM8X16_WCD_A_CDC_DEBUG_B3_CTL__POR (0x00)
410 #define MSM8X16_WCD_A_CDC_IIR1_GAIN_B1_CTL (0x300)
411 #define MSM8X16_WCD_A_CDC_IIR1_GAIN_B1_CTL__POR (0x00)
412 #define MSM8X16_WCD_A_CDC_IIR2_GAIN_B1_CTL (0x340)
413 #define MSM8X16_WCD_A_CDC_IIR2_GAIN_B1_CTL__POR (0x00)
414 #define MSM8X16_WCD_A_CDC_IIR1_GAIN_B2_CTL (0x304)
415 #define MSM8X16_WCD_A_CDC_IIR1_GAIN_B2_CTL__POR (0x00)
416 #define MSM8X16_WCD_A_CDC_IIR2_GAIN_B2_CTL (0x344)
417 #define MSM8X16_WCD_A_CDC_IIR2_GAIN_B2_CTL__POR (0x00)
418 #define MSM8X16_WCD_A_CDC_IIR1_GAIN_B3_CTL (0x308)
419 #define MSM8X16_WCD_A_CDC_IIR1_GAIN_B3_CTL__POR (0x00)
420 #define MSM8X16_WCD_A_CDC_IIR2_GAIN_B3_CTL (0x348)
421 #define MSM8X16_WCD_A_CDC_IIR2_GAIN_B3_CTL__POR (0x00)
422 #define MSM8X16_WCD_A_CDC_IIR1_GAIN_B4_CTL (0x30C)
423 #define MSM8X16_WCD_A_CDC_IIR1_GAIN_B4_CTL__POR (0x00)
424 #define MSM8X16_WCD_A_CDC_IIR2_GAIN_B4_CTL (0x34C)
425 #define MSM8X16_WCD_A_CDC_IIR2_GAIN_B4_CTL__POR (0x00)
426 #define MSM8X16_WCD_A_CDC_IIR1_GAIN_B5_CTL (0x310)
427 #define MSM8X16_WCD_A_CDC_IIR1_GAIN_B5_CTL__POR (0x00)
428 #define MSM8X16_WCD_A_CDC_IIR2_GAIN_B5_CTL (0x350)
429 #define MSM8X16_WCD_A_CDC_IIR2_GAIN_B5_CTL__POR (0x00)
430 #define MSM8X16_WCD_A_CDC_IIR1_GAIN_B6_CTL (0x314)
431 #define MSM8X16_WCD_A_CDC_IIR1_GAIN_B6_CTL__POR (0x00)
432 #define MSM8X16_WCD_A_CDC_IIR2_GAIN_B6_CTL (0x354)
433 #define MSM8X16_WCD_A_CDC_IIR2_GAIN_B6_CTL__POR (0x00)
434 #define MSM8X16_WCD_A_CDC_IIR1_GAIN_B7_CTL (0x318)
435 #define MSM8X16_WCD_A_CDC_IIR1_GAIN_B7_CTL__POR (0x00)
436 #define MSM8X16_WCD_A_CDC_IIR2_GAIN_B7_CTL (0x358)
437 #define MSM8X16_WCD_A_CDC_IIR2_GAIN_B7_CTL__POR (0x00)
438 #define MSM8X16_WCD_A_CDC_IIR1_GAIN_B8_CTL (0x31C)
439 #define MSM8X16_WCD_A_CDC_IIR1_GAIN_B8_CTL__POR (0x00)
440 #define MSM8X16_WCD_A_CDC_IIR2_GAIN_B8_CTL (0x35C)
441 #define MSM8X16_WCD_A_CDC_IIR2_GAIN_B8_CTL__POR (0x00)
442 #define MSM8X16_WCD_A_CDC_IIR1_CTL (0x320)
443 #define MSM8X16_WCD_A_CDC_IIR1_CTL__POR (0x40)
444 #define MSM8X16_WCD_A_CDC_IIR2_CTL (0x360)
445 #define MSM8X16_WCD_A_CDC_IIR2_CTL__POR (0x40)
446 #define MSM8X16_WCD_A_CDC_IIR1_GAIN_TIMER_CTL (0x324)
447 #define MSM8X16_WCD_A_CDC_IIR1_GAIN_TIMER_CTL__POR (0x00)
448 #define MSM8X16_WCD_A_CDC_IIR2_GAIN_TIMER_CTL (0x364)
449 #define MSM8X16_WCD_A_CDC_IIR2_GAIN_TIMER_CTL__POR (0x00)
450 #define MSM8X16_WCD_A_CDC_IIR1_COEF_B1_CTL (0x328)
451 #define MSM8X16_WCD_A_CDC_IIR1_COEF_B1_CTL__POR (0x00)
452 #define MSM8X16_WCD_A_CDC_IIR2_COEF_B1_CTL (0x368)
453 #define MSM8X16_WCD_A_CDC_IIR2_COEF_B1_CTL__POR (0x00)
454 #define MSM8X16_WCD_A_CDC_IIR1_COEF_B2_CTL (0x32C)
455 #define MSM8X16_WCD_A_CDC_IIR1_COEF_B2_CTL__POR (0x00)
456 #define MSM8X16_WCD_A_CDC_IIR2_COEF_B2_CTL (0x36C)
457 #define MSM8X16_WCD_A_CDC_IIR2_COEF_B2_CTL__POR (0x00)
458 #define MSM8X16_WCD_A_CDC_CONN_RX1_B1_CTL (0x380)
459 #define MSM8X16_WCD_A_CDC_CONN_RX1_B1_CTL__POR (0x00)
460 #define MSM8X16_WCD_A_CDC_CONN_RX1_B2_CTL (0x384)
461 #define MSM8X16_WCD_A_CDC_CONN_RX1_B2_CTL__POR (0x00)
462 #define MSM8X16_WCD_A_CDC_CONN_RX1_B3_CTL (0x388)
463 #define MSM8X16_WCD_A_CDC_CONN_RX1_B3_CTL__POR (0x00)
464 #define MSM8X16_WCD_A_CDC_CONN_RX2_B1_CTL (0x38C)
465 #define MSM8X16_WCD_A_CDC_CONN_RX2_B1_CTL__POR (0x00)
466 #define MSM8X16_WCD_A_CDC_CONN_RX2_B2_CTL (0x390)
467 #define MSM8X16_WCD_A_CDC_CONN_RX2_B2_CTL__POR (0x00)
468 #define MSM8X16_WCD_A_CDC_CONN_RX2_B3_CTL (0x394)
469 #define MSM8X16_WCD_A_CDC_CONN_RX2_B3_CTL__POR (0x00)
470 #define MSM8X16_WCD_A_CDC_CONN_RX3_B1_CTL (0x398)
471 #define MSM8X16_WCD_A_CDC_CONN_RX3_B1_CTL__POR (0x00)
472 #define MSM8X16_WCD_A_CDC_CONN_RX3_B2_CTL (0x39C)
473 #define MSM8X16_WCD_A_CDC_CONN_RX3_B2_CTL__POR (0x00)
474 #define MSM8X16_WCD_A_CDC_CONN_TX_B1_CTL (0x3A0)
475 #define MSM8X16_WCD_A_CDC_CONN_TX_B1_CTL__POR (0x00)
476 #define MSM8X16_WCD_A_CDC_CONN_EQ1_B1_CTL (0x3A8)
477 #define MSM8X16_WCD_A_CDC_CONN_EQ1_B1_CTL__POR (0x00)
478 #define MSM8X16_WCD_A_CDC_CONN_EQ1_B2_CTL (0x3AC)
479 #define MSM8X16_WCD_A_CDC_CONN_EQ1_B2_CTL__POR (0x00)
480 #define MSM8X16_WCD_A_CDC_CONN_EQ1_B3_CTL (0x3B0)
481 #define MSM8X16_WCD_A_CDC_CONN_EQ1_B3_CTL__POR (0x00)
482 #define MSM8X16_WCD_A_CDC_CONN_EQ1_B4_CTL (0x3B4)
483 #define MSM8X16_WCD_A_CDC_CONN_EQ1_B4_CTL__POR (0x00)
484 #define MSM8X16_WCD_A_CDC_CONN_EQ2_B1_CTL (0x3B8)
485 #define MSM8X16_WCD_A_CDC_CONN_EQ2_B1_CTL__POR (0x00)
486 #define MSM8X16_WCD_A_CDC_CONN_EQ2_B2_CTL (0x3BC)
487 #define MSM8X16_WCD_A_CDC_CONN_EQ2_B2_CTL__POR (0x00)
488 #define MSM8X16_WCD_A_CDC_CONN_EQ2_B3_CTL (0x3C0)
489 #define MSM8X16_WCD_A_CDC_CONN_EQ2_B3_CTL__POR (0x00)
490 #define MSM8X16_WCD_A_CDC_CONN_EQ2_B4_CTL (0x3C4)
491 #define MSM8X16_WCD_A_CDC_CONN_EQ2_B4_CTL__POR (0x00)
492 #define MSM8X16_WCD_A_CDC_CONN_TX_I2S_SD1_CTL (0x3C8)
493 #define MSM8X16_WCD_A_CDC_CONN_TX_I2S_SD1_CTL__POR (0x00)
494 #define MSM8X16_WCD_A_CDC_TX1_VOL_CTL_TIMER (0x480)
495 #define MSM8X16_WCD_A_CDC_TX1_VOL_CTL_TIMER__POR (0x00)
496 #define MSM8X16_WCD_A_CDC_TX2_VOL_CTL_TIMER (0x4A0)
497 #define MSM8X16_WCD_A_CDC_TX2_VOL_CTL_TIMER__POR (0x00)
498 #define MSM8X16_WCD_A_CDC_TX1_VOL_CTL_GAIN (0x484)
499 #define MSM8X16_WCD_A_CDC_TX1_VOL_CTL_GAIN__POR (0x00)
500 #define MSM8X16_WCD_A_CDC_TX2_VOL_CTL_GAIN (0x4A4)
501 #define MSM8X16_WCD_A_CDC_TX2_VOL_CTL_GAIN__POR (0x00)
502 #define MSM8X16_WCD_A_CDC_TX1_VOL_CTL_CFG (0x488)
503 #define MSM8X16_WCD_A_CDC_TX1_VOL_CTL_CFG__POR (0x00)
504 #define MSM8X16_WCD_A_CDC_TX2_VOL_CTL_CFG (0x4A8)
505 #define MSM8X16_WCD_A_CDC_TX2_VOL_CTL_CFG__POR (0x00)
506 #define MSM8X16_WCD_A_CDC_TX1_MUX_CTL (0x48C)
507 #define MSM8X16_WCD_A_CDC_TX1_MUX_CTL__POR (0x00)
508 #define MSM8X16_WCD_A_CDC_TX2_MUX_CTL (0x4AC)
509 #define MSM8X16_WCD_A_CDC_TX2_MUX_CTL__POR (0x00)
510 #define MSM8X16_WCD_A_CDC_TX1_CLK_FS_CTL (0x490)
511 #define MSM8X16_WCD_A_CDC_TX1_CLK_FS_CTL__POR (0x03)
512 #define MSM8X16_WCD_A_CDC_TX2_CLK_FS_CTL (0x4B0)
513 #define MSM8X16_WCD_A_CDC_TX2_CLK_FS_CTL__POR (0x03)
514 #define MSM8X16_WCD_A_CDC_TX1_DMIC_CTL (0x494)
515 #define MSM8X16_WCD_A_CDC_TX1_DMIC_CTL__POR (0x00)
516 #define MSM8X16_WCD_A_CDC_TX2_DMIC_CTL (0x4B4)
517 #define MSM8X16_WCD_A_CDC_TX2_DMIC_CTL__POR (0x00)
projects / karo-tx-linux.git / blob