timer: timer@10000040 {
compatible = "syscon";
reg = <0x10000040 0x2c>;
- little-endian;
};
reboot {
sun_top_ctrl: syscon@404000 {
compatible = "brcm,bcm7125-sun-top-ctrl", "syscon";
reg = <0x404000 0x60c>;
- little-endian;
};
reboot {
sun_top_ctrl: syscon@404000 {
compatible = "brcm,bcm7346-sun-top-ctrl", "syscon";
reg = <0x404000 0x51c>;
- little-endian;
};
reboot {
sun_top_ctrl: syscon@404000 {
compatible = "brcm,bcm7358-sun-top-ctrl", "syscon";
reg = <0x404000 0x51c>;
- little-endian;
};
reboot {
sun_top_ctrl: syscon@404000 {
compatible = "brcm,bcm7360-sun-top-ctrl", "syscon";
reg = <0x404000 0x51c>;
- little-endian;
};
reboot {
sun_top_ctrl: syscon@404000 {
compatible = "brcm,bcm7362-sun-top-ctrl", "syscon";
reg = <0x404000 0x51c>;
- little-endian;
};
reboot {
sun_top_ctrl: syscon@404000 {
compatible = "brcm,bcm7420-sun-top-ctrl", "syscon";
reg = <0x404000 0x60c>;
- little-endian;
};
reboot {
sun_top_ctrl: syscon@404000 {
compatible = "brcm,bcm7425-sun-top-ctrl", "syscon";
reg = <0x404000 0x51c>;
- little-endian;
};
reboot {
sun_top_ctrl: syscon@404000 {
compatible = "brcm,bcm7425-sun-top-ctrl", "syscon";
reg = <0x404000 0x51c>;
- little-endian;
};
reboot {
max = reg + max_dist;
/* look for an adjacent register to the one we are about to add */
- for (node = rb_first(&rbtree_ctx->root); node;
- node = rb_next(node)) {
+ node = rbtree_ctx->root.rb_node;
+ while (node) {
rbnode_tmp = rb_entry(node, struct regcache_rbtree_node,
node);
new_base_reg = min(reg, base_reg);
new_top_reg = max(reg, top_reg);
} else {
+ if (max < base_reg)
+ node = node->rb_left;
+ else
+ node = node->rb_right;
+
continue;
}
while (val_size) {
switch (ctx->val_bytes) {
case 1:
- writeb(*(u8 *)val, ctx->regs + offset);
+ __raw_writeb(*(u8 *)val, ctx->regs + offset);
break;
case 2:
- writew(*(u16 *)val, ctx->regs + offset);
+ __raw_writew(*(u16 *)val, ctx->regs + offset);
break;
case 4:
- writel(*(u32 *)val, ctx->regs + offset);
+ __raw_writel(*(u32 *)val, ctx->regs + offset);
break;
#ifdef CONFIG_64BIT
case 8:
- writeq(*(u64 *)val, ctx->regs + offset);
+ __raw_writeq(*(u64 *)val, ctx->regs + offset);
break;
#endif
default:
while (val_size) {
switch (ctx->val_bytes) {
case 1:
- *(u8 *)val = readb(ctx->regs + offset);
+ *(u8 *)val = __raw_readb(ctx->regs + offset);
break;
case 2:
- *(u16 *)val = readw(ctx->regs + offset);
+ *(u16 *)val = __raw_readw(ctx->regs + offset);
break;
case 4:
- *(u32 *)val = readl(ctx->regs + offset);
+ *(u32 *)val = __raw_readl(ctx->regs + offset);
break;
#ifdef CONFIG_64BIT
case 8:
- *(u64 *)val = readq(ctx->regs + offset);
+ *(u64 *)val = __raw_readq(ctx->regs + offset);
break;
#endif
default: