Merge remote-tracking branch 'tip/timers/core' into fordlezcano/3.13/sched-clock64...

Update to tip/timers/core and resolve minor conflict.

Conflicts:
	drivers/clocksource/samsung_pwm_timer.c

Signed-off-by: John Stultz <john.stultz@linaro.org>

diff --git a/drivers/clocksource/bcm2835_timer.c b/drivers/clocksource/bcm2835_timer.c
index 07ea7ce900dc19a10491732927c162ae8212cda2..26ed331b1aad55be16f931f25f08f8a7e141cd25 100644 (file)
--- a/drivers/clocksource/bcm2835_timer.c
+++ b/drivers/clocksource/bcm2835_timer.c
@@ -49,7 +49,7 @@ struct bcm2835_timer {
 
 static void __iomem *system_clock __read_mostly;
 
-static u32 notrace bcm2835_sched_read(void)
+static u64 notrace bcm2835_sched_read(void)
 {
        return readl_relaxed(system_clock);
 }
@@ -110,7 +110,7 @@ static void __init bcm2835_timer_init(struct device_node *node)
                panic("Can't read clock-frequency");
 
        system_clock = base + REG_COUNTER_LO;
-       setup_sched_clock(bcm2835_sched_read, 32, freq);
+       sched_clock_register(bcm2835_sched_read, 32, freq);
 
        clocksource_mmio_init(base + REG_COUNTER_LO, node->name,
                freq, 300, 32, clocksource_mmio_readl_up);

diff --git a/drivers/clocksource/clksrc-dbx500-prcmu.c b/drivers/clocksource/clksrc-dbx500-prcmu.c
index a9fd4ad2567426228c34a5910bf457a6a4bb584a..b375106844d83e6bb2321e8768b02b92e2031efa 100644 (file)
--- a/drivers/clocksource/clksrc-dbx500-prcmu.c
+++ b/drivers/clocksource/clksrc-dbx500-prcmu.c
@@ -53,7 +53,7 @@ static struct clocksource clocksource_dbx500_prcmu = {
 
 #ifdef CONFIG_CLKSRC_DBX500_PRCMU_SCHED_CLOCK
 
-static u32 notrace dbx500_prcmu_sched_clock_read(void)
+static u64 notrace dbx500_prcmu_sched_clock_read(void)
 {
        if (unlikely(!clksrc_dbx500_timer_base))
                return 0;
@@ -81,8 +81,7 @@ void __init clksrc_dbx500_prcmu_init(void __iomem *base)
                       clksrc_dbx500_timer_base + PRCMU_TIMER_REF);
        }
 #ifdef CONFIG_CLKSRC_DBX500_PRCMU_SCHED_CLOCK
-       setup_sched_clock(dbx500_prcmu_sched_clock_read,
-                        32, RATE_32K);
+       sched_clock_register(dbx500_prcmu_sched_clock_read, 32, RATE_32K);
 #endif
        clocksource_register_hz(&clocksource_dbx500_prcmu, RATE_32K);
 }

diff --git a/drivers/clocksource/dw_apb_timer_of.c b/drivers/clocksource/dw_apb_timer_of.c
index 4cbae4f762b199db708a56d4814a8be578d14024..003b2309f463d0af1dc752366010a7a312f1b13e 100644 (file)
--- a/drivers/clocksource/dw_apb_timer_of.c
+++ b/drivers/clocksource/dw_apb_timer_of.c
@@ -106,7 +106,7 @@ static void add_clocksource(struct device_node *source_timer)
        sched_rate = rate;
 }
 
-static u32 read_sched_clock(void)
+static u64 read_sched_clock(void)
 {
        return __raw_readl(sched_io_base);
 }
@@ -128,7 +128,7 @@ static void init_sched_clock(void)
                of_node_put(sched_timer);
        }
 
-       setup_sched_clock(read_sched_clock, 32, sched_rate);
+       sched_clock_register(read_sched_clock, 32, sched_rate);
 }
 
 static int num_called;

diff --git a/drivers/clocksource/mxs_timer.c b/drivers/clocksource/mxs_timer.c
index 0f5e65f74dc3ee5f9749c6c782628016bb884f97..445b68a01dc5b3d74d7fc5293e16363a8a9adda0 100644 (file)
--- a/drivers/clocksource/mxs_timer.c
+++ b/drivers/clocksource/mxs_timer.c
@@ -222,7 +222,7 @@ static struct clocksource clocksource_mxs = {
        .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
 };
 
-static u32 notrace mxs_read_sched_clock_v2(void)
+static u64 notrace mxs_read_sched_clock_v2(void)
 {
        return ~readl_relaxed(mxs_timrot_base + HW_TIMROT_RUNNING_COUNTn(1));
 }
@@ -236,7 +236,7 @@ static int __init mxs_clocksource_init(struct clk *timer_clk)
        else {
                clocksource_mmio_init(mxs_timrot_base + HW_TIMROT_RUNNING_COUNTn(1),
                        "mxs_timer", c, 200, 32, clocksource_mmio_readl_down);
-               setup_sched_clock(mxs_read_sched_clock_v2, 32, c);
+               sched_clock_register(mxs_read_sched_clock_v2, 32, c);
        }
 
        return 0;

diff --git a/drivers/clocksource/nomadik-mtu.c b/drivers/clocksource/nomadik-mtu.c
index 1b74bea12385a20acd695f2d422665be1dfd90f3..ed7b73b508e096bb06a3e87a1843aa813f835430 100644 (file)
--- a/drivers/clocksource/nomadik-mtu.c
+++ b/drivers/clocksource/nomadik-mtu.c
@@ -76,7 +76,7 @@ static struct delay_timer mtu_delay_timer;
  * local implementation which uses the clocksource to get some
  * better resolution when scheduling the kernel.
  */
-static u32 notrace nomadik_read_sched_clock(void)
+static u64 notrace nomadik_read_sched_clock(void)
 {
        if (unlikely(!mtu_base))
                return 0;
@@ -231,7 +231,7 @@ static void __init __nmdk_timer_init(void __iomem *base, int irq,
                       "mtu_0");
 
 #ifdef CONFIG_CLKSRC_NOMADIK_MTU_SCHED_CLOCK
-       setup_sched_clock(nomadik_read_sched_clock, 32, rate);
+       sched_clock_register(nomadik_read_sched_clock, 32, rate);
 #endif
 
        /* Timer 1 is used for events, register irq and clockevents */

diff --git a/drivers/clocksource/samsung_pwm_timer.c b/drivers/clocksource/samsung_pwm_timer.c
index ab29476ee5f9e21dd85de872a45df747dec4a0e4..85082e8d305298ac41b085df4bdb493aca95c682 100644 (file)
--- a/drivers/clocksource/samsung_pwm_timer.c
+++ b/drivers/clocksource/samsung_pwm_timer.c
@@ -331,7 +331,7 @@ static struct clocksource samsung_clocksource = {
  * this wraps around for now, since it is just a relative time
  * stamp. (Inspired by U300 implementation.)
  */
-static u32 notrace samsung_read_sched_clock(void)
+static u64 notrace samsung_read_sched_clock(void)
 {
        return samsung_clocksource_read(NULL);
 }
@@ -357,7 +357,7 @@ static void __init samsung_clocksource_init(void)
        else
                pwm.source_reg = pwm.base + pwm.source_id * 0x0c + 0x14;
 
-       setup_sched_clock(samsung_read_sched_clock,
+       sched_clock_register(samsung_read_sched_clock,
                                                pwm.variant.bits, clock_rate);
 
        samsung_clocksource.mask = CLOCKSOURCE_MASK(pwm.variant.bits);

diff --git a/drivers/clocksource/tegra20_timer.c b/drivers/clocksource/tegra20_timer.c
index 93961703b887e9a82ccde7d42bd981ce5b7a83aa..5cff61677b6c1472c3bcbac32394b5deff516a30 100644 (file)
--- a/drivers/clocksource/tegra20_timer.c
+++ b/drivers/clocksource/tegra20_timer.c
@@ -98,7 +98,7 @@ static struct clock_event_device tegra_clockevent = {
        .set_mode       = tegra_timer_set_mode,
 };
 
-static u32 notrace tegra_read_sched_clock(void)
+static u64 notrace tegra_read_sched_clock(void)
 {
        return timer_readl(TIMERUS_CNTR_1US);
 }
@@ -200,7 +200,7 @@ static void __init tegra20_init_timer(struct device_node *np)
                WARN(1, "Unknown clock rate");
        }
 
-       setup_sched_clock(tegra_read_sched_clock, 32, 1000000);
+       sched_clock_register(tegra_read_sched_clock, 32, 1000000);
 
        if (clocksource_mmio_init(timer_reg_base + TIMERUS_CNTR_1US,
                "timer_us", 1000000, 300, 32, clocksource_mmio_readl_up)) {

diff --git a/drivers/clocksource/time-armada-370-xp.c b/drivers/clocksource/time-armada-370-xp.c
index 0198504ef6b02388c8847bc4897eca4e58328479..d8e47e5027858faf9f99c0b3ad99883bd7bc9cc2 100644 (file)
--- a/drivers/clocksource/time-armada-370-xp.c
+++ b/drivers/clocksource/time-armada-370-xp.c
@@ -96,7 +96,7 @@ static void local_timer_ctrl_clrset(u32 clr, u32 set)
                local_base + TIMER_CTRL_OFF);
 }
 
-static u32 notrace armada_370_xp_read_sched_clock(void)
+static u64 notrace armada_370_xp_read_sched_clock(void)
 {
        return ~readl(timer_base + TIMER0_VAL_OFF);
 }
@@ -258,7 +258,7 @@ static void __init armada_370_xp_timer_common_init(struct device_node *np)
        /*
         * Set scale and timer for sched_clock.
         */
-       setup_sched_clock(armada_370_xp_read_sched_clock, 32, timer_clk);
+       sched_clock_register(armada_370_xp_read_sched_clock, 32, timer_clk);
 
        /*
         * Setup free-running clocksource timer (interrupts

diff --git a/drivers/clocksource/timer-prima2.c b/drivers/clocksource/timer-prima2.c
index ef3cfb269d8bce34091e1fde228da32821d41925..8a492d34ff9f52813655b056bad5c17f9c305220 100644 (file)
--- a/drivers/clocksource/timer-prima2.c
+++ b/drivers/clocksource/timer-prima2.c
@@ -165,9 +165,9 @@ static struct irqaction sirfsoc_timer_irq = {
 };
 
 /* Overwrite weak default sched_clock with more precise one */
-static u32 notrace sirfsoc_read_sched_clock(void)
+static u64 notrace sirfsoc_read_sched_clock(void)
 {
-       return (u32)(sirfsoc_timer_read(NULL) & 0xffffffff);
+       return sirfsoc_timer_read(NULL);
 }
 
 static void __init sirfsoc_clockevent_init(void)
@@ -206,7 +206,7 @@ static void __init sirfsoc_prima2_timer_init(struct device_node *np)
 
        BUG_ON(clocksource_register_hz(&sirfsoc_clocksource, CLOCK_TICK_RATE));
 
-       setup_sched_clock(sirfsoc_read_sched_clock, 32, CLOCK_TICK_RATE);
+       sched_clock_register(sirfsoc_read_sched_clock, 64, CLOCK_TICK_RATE);
 
        BUG_ON(setup_irq(sirfsoc_timer_irq.irq, &sirfsoc_timer_irq));
 

diff --git a/drivers/clocksource/vf_pit_timer.c b/drivers/clocksource/vf_pit_timer.c
index 587e0202a70b263677abe66f2eff513fe491619a..02821b06a39e33be4cb403b202286deb530ff399 100644 (file)
--- a/drivers/clocksource/vf_pit_timer.c
+++ b/drivers/clocksource/vf_pit_timer.c
@@ -52,7 +52,7 @@ static inline void pit_irq_acknowledge(void)
        __raw_writel(PITTFLG_TIF, clkevt_base + PITTFLG);
 }
 
-static unsigned int pit_read_sched_clock(void)
+static u64 pit_read_sched_clock(void)
 {
        return __raw_readl(clksrc_base + PITCVAL);
 }
@@ -64,7 +64,7 @@ static int __init pit_clocksource_init(unsigned long rate)
        __raw_writel(~0UL, clksrc_base + PITLDVAL);
        __raw_writel(PITTCTRL_TEN, clksrc_base + PITTCTRL);
 
-       setup_sched_clock(pit_read_sched_clock, 32, rate);
+       sched_clock_register(pit_read_sched_clock, 32, rate);
        return clocksource_mmio_init(clksrc_base + PITCVAL, "vf-pit", rate,
                        300, 32, clocksource_mmio_readl_down);
 }