ENGR00306443-1 mx6sx:Update the gc400t QoS

(cherry-pick from f3f7f04e644d20c6483232eeb8da91ad8905d23b)

conflict: arch/arm/match-imx/match-imx6sx.c
Some patches have not been moved from 3.10 to 3.14. Rewrite the logic
as what the pre-commit has done and resolve the conflict.

Date Feb 2, 2015

Signed-off-by: Shawn Xiao <b49994@freescale.com>

diff --git a/arch/arm/mach-imx/mach-imx6sx.c b/arch/arm/mach-imx/mach-imx6sx.c
index ddf6aec84a620e80c80f9747c5ab2c2152d2abd2..3b3da5242c70af9d0b4d2a9c0d9c43087cf424ad 100755 (executable)
--- a/arch/arm/mach-imx/mach-imx6sx.c
+++ b/arch/arm/mach-imx/mach-imx6sx.c
@@ -9,6 +9,7 @@
 #include <linux/can/platform/flexcan.h>
 #include <linux/gpio.h>
 #include <linux/irqchip.h>
+#include <linux/of_address.h>
 #include <linux/of_gpio.h>
 #include <linux/of_platform.h>
 #include <linux/phy.h>
@@ -233,6 +234,23 @@ static const struct of_dev_auxdata imx6sx_auxdata_lookup[] __initconst = {
        { /* sentinel */ }
 };
 
+static inline void imx6sx_qos_init(void)
+{
+       struct device_node *np;
+       void   __iomem *src_base;
+
+       np = of_find_compatible_node(NULL, NULL, "fsl,imx6sx-qosc");
+       if (!np)
+               return;
+       src_base = of_iomap(np, 0);
+       writel_relaxed(0, src_base); /* Disable clkgate & soft_rst */
+       writel_relaxed(0, src_base+0x60); /* Enable all masters */
+       writel_relaxed(0, src_base+0x1400); /* Disable clkgate & soft_rst for gpu */
+       writel_relaxed(0x0f000222, src_base+0x1400+0xd0); /* Set Write QoS 2 for gpu */
+       writel_relaxed(0x0f000822, src_base+0x1400+0xe0); /* Set Read QoS 8 for gpu */
+       return;
+}
+
 static void __init imx6sx_init_machine(void)
 {
        struct device *parent;
@@ -249,6 +267,7 @@ static void __init imx6sx_init_machine(void)
        imx6sx_enet_init();
        imx_anatop_init();
        imx6sx_pm_init();
+       imx6sx_qos_init();
 }
 
 static void __init imx6sx_init_irq(void)