serial: 8250_dw: fix wrong logic in dw8250_check_lcr()

Commit cdcea058e510 ("serial: 8250_dw: Avoid serial_outx code duplicate
with new dw8250_check_lcr()") introduce a wrong logic when write val to
LCR reg. When CONFIG_64BIT enabled, __raw_writeq is used unconditionally.

The __raw_readq/__raw_writeq is introduced by commit bca2092d7897 ("serial:
8250_dw: Use 64-bit access for OCTEON.") for OCTEON.

So for 64BIT && !PORT_OCTEON, we better to use coincident write function.

Fixes: cdcea058e510("serial: 8250_dw: Avoid serial_outx code duplicate with new dw8250_check_lcr()")
Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c
index 5364de35447b361193553b8c631ff9b0fb923a59..e19969614203580a6f840d79e1d779dacde663d6 100644 (file)
--- a/drivers/tty/serial/8250/8250_dw.c
+++ b/drivers/tty/serial/8250/8250_dw.c
@@ -104,15 +104,16 @@ static void dw8250_check_lcr(struct uart_port *p, int value)
                dw8250_force_idle(p);
 
 #ifdef CONFIG_64BIT
-               __raw_writeq(value & 0xff, offset);
-#else
+               if (p->type == PORT_OCTEON)
+                       __raw_writeq(value & 0xff, offset);
+               else
+#endif
                if (p->iotype == UPIO_MEM32)
                        writel(value, offset);
                else if (p->iotype == UPIO_MEM32BE)
                        iowrite32be(value, offset);
                else
                        writeb(value, offset);
-#endif
        }
        /*
         * FIXME: this deadlocks if port->lock is already held