x86, amd: Check X86_FEATURE_OSVW bit before accessing OSVW MSRs

commit f01487119dda3d9f58c9729c7361ecc50a61c188 upstream.

If host CPU is exposed to a guest the OSVW MSRs are not guaranteed
to be present and a GP fault occurs. Thus checking the feature flag is
essential.

Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com>
LKML-Reference: <20100427101348.GC4489@alberich.amd.com>
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>

diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
index 999c8a6a4e7a45b945f9d9ba3d72516e39f2fde7..0571b72d012a1146d068f11f0ed6749d8127bfc8 100644 (file)
--- a/arch/x86/kernel/process.c
+++ b/arch/x86/kernel/process.c
@@ -539,11 +539,13 @@ static int __cpuinit check_c1e_idle(const struct cpuinfo_x86 *c)
                 * check OSVW bit for CPUs that are not affected
                 * by erratum #400
                 */
-               rdmsrl(MSR_AMD64_OSVW_ID_LENGTH, val);
-               if (val >= 2) {
-                       rdmsrl(MSR_AMD64_OSVW_STATUS, val);
-                       if (!(val & BIT(1)))
-                               goto no_c1e_idle;
+               if (cpu_has(c, X86_FEATURE_OSVW)) {
+                       rdmsrl(MSR_AMD64_OSVW_ID_LENGTH, val);
+                       if (val >= 2) {
+                               rdmsrl(MSR_AMD64_OSVW_STATUS, val);
+                               if (!(val & BIT(1)))
+                                       goto no_c1e_idle;
+                       }
                }
                return 1;
        }