Merge remote-tracking branch 'renesas/next'

diff --git a/Documentation/devicetree/bindings/clock/emev2-clock.txt b/Documentation/devicetree/bindings/clock/emev2-clock.txt
new file mode 100644 (file)
index 0000000..60bbb1a
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/emev2-clock.txt
@@ -0,0 +1,98 @@
+Device tree Clock bindings for Renesas EMMA Mobile EV2
+
+This binding uses the common clock binding.
+
+* SMU
+System Management Unit described in user's manual R19UH0037EJ1000_SMU.
+This is not a clock provider, but clocks under SMU depend on it.
+
+Required properties:
+- compatible: Should be "renesas,emev2-smu"
+- reg: Address and Size of SMU registers
+
+* SMU_CLKDIV
+Function block with an input mux and a divider, which corresponds to
+"Serial clock generator" in fig."Clock System Overview" of the manual,
+and "xxx frequency division setting register" (XXXCLKDIV) registers.
+This makes internal (neither input nor output) clock that is provided
+to input of xxxGCLK block.
+
+Required properties:
+- compatible: Should be "renesas,emev2-smu-clkdiv"
+- reg: Byte offset from SMU base and Bit position in the register
+- clocks: Parent clocks. Input clocks as described in clock-bindings.txt
+- #clock-cells: Should be <0>
+
+* SMU_GCLK
+Clock gating node shown as "Clock stop processing block" in the
+fig."Clock System Overview" of the manual.
+Registers are "xxx clock gate control register" (XXXGCLKCTRL).
+
+Required properties:
+- compatible: Should be "renesas,emev2-smu-gclk"
+- reg: Byte offset from SMU base and Bit position in the register
+- clocks: Input clock as described in clock-bindings.txt
+- #clock-cells: Should be <0>
+
+Example of provider:
+
+usia_u0_sclkdiv: usia_u0_sclkdiv {
+       compatible = "renesas,emev2-smu-clkdiv";
+       reg = <0x610 0>;
+       clocks = <&pll3_fo>, <&pll4_fo>, <&pll1_fo>, <&osc1_fo>;
+       #clock-cells = <0>;
+};
+
+usia_u0_sclk: usia_u0_sclk {
+       compatible = "renesas,emev2-smu-gclk";
+       reg = <0x4a0 1>;
+       clocks = <&usia_u0_sclkdiv>;
+       #clock-cells = <0>;
+};
+
+Example of consumer:
+
+uart@e1020000 {
+       compatible = "renesas,em-uart";
+       reg = <0xe1020000 0x38>;
+       interrupts = <0 8 0>;
+       clocks = <&usia_u0_sclk>;
+       clock-names = "sclk";
+};
+
+Example of clock-tree description:
+
+ This describes a clock path in the clock tree
+  c32ki -> pll3_fo -> usia_u0_sclkdiv -> usia_u0_sclk
+
+smu@e0110000 {
+       compatible = "renesas,emev2-smu";
+       reg = <0xe0110000 0x10000>;
+       #address-cells = <2>;
+       #size-cells = <0>;
+
+       c32ki: c32ki {
+               compatible = "fixed-clock";
+               clock-frequency = <32768>;
+               #clock-cells = <0>;
+       };
+       pll3_fo: pll3_fo {
+               compatible = "fixed-factor-clock";
+               clocks = <&c32ki>;
+               clock-div = <1>;
+               clock-mult = <7000>;
+               #clock-cells = <0>;
+       };
+       usia_u0_sclkdiv: usia_u0_sclkdiv {
+               compatible = "renesas,emev2-smu-clkdiv";
+               reg = <0x610 0>;
+               clocks = <&pll3_fo>;
+               #clock-cells = <0>;
+       };
+       usia_u0_sclk: usia_u0_sclk {
+               compatible = "renesas,emev2-smu-gclk";
+               reg = <0x4a0 1>;
+               clocks = <&usia_u0_sclkdiv>;
+               #clock-cells = <0>;
+       };
+};

diff --git a/arch/arm/configs/genmai_defconfig b/arch/arm/configs/genmai_defconfig
new file mode 100644 (file)
index 0000000..69b1531
--- /dev/null
+++ b/arch/arm/configs/genmai_defconfig
@@ -0,0 +1,116 @@
+CONFIG_SYSVIPC=y
+CONFIG_NO_HZ=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=16
+CONFIG_CC_OPTIMIZE_FOR_SIZE=y
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_EMBEDDED=y
+CONFIG_PERF_EVENTS=y
+CONFIG_SLAB=y
+# CONFIG_LBDAF is not set
+# CONFIG_BLK_DEV_BSG is not set
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+CONFIG_ARCH_SHMOBILE=y
+CONFIG_ARCH_R7S72100=y
+CONFIG_MACH_GENMAI=y
+# CONFIG_SH_TIMER_CMT is not set
+# CONFIG_SH_TIMER_MTU2 is not set
+# CONFIG_SH_TIMER_TMU is not set
+# CONFIG_EM_TIMER_STI is not set
+CONFIG_ARM_ERRATA_430973=y
+CONFIG_ARM_ERRATA_458693=y
+CONFIG_ARM_ERRATA_460075=y
+CONFIG_ARM_ERRATA_743622=y
+CONFIG_ARM_ERRATA_754322=y
+CONFIG_AEABI=y
+# CONFIG_OABI_COMPAT is not set
+CONFIG_FORCE_MAX_ZONEORDER=13
+CONFIG_ZBOOT_ROM_TEXT=0x0
+CONFIG_ZBOOT_ROM_BSS=0x0
+CONFIG_ARM_APPENDED_DTB=y
+CONFIG_KEXEC=y
+CONFIG_AUTO_ZRELADDR=y
+CONFIG_VFP=y
+CONFIG_NEON=y
+# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
+CONFIG_PM_RUNTIME=y
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
+# CONFIG_INET_XFRM_MODE_TUNNEL is not set
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+# CONFIG_INET_DIAG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_WIRELESS is not set
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_NETDEVICES=y
+# CONFIG_NET_CORE is not set
+# CONFIG_NET_VENDOR_ARC is not set
+# CONFIG_NET_CADENCE is not set
+# CONFIG_NET_VENDOR_BROADCOM is not set
+# CONFIG_NET_VENDOR_CIRRUS is not set
+# CONFIG_NET_VENDOR_FARADAY is not set
+# CONFIG_NET_VENDOR_INTEL is not set
+# CONFIG_NET_VENDOR_MARVELL is not set
+# CONFIG_NET_VENDOR_MICREL is not set
+# CONFIG_NET_VENDOR_NATSEMI is not set
+CONFIG_SH_ETH=y
+# CONFIG_NET_VENDOR_SEEQ is not set
+# CONFIG_NET_VENDOR_SMSC is not set
+# CONFIG_NET_VENDOR_STMICRO is not set
+# CONFIG_NET_VENDOR_VIA is not set
+# CONFIG_NET_VENDOR_WIZNET is not set
+# CONFIG_WLAN is not set
+# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
+CONFIG_INPUT_EVDEV=y
+# CONFIG_KEYBOARD_ATKBD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_SERIO is not set
+# CONFIG_LEGACY_PTYS is not set
+CONFIG_SERIAL_SH_SCI=y
+CONFIG_SERIAL_SH_SCI_NR_UARTS=10
+CONFIG_SERIAL_SH_SCI_CONSOLE=y
+# CONFIG_HW_RANDOM is not set
+CONFIG_I2C_SH_MOBILE=y
+# CONFIG_HWMON is not set
+CONFIG_THERMAL=y
+CONFIG_RCAR_THERMAL=y
+CONFIG_REGULATOR=y
+CONFIG_REGULATOR_FIXED_VOLTAGE=y
+CONFIG_DRM=y
+CONFIG_DRM_RCAR_DU=y
+# CONFIG_USB_SUPPORT is not set
+CONFIG_MMC=y
+CONFIG_MMC_SDHI=y
+CONFIG_MMC_SH_MMCIF=y
+CONFIG_NEW_LEDS=y
+CONFIG_LEDS_CLASS=y
+CONFIG_RTC_CLASS=y
+CONFIG_DMADEVICES=y
+CONFIG_SH_DMAE=y
+# CONFIG_IOMMU_SUPPORT is not set
+# CONFIG_DNOTIFY is not set
+CONFIG_MSDOS_FS=y
+CONFIG_VFAT_FS=y
+CONFIG_TMPFS=y
+CONFIG_CONFIGFS_FS=y
+# CONFIG_MISC_FILESYSTEMS is not set
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3_ACL=y
+CONFIG_NFS_V4=y
+CONFIG_NFS_V4_1=y
+CONFIG_ROOT_NFS=y
+CONFIG_NLS_CODEPAGE_437=y
+CONFIG_NLS_ISO8859_1=y
+# CONFIG_ENABLE_WARN_DEPRECATED is not set
+# CONFIG_ENABLE_MUST_CHECK is not set
+# CONFIG_ARM_UNWIND is not set
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+# CONFIG_CRYPTO_HW is not set

diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index 7b111062ccba2d152e53d2093affce3f273ada2f..d25da26ad11382110537763e8c017ade78f79f00 100644 (file)
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -32,6 +32,7 @@ obj-$(CONFIG_ARCH_VT8500)     += clk-vt8500.o
 obj-$(CONFIG_ARCH_ZYNQ)                += zynq/
 obj-$(CONFIG_ARCH_TEGRA)       += tegra/
 obj-$(CONFIG_PLAT_SAMSUNG)     += samsung/
+obj-$(CONFIG_ARCH_SHMOBILE_MULTI)      += shmobile/
 
 obj-$(CONFIG_X86)              += x86/
 

diff --git a/drivers/clk/shmobile/Makefile b/drivers/clk/shmobile/Makefile
new file mode 100644 (file)
index 0000000..2240730
--- /dev/null
+++ b/drivers/clk/shmobile/Makefile
@@ -0,0 +1,3 @@
+obj-$(CONFIG_ARCH_EMEV2)       += clk-emev2.o
+# for emply built-in.o
+obj-n  := dummy

diff --git a/drivers/clk/shmobile/clk-emev2.c b/drivers/clk/shmobile/clk-emev2.c
new file mode 100644 (file)
index 0000000..6c7c929
--- /dev/null
+++ b/drivers/clk/shmobile/clk-emev2.c
@@ -0,0 +1,104 @@
+/*
+ * EMMA Mobile EV2 common clock framework support
+ *
+ * Copyright (C) 2013 Takashi Yoshii <takashi.yoshii.ze@renesas.com>
+ * Copyright (C) 2012 Magnus Damm
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+#include <linux/clk-provider.h>
+#include <linux/clkdev.h>
+#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+
+/* EMEV2 SMU registers */
+#define USIAU0_RSTCTRL 0x094
+#define USIBU1_RSTCTRL 0x0ac
+#define USIBU2_RSTCTRL 0x0b0
+#define USIBU3_RSTCTRL 0x0b4
+#define STI_RSTCTRL 0x124
+#define STI_CLKSEL 0x688
+
+static DEFINE_SPINLOCK(lock);
+
+/* not pretty, but hey */
+void __iomem *smu_base;
+
+static void __init emev2_smu_write(unsigned long value, int offs)
+{
+       BUG_ON(!smu_base || (offs >= PAGE_SIZE));
+       writel_relaxed(value, smu_base + offs);
+}
+
+static const struct of_device_id smu_id[] __initconst = {
+       { .compatible = "renesas,emev2-smu", },
+       {},
+};
+
+static void __init emev2_smu_init(void)
+{
+       struct device_node *np;
+
+       np = of_find_matching_node(NULL, smu_id);
+       BUG_ON(!np);
+       smu_base = of_iomap(np, 0);
+       BUG_ON(!smu_base);
+       of_node_put(np);
+
+       /* setup STI timer to run on 32.768 kHz and deassert reset */
+       emev2_smu_write(0, STI_CLKSEL);
+       emev2_smu_write(1, STI_RSTCTRL);
+
+       /* deassert reset for UART0->UART3 */
+       emev2_smu_write(2, USIAU0_RSTCTRL);
+       emev2_smu_write(2, USIBU1_RSTCTRL);
+       emev2_smu_write(2, USIBU2_RSTCTRL);
+       emev2_smu_write(2, USIBU3_RSTCTRL);
+}
+
+static void __init emev2_smu_clkdiv_init(struct device_node *np)
+{
+       u32 reg[2];
+       struct clk *clk;
+       const char *parent_name = of_clk_get_parent_name(np, 0);
+       if (WARN_ON(of_property_read_u32_array(np, "reg", reg, 2)))
+               return;
+       if (!smu_base)
+               emev2_smu_init();
+       clk = clk_register_divider(NULL, np->name, parent_name, 0,
+                                  smu_base + reg[0], reg[1], 8, 0, &lock);
+       of_clk_add_provider(np, of_clk_src_simple_get, clk);
+       clk_register_clkdev(clk, np->name, NULL);
+       pr_debug("## %s %s %p\n", __func__, np->name, clk);
+}
+CLK_OF_DECLARE(emev2_smu_clkdiv, "renesas,emev2-smu-clkdiv",
+               emev2_smu_clkdiv_init);
+
+static void __init emev2_smu_gclk_init(struct device_node *np)
+{
+       u32 reg[2];
+       struct clk *clk;
+       const char *parent_name = of_clk_get_parent_name(np, 0);
+       if (WARN_ON(of_property_read_u32_array(np, "reg", reg, 2)))
+               return;
+       if (!smu_base)
+               emev2_smu_init();
+       clk = clk_register_gate(NULL, np->name, parent_name, 0,
+                               smu_base + reg[0], reg[1], 0, &lock);
+       of_clk_add_provider(np, of_clk_src_simple_get, clk);
+       clk_register_clkdev(clk, np->name, NULL);
+       pr_debug("## %s %s %p\n", __func__, np->name, clk);
+}
+CLK_OF_DECLARE(emev2_smu_gclk, "renesas,emev2-smu-gclk", emev2_smu_gclk_init);

diff --git a/drivers/clocksource/em_sti.c b/drivers/clocksource/em_sti.c
index 3a5909c12d420dbbb6f54f011882303ba4a48a62..9d170834fcf3559a318becf709d34618505b1de7 100644 (file)
--- a/drivers/clocksource/em_sti.c
+++ b/drivers/clocksource/em_sti.c
@@ -78,7 +78,7 @@ static int em_sti_enable(struct em_sti_priv *p)
        int ret;
 
        /* enable clock */
-       ret = clk_enable(p->clk);
+       ret = clk_prepare_enable(p->clk);
        if (ret) {
                dev_err(&p->pdev->dev, "cannot enable clock\n");
                return ret;
@@ -107,7 +107,7 @@ static void em_sti_disable(struct em_sti_priv *p)
        em_sti_write(p, STI_INTENCLR, 3);
 
        /* stop clock */
-       clk_disable(p->clk);
+       clk_disable_unprepare(p->clk);
 }
 
 static cycle_t em_sti_count(struct em_sti_priv *p)