]> git.karo-electronics.de Git - karo-tx-linux.git/commitdiff
Merge remote-tracking branch 'idle/next'
authorThierry Reding <treding@nvidia.com>
Thu, 24 Oct 2013 12:34:06 +0000 (14:34 +0200)
committerThierry Reding <treding@nvidia.com>
Thu, 24 Oct 2013 12:34:06 +0000 (14:34 +0200)
1  2 
drivers/idle/intel_idle.c

index 33e599ebbe96ccb024239964b5938f1bad5aff15,d8c99e67d973ab06d665fc3abf55d1edce25c4c7..3a449f65eb2d3beb889217893a0e9d677214c1d9
@@@ -1,7 -1,7 +1,7 @@@
  /*
   * intel_idle.c - native hardware idle loop for modern Intel processors
   *
-  * Copyright (c) 2010, Intel Corporation.
+  * Copyright (c) 2013, Intel Corporation.
   * Len Brown <len.brown@intel.com>
   *
   * This program is free software; you can redistribute it and/or modify it
@@@ -123,7 -123,7 +123,7 @@@ static struct cpuidle_state *cpuidle_st
   * which is also the index into the MWAIT hint array.
   * Thus C0 is a dummy.
   */
 -static struct cpuidle_state nehalem_cstates[CPUIDLE_STATE_MAX] = {
 +static struct cpuidle_state nehalem_cstates[] __initdata = {
        {
                .name = "C1-NHM",
                .desc = "MWAIT 0x00",
                .enter = NULL }
  };
  
 -static struct cpuidle_state snb_cstates[CPUIDLE_STATE_MAX] = {
 +static struct cpuidle_state snb_cstates[] __initdata = {
        {
                .name = "C1-SNB",
                .desc = "MWAIT 0x00",
                .enter = NULL }
  };
  
 -static struct cpuidle_state ivb_cstates[CPUIDLE_STATE_MAX] = {
 +static struct cpuidle_state ivb_cstates[] __initdata = {
        {
                .name = "C1-IVB",
                .desc = "MWAIT 0x00",
                .enter = NULL }
  };
  
 -static struct cpuidle_state hsw_cstates[CPUIDLE_STATE_MAX] = {
 +static struct cpuidle_state hsw_cstates[] __initdata = {
        {
                .name = "C1-HSW",
                .desc = "MWAIT 0x00",
                .enter = NULL }
  };
  
 -static struct cpuidle_state atom_cstates[CPUIDLE_STATE_MAX] = {
 +static struct cpuidle_state atom_cstates[] __initdata = {
        {
                .name = "C1E-ATM",
                .desc = "MWAIT 0x00",
        {
                .enter = NULL }
  };
+ static struct cpuidle_state avn_cstates[CPUIDLE_STATE_MAX] = {
+       {
+               .name = "C1-AVN",
+               .desc = "MWAIT 0x00",
+               .flags = MWAIT2flg(0x00) | CPUIDLE_FLAG_TIME_VALID,
+               .exit_latency = 1,
+               .target_residency = 1,
+               .enter = &intel_idle },
+       {
+               .name = "C1E-AVN",
+               .desc = "MWAIT 0x01",
+               .flags = MWAIT2flg(0x00) | CPUIDLE_FLAG_TIME_VALID,
+               .exit_latency = 5,
+               .target_residency = 10,
+               .enter = &intel_idle },
+       {
+               .name = "C6NS-AVN",     /* No Cache Shrink */
+               .desc = "MWAIT 0x51",
+               .flags = MWAIT2flg(0x51) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
+               .exit_latency = 15,
+               .target_residency = 45,
+               .enter = &intel_idle },
+       {
+               .name = "C6FS-AVN",     /* Full Cache shrink */
+               .desc = "MWAIT 0x52",
+               .flags = MWAIT2flg(0x52) | CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED,
+               .exit_latency = 150,            /* fake penalty added due to cold cache */
+               .target_residency = 100000,     /* fake penalty added due to cold cache */
+               .enter = &intel_idle },
+ };
  
  /**
   * intel_idle
@@@ -462,6 -492,11 +492,11 @@@ static const struct idle_cpu idle_cpu_h
        .disable_promotion_to_c1e = true,
  };
  
+ static const struct idle_cpu idle_cpu_avn = {
+       .state_table = avn_cstates,
+       .disable_promotion_to_c1e = true,
+ };
  #define ICPU(model, cpu) \
        { X86_VENDOR_INTEL, 6, model, X86_FEATURE_MWAIT, (unsigned long)&cpu }
  
@@@ -483,6 -518,7 +518,7 @@@ static const struct x86_cpu_id intel_id
        ICPU(0x3f, idle_cpu_hsw),
        ICPU(0x45, idle_cpu_hsw),
        ICPU(0x46, idle_cpu_hsw),
+       ICPU(0x4D, idle_cpu_avn),
        {}
  };
  MODULE_DEVICE_TABLE(x86cpu, intel_idle_ids);
  /*
   * intel_idle_probe()
   */
 -static int intel_idle_probe(void)
 +static int __init intel_idle_probe(void)
  {
        unsigned int eax, ebx, ecx;
        const struct x86_cpu_id *id;
@@@ -558,7 -594,7 +594,7 @@@ static void intel_idle_cpuidle_devices_
   * intel_idle_cpuidle_driver_init()
   * allocate, initialize cpuidle_states
   */
 -static int intel_idle_cpuidle_driver_init(void)
 +static int __init intel_idle_cpuidle_driver_init(void)
  {
        int cstate;
        struct cpuidle_driver *drv = &intel_idle_driver;
@@@ -628,7 -664,7 +664,7 @@@ static int intel_idle_cpu_init(int cpu
                int num_substates, mwait_hint, mwait_cstate, mwait_substate;
  
                if (cpuidle_state_table[cstate].enter == NULL)
 -                      continue;
 +                      break;
  
                if (cstate + 1 > max_cstate) {
                        printk(PREFIX "max_cstate %d reached\n", max_cstate);