ARM: dts: imx6qdl: don't configure reserved pad settings

Several dts files set a bit in the SPEED field for pads
RGMII_{R,T}{XC,D0,D1,D2,D3,X_CTL}, but that doesn't exist. Writing there
doesn't have an effect and the bit reads as zero.

Signed-off-by: Uwe Kleine-König <uwe@kleine-koenig.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/arch/arm/boot/dts/imx6dl-riotboard.dts b/arch/arm/boot/dts/imx6dl-riotboard.dts
index 2becd7cd654446fe8b06ab769d77464a8cf70829..75d73437adf7ee239425565d91eddf1dd35090a1 100644 (file)
--- a/arch/arm/boot/dts/imx6dl-riotboard.dts
+++ b/arch/arm/boot/dts/imx6dl-riotboard.dts
@@ -376,18 +376,18 @@
                        fsl,pins = <
                                MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
                                MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
-                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
+                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b030
+                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b030
+                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b030
+                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b030
+                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b030
+                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b030
                                MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x0a0b1         /* AR8035 CLK_25M --> ENET_REF_CLK (V22) */
-                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0         /* AR8035 pin strapping: IO voltage: pull up */
-                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x130b0         /* AR8035 pin strapping: PHYADDR#0: pull down */
-                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x130b0         /* AR8035 pin strapping: PHYADDR#1: pull down */
-                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0         /* AR8035 pin strapping: MODE#1: pull up */
-                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0         /* AR8035 pin strapping: MODE#3: pull up */
+                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030         /* AR8035 pin strapping: IO voltage: pull up */
+                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x13030         /* AR8035 pin strapping: PHYADDR#0: pull down */
+                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x13030         /* AR8035 pin strapping: PHYADDR#1: pull down */
+                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030         /* AR8035 pin strapping: MODE#1: pull up */
+                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030         /* AR8035 pin strapping: MODE#3: pull up */
                                MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x130b0         /* AR8035 pin strapping: MODE#0: pull down */
                                MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8      /* GPIO16 -> AR8035 25MHz */
                                MX6QDL_PAD_EIM_D31__GPIO3_IO31          0x130b0         /* RGMII_nRST */

diff --git a/arch/arm/boot/dts/imx6q-arm2.dts b/arch/arm/boot/dts/imx6q-arm2.dts
index d8acf15611e4f915c55a677474762e143024d73f..4989d0bff10f168c93ec98adec5bf1a8a1faab6e 100644 (file)
--- a/arch/arm/boot/dts/imx6q-arm2.dts
+++ b/arch/arm/boot/dts/imx6q-arm2.dts
@@ -79,19 +79,19 @@
                        fsl,pins = <
                                MX6QDL_PAD_KEY_COL1__ENET_MDIO          0x1b0b0
                                MX6QDL_PAD_KEY_COL2__ENET_MDC           0x1b0b0
-                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
+                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b030
+                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b030
+                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b030
+                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b030
+                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b030
+                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b030
                                MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
-                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
+                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
+                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b030
+                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b030
+                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
+                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
+                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
                                MX6QDL_PAD_GPIO_6__ENET_IRQ             0x000b1
                        >;
                };

diff --git a/arch/arm/boot/dts/imx6q-ba16.dtsi b/arch/arm/boot/dts/imx6q-ba16.dtsi
index f2adc60723da2f0057431880ff6024e052df6406..308e11cea1db47894efc943119b100add1c0078b 100644 (file)
--- a/arch/arm/boot/dts/imx6q-ba16.dtsi
+++ b/arch/arm/boot/dts/imx6q-ba16.dtsi
@@ -448,19 +448,19 @@
                fsl,pins = <
                        MX6QDL_PAD_ENET_MDIO__ENET_MDIO       0x100b0
                        MX6QDL_PAD_ENET_MDC__ENET_MDC         0x100b0
-                       MX6QDL_PAD_RGMII_TXC__RGMII_TXC       0x100b0
-                       MX6QDL_PAD_RGMII_TD0__RGMII_TD0       0x100b0
-                       MX6QDL_PAD_RGMII_TD1__RGMII_TD1       0x100b0
-                       MX6QDL_PAD_RGMII_TD2__RGMII_TD2       0x100b0
-                       MX6QDL_PAD_RGMII_TD3__RGMII_TD3       0x100b0
-                       MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x100b0
+                       MX6QDL_PAD_RGMII_TXC__RGMII_TXC       0x10030
+                       MX6QDL_PAD_RGMII_TD0__RGMII_TD0       0x10030
+                       MX6QDL_PAD_RGMII_TD1__RGMII_TD1       0x10030
+                       MX6QDL_PAD_RGMII_TD2__RGMII_TD2       0x10030
+                       MX6QDL_PAD_RGMII_TD3__RGMII_TD3       0x10030
+                       MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x10030
                        MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK  0x100b0
-                       MX6QDL_PAD_RGMII_RXC__RGMII_RXC       0x1b0b0
-                       MX6QDL_PAD_RGMII_RD0__RGMII_RD0       0x1b0b0
-                       MX6QDL_PAD_RGMII_RD1__RGMII_RD1       0x1b0b0
-                       MX6QDL_PAD_RGMII_RD2__RGMII_RD2       0x1b0b0
-                       MX6QDL_PAD_RGMII_RD3__RGMII_RD3       0x1b0b0
-                       MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
+                       MX6QDL_PAD_RGMII_RXC__RGMII_RXC       0x1b030
+                       MX6QDL_PAD_RGMII_RD0__RGMII_RD0       0x1b030
+                       MX6QDL_PAD_RGMII_RD1__RGMII_RD1       0x1b030
+                       MX6QDL_PAD_RGMII_RD2__RGMII_RD2       0x1b030
+                       MX6QDL_PAD_RGMII_RD3__RGMII_RD3       0x1b030
+                       MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
                        /* FEC Reset */
                        MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28     0x1b0b0
                        /* AR8033 Interrupt */

diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dts b/arch/arm/boot/dts/imx6q-cm-fx6.dts
index b5de7e620905cff46099c30fd111b46a23fdc80a..59bc5a4dce17b0586db94520d3b1a22efd3d0656 100644 (file)
--- a/arch/arm/boot/dts/imx6q-cm-fx6.dts
+++ b/arch/arm/boot/dts/imx6q-cm-fx6.dts
@@ -168,18 +168,18 @@
 
        pinctrl_enet: enetgrp {
                fsl,pins = <
-                       MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
-                       MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
-                       MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
-                       MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
-                       MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
-                       MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
-                       MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b0b0
-                       MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
-                       MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
-                       MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
-                       MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
-                       MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
+                       MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
+                       MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b030
+                       MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b030
+                       MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
+                       MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
+                       MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
+                       MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b030
+                       MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b030
+                       MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b030
+                       MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b030
+                       MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b030
+                       MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b030
                        MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
                        MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
                        MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0

diff --git a/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts b/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts
index 905907325f3b49302acb36f3d1a9e549ee196c81..908dab68bdca69c994599ebccca302434ec7666f 100644 (file)
--- a/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts
+++ b/arch/arm/boot/dts/imx6q-dmo-edmqmx6.dts
@@ -324,18 +324,18 @@
 
                pinctrl_enet: enetgrp {
                        fsl,pins = <
-                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
-                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
+                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
+                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b030
+                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b030
+                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
+                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
+                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
+                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b030
+                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b030
+                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b030
+                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b030
+                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b030
+                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b030
                                MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
                                MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
                                MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0

diff --git a/arch/arm/boot/dts/imx6q-evi.dts b/arch/arm/boot/dts/imx6q-evi.dts
index 4fa56019225e63e2f7ff5e772151ed053b4c8db1..9647c099acc6a4c4c56f7a04d485c552432c20fd 100644 (file)
--- a/arch/arm/boot/dts/imx6q-evi.dts
+++ b/arch/arm/boot/dts/imx6q-evi.dts
@@ -303,19 +303,19 @@
                fsl,pins = <
                        MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
                        MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
-                       MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
-                       MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
-                       MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
-                       MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
-                       MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
-                       MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
+                       MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
+                       MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
+                       MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
+                       MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
+                       MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
+                       MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
                        MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
-                       MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
-                       MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
-                       MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
-                       MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
-                       MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
-                       MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
+                       MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
+                       MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
+                       MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
+                       MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
+                       MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
+                       MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
                        MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x4001b0a8
                        MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b0b0
                >;

diff --git a/arch/arm/boot/dts/imx6q-gw5400-a.dts b/arch/arm/boot/dts/imx6q-gw5400-a.dts
index 0511137d1e235c92c504d30ccdf113ba95b76eca..747bc104ad00b884d8781991fc2911308a3ec797 100644 (file)
--- a/arch/arm/boot/dts/imx6q-gw5400-a.dts
+++ b/arch/arm/boot/dts/imx6q-gw5400-a.dts
@@ -421,18 +421,18 @@
 
                pinctrl_enet: enetgrp {
                        fsl,pins = <
-                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
-                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
+                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
+                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b030
+                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b030
+                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
+                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
+                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
+                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b030
+                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b030
+                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b030
+                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b030
+                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b030
+                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b030
                                MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
                                MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
                                MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0

diff --git a/arch/arm/boot/dts/imx6q-marsboard.dts b/arch/arm/boot/dts/imx6q-marsboard.dts
index 3f8013c85fb963d11c09bb7e6fb0313a9aa05455..f7995c513b678b90d189b0ca4fb0a9b9b5442c26 100644 (file)
--- a/arch/arm/boot/dts/imx6q-marsboard.dts
+++ b/arch/arm/boot/dts/imx6q-marsboard.dts
@@ -252,26 +252,26 @@
                fsl,pins = <
                        MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
                        MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
-                       MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b0b0
-                       MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
-                       MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
-                       MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
-                       MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
-                       MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
+                       MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b030
+                       MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b030
+                       MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b030
+                       MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b030
+                       MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b030
+                       MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b030
                        /* AR8035 CLK_25M --> ENET_REF_CLK (V22) */
                        MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x0a0b1
                        /* AR8035 pin strapping: IO voltage: pull up */
-                       MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
+                       MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
                        /* AR8035 pin strapping: PHYADDR#0: pull down */
-                       MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x130b0
+                       MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x13030
                        /* AR8035 pin strapping: PHYADDR#1: pull down */
-                       MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x130b0
+                       MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x13030
                        /* AR8035 pin strapping: MODE#1: pull up */
-                       MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
+                       MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
                        /* AR8035 pin strapping: MODE#3: pull up */
-                       MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
+                       MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
                        /* AR8035 pin strapping: MODE#0: pull down */
-                       MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x130b0
+                       MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x13030
                        /* GPIO16 -> AR8035 25MHz */
                        MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8
                        /* RGMII_nRST */

diff --git a/arch/arm/boot/dts/imx6q-novena.dts b/arch/arm/boot/dts/imx6q-novena.dts
index 5acd0c63b33ba616db881a589a701b1d768a1015..1723e89e3acce0ec95c58c1f3fac218356cf5b49 100644 (file)
--- a/arch/arm/boot/dts/imx6q-novena.dts
+++ b/arch/arm/boot/dts/imx6q-novena.dts
@@ -549,12 +549,12 @@
                        MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b028
                        MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b028
                        MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
-                       MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
-                       MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
-                       MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
-                       MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
-                       MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
-                       MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
+                       MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
+                       MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b030
+                       MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b030
+                       MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
+                       MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
+                       MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
                        MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8
                        /* Ethernet reset */
                        MX6QDL_PAD_EIM_D23__GPIO3_IO23          0x1b0b1

diff --git a/arch/arm/boot/dts/imx6q-sbc6x.dts b/arch/arm/boot/dts/imx6q-sbc6x.dts
index 86cf0936466425a67428a13bc1ca9f24a5592403..255733063ea4b5851db1c8573b3bb7110f68e35c 100644 (file)
--- a/arch/arm/boot/dts/imx6q-sbc6x.dts
+++ b/arch/arm/boot/dts/imx6q-sbc6x.dts
@@ -31,19 +31,19 @@
                        fsl,pins = <
                                MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
                                MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
-                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
+                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b030
+                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b030
+                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b030
+                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b030
+                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b030
+                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b030
                                MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
-                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
+                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
+                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b030
+                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b030
+                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
+                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
+                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
                                MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8
                        >;
                };

diff --git a/arch/arm/boot/dts/imx6q-tbs2910.dts b/arch/arm/boot/dts/imx6q-tbs2910.dts
index d7c8ccb2da953a9d05e8989d3b8926471d16f634..06f492e17ca70edc3de4aa21fbe5357397febaeb 100644 (file)
--- a/arch/arm/boot/dts/imx6q-tbs2910.dts
+++ b/arch/arm/boot/dts/imx6q-tbs2910.dts
@@ -284,19 +284,19 @@
                fsl,pins = <
                        MX6QDL_PAD_ENET_MDIO__ENET_MDIO       0x1b0b0
                        MX6QDL_PAD_ENET_MDC__ENET_MDC         0x1b0b0
-                       MX6QDL_PAD_RGMII_TXC__RGMII_TXC       0x1b0b0
-                       MX6QDL_PAD_RGMII_TD0__RGMII_TD0       0x1b0b0
-                       MX6QDL_PAD_RGMII_TD1__RGMII_TD1       0x1b0b0
-                       MX6QDL_PAD_RGMII_TD2__RGMII_TD2       0x1b0b0
-                       MX6QDL_PAD_RGMII_TD3__RGMII_TD3       0x1b0b0
-                       MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
+                       MX6QDL_PAD_RGMII_TXC__RGMII_TXC       0x1b030
+                       MX6QDL_PAD_RGMII_TD0__RGMII_TD0       0x1b030
+                       MX6QDL_PAD_RGMII_TD1__RGMII_TD1       0x1b030
+                       MX6QDL_PAD_RGMII_TD2__RGMII_TD2       0x1b030
+                       MX6QDL_PAD_RGMII_TD3__RGMII_TD3       0x1b030
+                       MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
                        MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK  0x1b0b0
-                       MX6QDL_PAD_RGMII_RXC__RGMII_RXC       0x1b0b0
-                       MX6QDL_PAD_RGMII_RD0__RGMII_RD0       0x1b0b0
-                       MX6QDL_PAD_RGMII_RD1__RGMII_RD1       0x1b0b0
-                       MX6QDL_PAD_RGMII_RD2__RGMII_RD2       0x1b0b0
-                       MX6QDL_PAD_RGMII_RD3__RGMII_RD3       0x1b0b0
-                       MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
+                       MX6QDL_PAD_RGMII_RXC__RGMII_RXC       0x1b030
+                       MX6QDL_PAD_RGMII_RD0__RGMII_RD0       0x1b030
+                       MX6QDL_PAD_RGMII_RD1__RGMII_RD1       0x1b030
+                       MX6QDL_PAD_RGMII_RD2__RGMII_RD2       0x1b030
+                       MX6QDL_PAD_RGMII_RD3__RGMII_RD3       0x1b030
+                       MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
                        MX6QDL_PAD_GPIO_16__ENET_REF_CLK      0x4001b0a8
                        MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25    0x1b059
                >;

diff --git a/arch/arm/boot/dts/imx6qdl-apalis.dtsi b/arch/arm/boot/dts/imx6qdl-apalis.dtsi
index 315e033ff1d8d5b3af1fb955f9815f5323b389d3..99e323b57261c047e7aa558289346926e2dab397 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl-apalis.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-apalis.dtsi
@@ -586,19 +586,19 @@
                fsl,pins = <
                        MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x100b0
                        MX6QDL_PAD_ENET_MDC__ENET_MDC           0x100b0
-                       MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x100b0
-                       MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x100b0
-                       MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x100b0
-                       MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x100b0
-                       MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x100b0
-                       MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x100b0
+                       MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x10030
+                       MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x10030
+                       MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x10030
+                       MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x10030
+                       MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x10030
+                       MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x10030
                        MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x100b0
-                       MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
-                       MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
-                       MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
-                       MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
-                       MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
-                       MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
+                       MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
+                       MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b030
+                       MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b030
+                       MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
+                       MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
+                       MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
                        /* Ethernet PHY reset */
                        MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25      0x000b0
                        /* Ethernet PHY interrupt */

diff --git a/arch/arm/boot/dts/imx6qdl-dfi-fs700-m60.dtsi b/arch/arm/boot/dts/imx6qdl-dfi-fs700-m60.dtsi
index da1341d47b141d6e30d7e28d8e5d798e35c9c656..b2c083d57598b71cee59df2437ab7aeaa2b4917d 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl-dfi-fs700-m60.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-dfi-fs700-m60.dtsi
@@ -67,18 +67,18 @@
 
                pinctrl_enet: enetgrp {
                        fsl,pins = <
-                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
-                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
+                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
+                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b030
+                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b030
+                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
+                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
+                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
+                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b030
+                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b030
+                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b030
+                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b030
+                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b030
+                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b030
                                MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
                                MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
                                MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0

diff --git a/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi b/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi
index 1340e2760406f507faeb581d78647f1374338d29..afec2c7628ef5d42dfbfbed6e8033e730328d205 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi
@@ -238,18 +238,18 @@
        imx6qdl-gw51xx {
                pinctrl_enet: enetgrp {
                        fsl,pins = <
-                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
-                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
+                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
+                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b030
+                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b030
+                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
+                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
+                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
+                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b030
+                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b030
+                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b030
+                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b030
+                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b030
+                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b030
                                MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
                                MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
                                MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0

diff --git a/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi b/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
index 8bf1020affa0b68a1324986ab5ab396380db7688..208e3c29116529bf22b1002efc6f766e603fdfd0 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
@@ -382,18 +382,18 @@
 
                pinctrl_enet: enetgrp {
                        fsl,pins = <
-                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
-                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
+                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
+                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b030
+                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b030
+                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
+                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
+                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
+                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b030
+                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b030
+                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b030
+                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b030
+                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b030
+                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b030
                                MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
                                MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
                                MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0

diff --git a/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi b/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
index a3dd0c41b995c5b2667b60cd8c0b4aaa77ee9e78..35b9e808a4bb77246f1a6d553bfd8bbd0aa06119 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
@@ -371,18 +371,18 @@
 
                pinctrl_enet: enetgrp {
                        fsl,pins = <
-                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
-                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
+                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
+                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b030
+                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b030
+                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
+                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
+                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
+                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b030
+                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b030
+                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b030
+                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b030
+                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b030
+                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b030
                                MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
                                MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
                                MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0

diff --git a/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi b/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
index 5a8dbabbd20f21f352988bba856f585b285247ff..5f8f1ea6d2a23cb80c2a562e6495fcb04a03a0f0 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
@@ -478,18 +478,18 @@
 
                pinctrl_enet: enetgrp {
                        fsl,pins = <
-                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
-                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
+                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
+                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b030
+                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b030
+                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
+                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
+                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
+                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b030
+                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b030
+                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b030
+                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b030
+                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b030
+                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b030
                                MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
                                MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
                                MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0

diff --git a/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
index f8d945a56525799eb5b38243d7ed2da34eb76c0c..d5c3aa88adbe864e3950fe07e348ac6345232061 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-icore-rqs.dtsi
@@ -254,19 +254,19 @@
                fsl,pins = <
                        MX6QDL_PAD_ENET_MDIO__ENET_MDIO       0x1b0b0
                        MX6QDL_PAD_ENET_MDC__ENET_MDC         0x1b0b0
-                       MX6QDL_PAD_RGMII_TXC__RGMII_TXC       0x1b0b0
-                       MX6QDL_PAD_RGMII_TD0__RGMII_TD0       0x1b0b0
-                       MX6QDL_PAD_RGMII_TD1__RGMII_TD1       0x1b0b0
-                       MX6QDL_PAD_RGMII_TD2__RGMII_TD2       0x1b0b0
-                       MX6QDL_PAD_RGMII_TD3__RGMII_TD3       0x1b0b0
-                       MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
+                       MX6QDL_PAD_RGMII_TXC__RGMII_TXC       0x1b030
+                       MX6QDL_PAD_RGMII_TD0__RGMII_TD0       0x1b030
+                       MX6QDL_PAD_RGMII_TD1__RGMII_TD1       0x1b030
+                       MX6QDL_PAD_RGMII_TD2__RGMII_TD2       0x1b030
+                       MX6QDL_PAD_RGMII_TD3__RGMII_TD3       0x1b030
+                       MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
                        MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK  0x1b0b0
-                       MX6QDL_PAD_RGMII_RXC__RGMII_RXC       0x1b0b0
-                       MX6QDL_PAD_RGMII_RD0__RGMII_RD0       0x1b0b0
-                       MX6QDL_PAD_RGMII_RD1__RGMII_RD1       0x1b0b0
-                       MX6QDL_PAD_RGMII_RD2__RGMII_RD2       0x1b0b0
-                       MX6QDL_PAD_RGMII_RD3__RGMII_RD3       0x1b0b0
-                       MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
+                       MX6QDL_PAD_RGMII_RXC__RGMII_RXC       0x1b030
+                       MX6QDL_PAD_RGMII_RD0__RGMII_RD0       0x1b030
+                       MX6QDL_PAD_RGMII_RD1__RGMII_RD1       0x1b030
+                       MX6QDL_PAD_RGMII_RD2__RGMII_RD2       0x1b030
+                       MX6QDL_PAD_RGMII_RD3__RGMII_RD3       0x1b030
+                       MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
                        MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN     0x1b0b0
                >;
        };

diff --git a/arch/arm/boot/dts/imx6qdl-nit6xlite.dtsi b/arch/arm/boot/dts/imx6qdl-nit6xlite.dtsi
index cfd50ea1ed480bf6990ecbbf2c193cf8b0ce174d..880bd782a5b70ac510d8a40855b32845e7ce59bd 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl-nit6xlite.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-nit6xlite.dtsi
@@ -361,12 +361,12 @@
                                MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x100b0
                                MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x100b0
                                MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x100b0
-                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
+                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
+                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b030
+                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b030
+                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
+                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
+                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
                                /* Phy reset */
                                MX6QDL_PAD_ENET_RXD0__GPIO1_IO27        0x0f0b0
                                MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28       0x1b0b0

diff --git a/arch/arm/boot/dts/imx6qdl-nitrogen6_max.dtsi b/arch/arm/boot/dts/imx6qdl-nitrogen6_max.dtsi
index 9677bf323823f5d7c10e41129cc7e69520565ae2..b0b3220a1fd90530586b29e84fe276ee79858844 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl-nitrogen6_max.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-nitrogen6_max.dtsi
@@ -484,19 +484,19 @@
                        fsl,pins = <
                                MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x100b0
                                MX6QDL_PAD_ENET_MDC__ENET_MDC           0x100b0
-                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x100b0
-                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x100b0
-                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x100b0
-                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x100b0
-                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x100b0
-                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x100b0
+                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x10030
+                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x10030
+                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x10030
+                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x10030
+                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x10030
+                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x10030
                                MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x100b0
-                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
+                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
+                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b030
+                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b030
+                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
+                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
+                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
                                /* Phy reset */
                                MX6QDL_PAD_ENET_RXD0__GPIO1_IO27        0x0f0b0
                                MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28       0x1b0b0

diff --git a/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi b/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi
index 97d9c333902b5be5ad2cc7c64bad77ba5da7e248..db868bc42c0f0b7316b8a1ad62c21629b002865a 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi
@@ -394,19 +394,19 @@
                        fsl,pins = <
                                MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x100b0
                                MX6QDL_PAD_ENET_MDC__ENET_MDC           0x100b0
-                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x100b0
-                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x100b0
-                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x100b0
-                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x100b0
-                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x100b0
-                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x100b0
+                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x10030
+                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x10030
+                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x10030
+                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x10030
+                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x10030
+                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x10030
                                MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x100b0
-                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
+                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
+                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b030
+                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b030
+                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
+                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
+                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
                                /* Phy reset */
                                MX6QDL_PAD_ENET_RXD0__GPIO1_IO27        0x000b0
                                MX6QDL_PAD_GPIO_6__ENET_IRQ             0x000b1

diff --git a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
index d6d98d4263847e1ec6429d1a88fc2de40ebd36d0..e4b894c61a95fb902e8b1eaa30a85f40fb5d8b6d 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
@@ -231,19 +231,19 @@
                        fsl,pins = <
                                MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
                                MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
-                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
+                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b030
+                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b030
+                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b030
+                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b030
+                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b030
+                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b030
                                MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
-                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
+                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
+                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b030
+                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b030
+                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
+                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
+                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
                                MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN       0x1b0b0
                        >;
                };

diff --git a/arch/arm/boot/dts/imx6qdl-rex.dtsi b/arch/arm/boot/dts/imx6qdl-rex.dtsi
index cacf5933707d3002f0fae193d61a35cb52ff38f4..17704a5c1bcb5c332e02dfd0b0914ff2d94c18c5 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl-rex.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-rex.dtsi
@@ -196,19 +196,19 @@
                        fsl,pins = <
                                MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
                                MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
-                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
+                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b030
+                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b030
+                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b030
+                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b030
+                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b030
+                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b030
                                MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
-                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
+                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
+                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b030
+                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b030
+                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
+                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
+                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
                                MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8
                                /* Phy reset */
                                MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25      0x000b0

diff --git a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
index 6aa193fb283f52630bc0ab2f13785f85804f542e..e000e6f12bf527d2ea937baf889a0ab07aca2d61 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
@@ -345,19 +345,19 @@
                        fsl,pins = <
                                MX6QDL_PAD_KEY_COL1__ENET_MDIO          0x1b0b0
                                MX6QDL_PAD_KEY_COL2__ENET_MDC           0x1b0b0
-                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
+                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b030
+                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b030
+                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b030
+                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b030
+                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b030
+                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b030
                                MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
-                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
+                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
+                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b030
+                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b030
+                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
+                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
+                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
                                MX6QDL_PAD_GPIO_6__ENET_IRQ             0x000b1
                        >;
                };

diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
index f65fdfc2536d9767ba5588c6ae2973182db178c9..81dd6cd1937d4c22f110d7073e01b1869c942950 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
@@ -359,19 +359,19 @@
                        fsl,pins = <
                                MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x100b0
                                MX6QDL_PAD_ENET_MDC__ENET_MDC           0x100b0
-                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x100b0
-                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x100b0
-                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x100b0
-                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x100b0
-                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x100b0
-                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x100b0
+                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x10030
+                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x10030
+                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x10030
+                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x10030
+                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x10030
+                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x10030
                                MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x100b0
-                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
+                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
+                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b030
+                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b030
+                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
+                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
+                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
                                /* Phy reset */
                                MX6QDL_PAD_EIM_D23__GPIO3_IO23          0x000b0
                                MX6QDL_PAD_GPIO_6__ENET_IRQ             0x000b1

diff --git a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
index d77ea9423bbce483ff5fca84dfc0f3fa1a8e8ae1..8e9e0d98db2fd88109423cbaf112611875e2f451 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
@@ -380,19 +380,19 @@
                        fsl,pins = <
                                MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
                                MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
-                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
+                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b030
+                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b030
+                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b030
+                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b030
+                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b030
+                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b030
                                MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
-                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
+                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
+                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b030
+                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b030
+                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
+                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
+                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
                                MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8
                        >;
                };

diff --git a/arch/arm/boot/dts/imx6qdl-udoo.dtsi b/arch/arm/boot/dts/imx6qdl-udoo.dtsi
index 3bee2f910067221d022b789128cd8b43f6b47d29..c96c91d83678511478650b87afaeb33a7e0f9f40 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl-udoo.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-udoo.dtsi
@@ -132,18 +132,18 @@
        imx6q-udoo {
                pinctrl_enet: enetgrp {
                        fsl,pins = <
-                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
-                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
+                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
+                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b030
+                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b030
+                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
+                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
+                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
+                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b030
+                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b030
+                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b030
+                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b030
+                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b030
+                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b030
                                MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
                                MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
                                MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0

diff --git a/arch/arm/boot/dts/imx6qdl-wandboard.dtsi b/arch/arm/boot/dts/imx6qdl-wandboard.dtsi
index 3ffe00c557f134c459f0b7c07c26330fb5280123..2b9c2be436f944d9e10265351a62bbaac2180ffc 100644 (file)
--- a/arch/arm/boot/dts/imx6qdl-wandboard.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-wandboard.dtsi
@@ -109,19 +109,19 @@
                        fsl,pins = <
                                MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b0b0
                                MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
-                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b0b0
+                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x1b030
+                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b030
+                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b030
+                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b030
+                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b030
+                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b030
                                MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x1b0b0
-                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b0b0
-                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b0b0
-                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b0b0
+                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
+                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x1b030
+                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x1b030
+                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
+                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
+                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x1b030
                                MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0x4001b0a8
                                MX6QDL_PAD_GPIO_6__ENET_IRQ             0x000b1
                        >;