ARM: shmobile: lager: enable internal PCI

Enable internal AHB-PCI bridges for the USB EHCI/OHCI controllers attached to
them.

Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Reviewed-by: Ian Molton <ian.molton@codethink.co.uk>
[Sergei: enabled PCI0]
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

diff --git a/arch/arm/boot/dts/r8a7790-lager.dts b/arch/arm/boot/dts/r8a7790-lager.dts
index 0890d475c2c7681711c59ca200a429e0a74a0218..544202bab9fae399190f825bba2424504fa70a70 100644 (file)
--- a/arch/arm/boot/dts/r8a7790-lager.dts
+++ b/arch/arm/boot/dts/r8a7790-lager.dts
@@ -219,6 +219,21 @@
                renesas,groups = "i2c3";
                renesas,function = "i2c3";
        };
+
+       usb0_pins: usb0 {
+               renesas,groups = "usb0";
+               renesas,function = "usb0";
+       };
+
+       usb1_pins: usb1 {
+               renesas,groups = "usb1";
+               renesas,function = "usb1";
+       };
+
+       usb2_pins: usb2 {
+               renesas,groups = "usb2";
+               renesas,function = "usb2";
+       };
 };
 
 &ether {
@@ -368,3 +383,21 @@
                regulator-always-on;
        };
 };
+
+&pci0 {
+       status = "okay";
+       pinctrl-0 = <&usb0_pins>;
+       pinctrl-names = "default";
+};
+
+&pci1 {
+       status = "okay";
+       pinctrl-0 = <&usb1_pins>;
+       pinctrl-names = "default";
+};
+
+&pci2 {
+       status = "okay";
+       pinctrl-0 = <&usb2_pins>;
+       pinctrl-names = "default";
+};