KVM: PPC: Book3S HV: Use ASDR for HPT guests on POWER9

POWER9 adds a register called ASDR (Access Segment Descriptor
Register), which is set by hypervisor data/instruction storage
interrupts to contain the segment descriptor for the address
being accessed, assuming the guest is using HPT translation.
(For radix guests, it contains the guest real address of the
access.)

Thus, for HPT guests on POWER9, we can use this register rather
than looking up the SLB with the slbfee. instruction.

Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
index 264ac9ad45851d78c67f181b0633176fd799abdc..01f4392a284d0ca07008d2961e19a75b2b00a64a 100644 (file)
--- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S
+++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
@@ -1715,6 +1715,10 @@ kvmppc_hdsi:
        /* HPTE not found fault or protection fault? */
        andis.  r0, r6, (DSISR_NOHPTE | DSISR_PROTFAULT)@h
        beq     1f                      /* if not, send it to the guest */
+BEGIN_FTR_SECTION
+       mfspr   r5, SPRN_ASDR           /* on POWER9, use ASDR to get VSID */
+       b       4f
+END_FTR_SECTION_IFSET(CPU_FTR_ARCH_300)
        andi.   r0, r11, MSR_DR         /* data relocation enabled? */
        beq     3f
        clrrdi  r0, r4, 28
@@ -1791,6 +1795,10 @@ fast_interrupt_c_return:
 kvmppc_hisi:
        andis.  r0, r11, SRR1_ISI_NOPT@h
        beq     1f
+BEGIN_FTR_SECTION
+       mfspr   r5, SPRN_ASDR           /* on POWER9, use ASDR to get VSID */
+       b       4f
+END_FTR_SECTION_IFSET(CPU_FTR_ARCH_300)
        andi.   r0, r11, MSR_IR         /* instruction relocation enabled? */
        beq     3f
        clrrdi  r0, r10, 28