ARM: sti: stih410-clocks: Identify critical clocks

Lots of platforms contain clocks which if turned off would prove fatal.
The only way to recover is to restart the board(s).  This driver takes
references to clocks which are required to be always-on.  The Common
Clk Framework will then take references to them.  This way they will
not be turned off during the clk_disabled_unused() procedure.

In this patch we are identifying clocks, which if gated would render
the STiH410 development board unserviceable.

Signed-off-by: Lee Jones <lee.jones@linaro.org>

diff --git a/arch/arm/boot/dts/stih410-clock.dtsi b/arch/arm/boot/dts/stih410-clock.dtsi
index d1f2acafc9b69b833d989e01a1619aba161e5dff..fd50496821816d3caf76b29e329ecb2f32a7d06a 100644 (file)
--- a/arch/arm/boot/dts/stih410-clock.dtsi
+++ b/arch/arm/boot/dts/stih410-clock.dtsi
@@ -103,6 +103,7 @@
                                clocks = <&clk_sysin>;
 
                                clock-output-names = "clk-s-a0-pll-ofd-0";
+                               clock-critical = <0>; /* clk-s-a0-pll-ofd-0 */
                        };
 
                        clk_s_a0_flexgen: clk-s-a0-flexgen {
@@ -115,6 +116,7 @@
 
                                clock-output-names = "clk-ic-lmi0",
                                                     "clk-ic-lmi1";
+                               clock-critical = <CLK_IC_LMI0>;
                        };
                };
 
@@ -129,6 +131,7 @@
                                             "clk-s-c0-fs0-ch1",
                                             "clk-s-c0-fs0-ch2",
                                             "clk-s-c0-fs0-ch3";
+                       clock-critical = <0>; /* clk-s-c0-fs0-ch0 */
                };
 
                clk_s_c0: clockgen-c@09103000 {
@@ -142,6 +145,7 @@
                                clocks = <&clk_sysin>;
 
                                clock-output-names = "clk-s-c0-pll0-odf-0";
+                               clock-critical = <0>; /* clk-s-c0-pll0-odf-0 */
                        };
 
                        clk_s_c0_pll1: clk-s-c0-pll1 {
@@ -204,6 +208,11 @@
                                                     "clk-clust-hades",
                                                     "clk-hwpe-hades",
                                                     "clk-fc-hades";
+                               clock-critical = <CLK_ICN_CPU>,
+                                                <CLK_TX_ICN_DMU>,
+                                                <CLK_EXT2F_A9>,
+                                                <CLK_ICN_LMI>,
+                                                <CLK_ICN_SBC>;
                        };
                };