Correct HSYNC_PERIOD, VSYNC_PERIOD, HORIZONTAL_WAIT_CNT and
VERTICAL_WAIT_CNT setting.
In MX6SL RM, these parmeters define as followed:
- HSYNC_PERIOD: Total number of CLK_DIS_LCDIFn cycles between
two positive or two negative edges of the HSYNC signal.
- VSYNC_PERIOD: Total number of units between two positive
or two negative edges of the VSYNC signal.
- HORIZONTAL_WAIT_CNT:In the DOTCLK mode, wait for this number
of clocks from falling edge (or rising if HSYNC_POL is 1) of HSYNC
signal to account for horizontal back porch plus the number of
DOTCLKs before the moving picture information begins.
- VERTICAL_WAIT_CNT: In the DOTCLK mode, it accounts for
the veritcal back porch lines plus the number of horizontal lines
before the moving picture begins.
After apply the patch, run HDMI CTS with video mode 480p,720p and 1080p
test case 7-16~7-19, 7-21~7-27 and 7-33 pass.
Signed-off-by: Sandor Yu <R01008@freescale.com>
/*
- * Copyright (C) 2010-2012 Freescale Semiconductor, Inc.
+ * Copyright (C) 2010-2013 Freescale Semiconductor, Inc.
*/
/*
setup_dotclk_panel((PICOS2KHZ(fbi->var.pixclock)) * 1000UL,
fbi->var.vsync_len,
- fbi->var.upper_margin +
- fbi->var.yres + fbi->var.lower_margin,
- fbi->var.upper_margin,
+ fbi->var.upper_margin + fbi->var.yres +
+ fbi->var.lower_margin + fbi->var.vsync_len,
+ fbi->var.upper_margin + fbi->var.vsync_len,
fbi->var.yres,
fbi->var.hsync_len,
- fbi->var.left_margin +
- fbi->var.xres + fbi->var.right_margin,
- fbi->var.left_margin,
+ fbi->var.left_margin + fbi->var.xres +
+ fbi->var.right_margin + fbi->var.hsync_len,
+ fbi->var.left_margin + fbi->var.hsync_len,
fbi->var.xres,
bpp_to_pixfmt(fbi),
data->output_pix_fmt,