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49 >eCos Reference Manual</TH
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65 >Chapter 9. HAL Interfaces</TD
71 HREF="hal-cache-control.html"
85 NAME="HAL-INPUT-AND-OUTPUT">HAL I/O</H1
87 >This section contains definitions for supporting access
88 to device control registers in an architecture neutral
91 >These definitions are normally found in the header file
95 >. This file itself contains
96 macros that are generic to the architecture. If there are variant or
97 platform specific IO access macros then these will be found in
100 >cyg/hal/var_io.h</TT
104 >cyg/hal/plf_io.h</TT
105 > in the variant or platform HALs
106 respectively. These files are include automatically by this header, so
107 need not be included explicitly.</P
109 >This header (or more likely <TT
111 >cyg/hal/plf_io.h</TT
113 defines the PCI access macros. For more information on these see <A
114 HREF="pci-library-reference.html"
115 >the Section called <I
116 >PCI Library reference</I
124 NAME="AEN8057">Register address</H2
132 CLASS="PROGRAMLISTING"
133 >HAL_IO_REGISTER</PRE
138 >This type is used to store the address of an I/O register. It will
139 normally be a memory address, an integer port address or an offset
140 into an I/O space. More complex architectures may need to code an
141 address space plus offset pair into a single word, or may represent it
144 >Values of variables and constants of this type will usually be
145 supplied by configuration mechanisms or in target specific headers.</P
152 NAME="AEN8062">Register read</H2
160 CLASS="PROGRAMLISTING"
161 >HAL_READ_XXX( register, value )
162 HAL_READ_XXX_VECTOR( register, buffer, count, stride )</PRE
167 >These macros support the reading of I/O registers in various
173 > component of the name may be
189 > reads the appropriately sized
190 value from the register and stores it in the variable passed as the
195 >HAL_READ_XXX_VECTOR()</TT
202 > values of the appropriate size into
214 controls how the pointer advances through the register space. A stride
215 of zero will read the same register repeatedly, and a stride of one
216 will read adjacent registers of the given size. Greater strides will
217 step by larger amounts, to allow for sparsely mapped registers for
225 NAME="AEN8077">Register write</H2
233 CLASS="PROGRAMLISTING"
234 >HAL_WRITE_XXX( register, value )
235 HAL_WRITE_XXX_VECTOR( register, buffer,count, stride )</PRE
240 >These macros support the writing of I/O registers in various
246 > component of the name may be
263 the appropriately sized value from the variable passed as the second argument
264 stored it in the register.</P
268 >HAL_WRITE_XXX_VECTOR()</TT
275 > values of the appropriate size from <TT
286 how the pointer advances through the register space. A stride of
287 zero will write the same register repeatedly, and a stride of one
288 will write adjacent registers of the given size. Greater strides
289 will step by larger amounts, to allow for sparsely mapped registers
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337 >Interrupt Handling</TD
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