1 #ifndef CYGONCE_DEVS_ETH_PHY_DEV_H_
2 #define CYGONCE_DEVS_ETH_PHY_DEV_H_
3 //==========================================================================
7 // Device API for ethernet transciever (PHY) support
9 //==========================================================================
10 //####ECOSGPLCOPYRIGHTBEGIN####
11 // -------------------------------------------
12 // This file is part of eCos, the Embedded Configurable Operating System.
13 // Copyright (C) 2003 Gary Thomas
15 // eCos is free software; you can redistribute it and/or modify it under
16 // the terms of the GNU General Public License as published by the Free
17 // Software Foundation; either version 2 or (at your option) any later version.
19 // eCos is distributed in the hope that it will be useful, but WITHOUT ANY
20 // WARRANTY; without even the implied warranty of MERCHANTABILITY or
21 // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
24 // You should have received a copy of the GNU General Public License along
25 // with eCos; if not, write to the Free Software Foundation, Inc.,
26 // 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
28 // As a special exception, if other files instantiate templates or use macros
29 // or inline functions from this file, or you compile this file and link it
30 // with other works to produce a work based on this file, this file does not
31 // by itself cause the resulting work to be covered by the GNU General Public
32 // License. However the source code for this file must still be made available
33 // in accordance with section (3) of the GNU General Public License.
35 // This exception does not invalidate any other reasons why a work based on
36 // this file might be covered by the GNU General Public License.
38 // Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
39 // at http://sources.redhat.com/ecos/ecos-license/
40 // -------------------------------------------
41 //####ECOSGPLCOPYRIGHTEND####
42 //==========================================================================
43 //#####DESCRIPTIONBEGIN####
46 // Contributors: gthomas
51 //####DESCRIPTIONEND####
53 //==========================================================================
56 #define PHY_BMCR 0x00 // Register number
57 #define PHY_BMCR_RESET 0x8000
58 #define PHY_BMCR_LOOPBACK 0x4000
59 #define PHY_BMCR_100MB 0x2000
60 #define PHY_BMCR_AUTO_NEG 0x1000
61 #define PHY_BMCR_POWER_DOWN 0x0800
62 #define PHY_BMCR_ISOLATE 0x0400
63 #define PHY_BMCR_RESTART 0x0200
64 #define PHY_BMCR_FULL_DUPLEX 0x0100
65 #define PHY_BMCR_COLL_TEST 0x0080
67 #define PHY_BMSR 0x01 // Status register
68 #define PHY_BMSR_100T4 0x8000
69 #define PHY_BMSR_100FDX 0x4000
70 #define PHY_BMSR_100HDX 0x2000
71 #define PHY_BMSR_10FDX 0x1000
72 #define PHY_BMSR_10HDX 0x0800
73 #define PHY_BMSR_AUTO_NEG 0x0020
74 #define PHY_BMSR_LINK 0x0004
76 #define PHY_ID1 0x02 // Chip ID register (high 16 bits)
77 #define PHY_ID2 0x03 // Chip ID register (low 16 bits)
79 struct _eth_phy_dev_entry {
82 bool (*stat)(eth_phy_access_t *f, int *stat);
85 #define _eth_phy_dev(_name_,_id_,_stat_) \
86 struct _eth_phy_dev_entry _eth_phy_dev_##_id_ \
87 CYG_HAL_TABLE_QUALIFIED_ENTRY(_eth_phy_devs,_id_) = \
88 { _name_, _id_, _stat_ };
90 #endif // CYGONCE_DEVS_ETH_PHY_DEV_H_
91 // ------------------------------------------------------------------------