1 #ifndef CYGONCE_FSL_BOARD_H
2 #define CYGONCE_FSL_BOARD_H
4 //=============================================================================
6 // Platform specific support (register layout, etc)
8 //=============================================================================
9 //####ECOSGPLCOPYRIGHTBEGIN####
10 // -------------------------------------------
11 // This file is part of eCos, the Embedded Configurable Operating System.
12 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
14 // eCos is free software; you can redistribute it and/or modify it under
15 // the terms of the GNU General Public License as published by the Free
16 // Software Foundation; either version 2 or (at your option) any later version.
18 // eCos is distributed in the hope that it will be useful, but WITHOUT ANY
19 // WARRANTY; without even the implied warranty of MERCHANTABILITY or
20 // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
23 // You should have received a copy of the GNU General Public License along
24 // with eCos; if not, write to the Free Software Foundation, Inc.,
25 // 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
27 // As a special exception, if other files instantiate templates or use macros
28 // or inline functions from this file, or you compile this file and link it
29 // with other works to produce a work based on this file, this file does not
30 // by itself cause the resulting work to be covered by the GNU General Public
31 // License. However the source code for this file must still be made available
32 // in accordance with section (3) of the GNU General Public License.
34 // This exception does not invalidate any other reasons why a work based on
35 // this file might be covered by the GNU General Public License.
37 // Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
38 // at http://sources.redhat.com/ecos/ecos-license/
39 // -------------------------------------------
40 //####ECOSGPLCOPYRIGHTEND####
41 //===========================================================================
43 #include <cyg/hal/hal_soc.h> // Hardware definitions
45 #define PMIC_SPI_BASE CSPI1_BASE_ADDR
47 #define PBC_REG_SHIFT 1
48 #define PBC_BASE SOC_CS4_BASE /* Peripheral Bus Controller */
49 #define PBC_VERSION (0x0 << PBC_REG_SHIFT)
50 #define PBC_BCTRL1 (0x4 << PBC_REG_SHIFT)
51 #define PBC_BCTRL1_CLR (0x6 << PBC_REG_SHIFT)
52 #define PBC_BCTRL2 (0x8 << PBC_REG_SHIFT)
53 #define PBC_BCTRL2_CLR (0xA << PBC_REG_SHIFT)
54 #define PBC_BCTRL3 (0xC << PBC_REG_SHIFT)
55 #define PBC_BCTRL3_CLR (0xE << PBC_REG_SHIFT)
56 #define PBC_BCTRL4 (0x10 << PBC_REG_SHIFT)
57 #define PBC_BCTRL4_CLR (0x12 << PBC_REG_SHIFT)
58 #define PBC_BSTAT1 (0x14 << PBC_REG_SHIFT)
59 #define BOARD_CS_LAN_BASE (SOC_CS4_BASE + (0x00020000 << PBC_REG_SHIFT) + 0x300)
60 #define BOARD_CS_UART_BASE (SOC_CS4_BASE + (0x00010000 << PBC_REG_SHIFT))
62 #define BOARD_FLASH_START SOC_CS0_BASE
63 #define REDBOOT_IMAGE_SIZE 0x40000
65 #define RAM_BANK0_BASE SOC_CSD0_BASE
67 #define SDRAM_BASE_ADDR SOC_CSD0_BASE
68 #define SDRAM_SIZE 0x08000000
71 //#define EXT_UART_x32
73 #define LED_IS_ON(n) ((readw(PBC_BASE+PBC_BCTRL1) & (1<<(n+5))) != 0)
74 #define TURN_LED_ON(n) writew((1<<(n+5)), PBC_BASE+PBC_BCTRL1)
75 #define TURN_LED_OFF(n) writew((1<<(n+5)), PBC_BASE+PBC_BCTRL1_CLR)
77 #define BOARD_DEBUG_LED(n) \
79 if (n >= 0 && n < LED_MAX_NUM) { \
87 #define BOARD_PBC_VERSION ((*(volatile unsigned short*)(PBC_BASE + PBC_VERSION)) >> 8)
89 #if !defined(__ASSEMBLER__)
98 #define DEBUG_SWITCH_1 (1 << 3)
99 #define DEBUG_SWITCH_2 (1 << 2)
100 #define DEBUG_SWITCH_3 (1 << 1)
101 #define DEBUG_SWITCH_4 (1 << 0)
102 #define CLK_INPUT_27MHZ_SET DEBUG_SWITCH_1
104 #define DEBUG_SWITCH_IS_ON(n) (((*(volatile unsigned short*)(PBC_BASE + PBC_BSTAT2)) & n) == 0)
106 while (DEBUG_SWITCH_IS_ON(DEBUG_SWITCH_1)) {
110 #endif /* CYGONCE_FSL_BOARD_H */