1 #ifndef CYGONCE_HAL_PLATFORM_INC
2 #define CYGONCE_HAL_PLATFORM_INC
3 ##=============================================================================
7 ## Ocelot board assembler header file
9 ##=============================================================================
10 #####ECOSGPLCOPYRIGHTBEGIN####
11 ## -------------------------------------------
12 ## This file is part of eCos, the Embedded Configurable Operating System.
13 ## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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28 ## As a special exception, if other files instantiate templates or use macros
29 ## or inline functions from this file, or you compile this file and link it
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32 ## License. However the source code for this file must still be made available
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40 ## -------------------------------------------
41 #####ECOSGPLCOPYRIGHTEND####
42 ##=============================================================================
43 #######DESCRIPTIONBEGIN####
46 ## Contributors:nickg,jskov
48 ## Purpose: Ocelot board definitions.
49 ## Description: This file contains various definitions and macros that are
50 ## useful for writing assembly code for the Ocelot board.
52 ## #include <cyg/hal/platform.inc>
56 ######DESCRIPTIONEND####
58 ##=============================================================================
60 #include <cyg/hal/mips.inc>
61 #include <cyg/hal/plf_defs.inc>
64 #------------------------------------------------------------------------------
65 # Macro for copying vectors to RAM if necessary.
66 #if !defined(CYGSEM_HAL_USE_ROM_MONITOR)
68 .macro hal_vectors_init
69 # If we don~t play nice with a ROM monitor, copy the required
70 # vectors into the proper location.
71 la t0,0x80000000 # dest addr
72 la t1,utlb_vector # source addr
73 la t3,utlb_vector_end # end dest addr
75 lw v0,0(t1) # get word
77 sw v0,0(t0) # write word
82 la t0,0x80000180 # dest addr
83 la t1,other_vector # source addr
84 la t3,other_vector_end # end dest addr
86 lw v0,0(t1) # get word
88 sw v0,0(t0) # write word
93 .set mips3 # Set ISA to MIPS 3 to allow cache insns
94 # Now clear the region in the caches
95 la t0,0x80000000 # dest addr
96 ori t1,t0,0x200 # source addr
97 1: cache 0x01,0x0000(t0) # Flush word from data cache
100 cache 0x01,0x3000(t0)
102 cache 0x00,0x0000(t0) # Invalidate icache for word
103 cache 0x00,0x1000(t0)
104 cache 0x00,0x2000(t0)
105 cache 0x00,0x3000(t0)
110 .set mips0 # reset ISA to default
116 .macro hal_vectors_init
121 #------------------------------------------------------------------------------
122 # Monitor initialization.
124 #ifndef CYGPKG_HAL_MIPS_MON_DEFINED
126 #if defined(CYG_HAL_STARTUP_ROM) || \
127 ( defined(CYG_HAL_STARTUP_RAM) && \
128 !defined(CYGSEM_HAL_USE_ROM_MONITOR))
130 # If we are starting up from ROM, or we are starting in
131 # RAM and NOT using a ROM monitor, initialize the VSR table.
135 # Set default exception VSR for all vectors
136 ori a0,zero,CYGNUM_HAL_VSR_COUNT
137 la a1,__default_exception_vsr
145 # Now set special VSRs
148 la a1,__default_interrupt_vsr
149 sw a1,CYGNUM_HAL_VECTOR_INTERRUPT*4(a0)
150 # Add special handler on breakpoint vector to allow GDB and
151 # GCC to both use 'break' without conflicts.
152 la a1,__break_vsr_springboard
153 sw a1,CYGNUM_HAL_VECTOR_BREAKPOINT*4(a0)
154 # Set exception handler on special vectors
155 # FIXME: Should use proper definitions
156 la a1,__default_exception_vsr
157 sw a1,32*4(a0) # debug
158 sw a1,33*4(a0) # utlb
162 #elif defined(CYG_HAL_STARTUP_RAM) && defined(CYGSEM_HAL_USE_ROM_MONITOR)
164 # Initialize the VSR table entries
165 # We only take control of the interrupt vector,
166 # the rest are left to the ROM for now...
172 la a1,__default_interrupt_vsr
173 sw a1,CYGNUM_HAL_VECTOR_INTERRUPT*4(a0)
184 #define CYGPKG_HAL_MIPS_MON_DEFINED
187 #------------------------------------------------------------------------------
189 #if !defined(CYG_HAL_STARTUP_RAM)
191 // Only initialize the SDRAM controller when running in ROM
192 .extern hal_memc_setup
193 lar t0,hal_memc_setup
197 // FIXME: Clear reset status byte
199 #define CYGPKG_HAL_MIPS_MEMC_DEFINED
202 #------------------------------------------------------------------------------
203 # Decide whether the VSR table is defined externally, or is to be defined
206 ## ISR tables are defined in platform.S
207 #define CYG_HAL_MIPS_ISR_TABLES_DEFINED
209 ## VSR table is at a fixed RAM address defined by the linker script
210 #define CYG_HAL_MIPS_VSR_TABLE_DEFINED
212 ##-----------------------------------------------------------------------------
213 #ifdef CYG_STARTUP_ROM
215 ## Initial SR value for use in ROM:
218 ## FP registers are 32 bit
219 ## All hw ints disabled
220 #define INITIAL_SR 0x30000000
224 ## Initial SR value for use standalone:
227 ## FP registers are 32 bit
228 ## All hw ints disabled
229 #define INITIAL_SR 0x30000000
233 #------------------------------------------------------------------------------
234 #endif // ifndef CYGONCE_HAL_PLATFORM_INC
235 # end of platform.inc