1 # ====================================================================
3 # hal_sh_sh77x9_se77x9.cdl
5 # Hitachi SE77X9 board HAL package configuration data
7 # ====================================================================
8 #####ECOSGPLCOPYRIGHTBEGIN####
9 ## -------------------------------------------
10 ## This file is part of eCos, the Embedded Configurable Operating System.
11 ## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
13 ## eCos is free software; you can redistribute it and/or modify it under
14 ## the terms of the GNU General Public License as published by the Free
15 ## Software Foundation; either version 2 or (at your option) any later version.
17 ## eCos is distributed in the hope that it will be useful, but WITHOUT ANY
18 ## WARRANTY; without even the implied warranty of MERCHANTABILITY or
19 ## FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
22 ## You should have received a copy of the GNU General Public License along
23 ## with eCos; if not, write to the Free Software Foundation, Inc.,
24 ## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
26 ## As a special exception, if other files instantiate templates or use macros
27 ## or inline functions from this file, or you compile this file and link it
28 ## with other works to produce a work based on this file, this file does not
29 ## by itself cause the resulting work to be covered by the GNU General Public
30 ## License. However the source code for this file must still be made available
31 ## in accordance with section (3) of the GNU General Public License.
33 ## This exception does not invalidate any other reasons why a work based on
34 ## this file might be covered by the GNU General Public License.
36 ## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
37 ## at http://sources.redhat.com/ecos/ecos-license/
38 ## -------------------------------------------
39 #####ECOSGPLCOPYRIGHTEND####
40 # ====================================================================
41 ######DESCRIPTIONBEGIN####
44 # Original data: jskov
48 #####DESCRIPTIONEND####
50 # ====================================================================
52 cdl_package CYGPKG_HAL_SH_SH77X9_SE77X9 {
53 display "Hitachi/SH77X9 SE77X9 board"
55 requires ! CYGHWR_HAL_SH_BIGENDIAN
56 requires CYGHWR_HAL_SH_IRQ_USE_IRQLVL
57 define_header hal_sh_sh77x9_se77x9.h
60 The SE77X9 HAL package provides the support needed to run
61 eCos on a Hitachi/SH SE77X9 board."
63 compile hal_diag.c plf_misc.c ser16c550c.c
65 implements CYGINT_HAL_DEBUG_GDB_STUBS
66 implements CYGINT_HAL_DEBUG_GDB_STUBS_BREAK
67 implements CYGINT_HAL_VIRTUAL_VECTOR_SUPPORT
68 implements CYGINT_HAL_VIRTUAL_VECTOR_COMM_BAUD_SUPPORT
71 puts $::cdl_system_header "#define CYGBLD_HAL_TARGET_H <pkgconf/hal_sh.h>"
72 puts $::cdl_system_header "#define CYGBLD_HAL_PLATFORM_H <pkgconf/hal_sh_sh77x9_se77x9.h>"
74 puts $::cdl_header "#define CYGNUM_HAL_SH_SH3_SCIF_PORTS 1"
75 puts $::cdl_header "#define CYGHWR_HAL_VSR_TABLE 0x8c000000"
76 puts $::cdl_header "#define CYGHWR_HAL_VECTOR_TABLE 0x8c000100"
78 puts $::cdl_header "#define HAL_PLATFORM_BOARD \"SE77X9\""
79 puts $::cdl_header "#define HAL_PLATFORM_EXTRA \"\""
82 cdl_option CYGPRI_HAL_SH_SH77X9_VARIANT {
83 display "Board variant"
85 legal_values {"SE7709RP01" "SE7709SE01" "SE7729SE01"}
86 default_value {"SE7709SE01"}
89 Select the particular board variant used."
92 cdl_option CYGPRI_HAL_SH_SH77X9_SUPERIO {
93 display "Board variant has SuperIO controller"
97 Set if the board has a SuperIO controller."
101 cdl_option CYGPRI_HAL_SH_SH77X9_VARIANT_7709R {
102 display "SE7709RP01 board"
103 active_if { CYGPRI_HAL_SH_SH77X9_VARIANT == "SE7709RP01" }
106 requires CYGPKG_HAL_SH_7709R
107 requires !CYGPKG_HAL_SH_7709S
108 requires !CYGPKG_HAL_SH_7729
109 requires !CYGPRI_HAL_SH_SH77X9_SUPERIO
110 requires { CYGNUM_HAL_SH_OOC_XTAL_DEFAULT == 20000000 }
112 puts $::cdl_header "#define HAL_PLATFORM_CPU \"SH 7709R\""
113 puts $::cdl_header "#define CYGNUM_HAL_SH_SE77X9_16550_CLOCK 14745000"
114 puts $::cdl_header "#define CYGNUM_HAL_SH_SE77X9_16550_BASE 0xb0800000"
115 puts $::cdl_header "#define CYGNUM_HAL_SH_SE77X9_LEDS_BASE 0xb1800000"
118 description "Settings for the 7709R variant of the board."
121 cdl_option CYGPRI_HAL_SH_SH77X9_VARIANT_7709S {
122 display "SE7709SE01 board"
123 active_if { CYGPRI_HAL_SH_SH77X9_VARIANT == "SE7709SE01" }
125 requires CYGPRI_HAL_SH_SH77X9_SUPERIO
126 requires !CYGPKG_HAL_SH_7709R
127 requires CYGPKG_HAL_SH_7709S
128 requires !CYGPKG_HAL_SH_7729
130 puts $::cdl_header "#define HAL_PLATFORM_CPU \"SH 7709S\""
131 puts $::cdl_header "#define CYGNUM_HAL_SH_SE77X9_16550_CLOCK 1846200"
132 puts $::cdl_header "#define CYGNUM_HAL_SH_SE77X9_16550_BASE 0xb04007f0"
133 puts $::cdl_header "#define CYGNUM_HAL_SH_SE77X9_LEDS_BASE 0xb0c00000"
134 puts $::cdl_header "#define CYGNUM_HAL_SH_SE77X9_SDRAM_SETUP"
137 description "Settings for the 7709S variant of the board."
140 cdl_option CYGPRI_HAL_SH_SH77X9_VARIANT_7729 {
141 display "SE7729SE01 board"
142 active_if { CYGPRI_HAL_SH_SH77X9_VARIANT == "SE7729SE01" }
144 requires CYGPRI_HAL_SH_SH77X9_SUPERIO
145 requires !CYGPKG_HAL_SH_7709R
146 requires !CYGPKG_HAL_SH_7709S
147 requires CYGPKG_HAL_SH_7729
149 puts $::cdl_header "#define HAL_PLATFORM_CPU \"SH 7729\""
150 puts $::cdl_header "#define CYGNUM_HAL_SH_SE77X9_16550_CLOCK 1846200"
151 puts $::cdl_header "#define CYGNUM_HAL_SH_SE77X9_16550_BASE 0xb04007f0"
152 puts $::cdl_header "#define CYGNUM_HAL_SH_SE77X9_LEDS_BASE 0xb0c00000"
153 puts $::cdl_header "#define CYGNUM_HAL_SH_SE77X9_SDRAM_SETUP"
156 description "Settings for the 7729 variant of the board."
160 cdl_component CYG_HAL_STARTUP {
161 display "Startup type"
163 legal_values {"RAM" "ROM" "ROMRAM" }
164 default_value {"RAM"}
166 define -file system.h CYG_HAL_STARTUP
168 When targetting the SE77X9 board it is possible to build
169 the system for either RAM bootstrap or ROM bootstrap.
170 RAM bootstrap generally requires that the board
171 is equipped with ROMs containing a suitable ROM monitor or
172 equivalent software that allows GDB to download the eCos
173 application on to the board. The ROM bootstrap typically
174 requires that the eCos application be blown into EPROMs or
175 equivalent technology. ROMRAM bootstrap is similar to ROM
176 bootstrap, but everything is copied to RAM before execution
177 starts thus improving performance, but at the cost of an
178 increased RAM footprint."
181 cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS {
182 display "Number of communication channels on the board"
187 cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_DEBUG_CHANNEL {
188 display "Debug serial port"
190 legal_values 0 to CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS-1
193 The SE77X9 board has one serial port. This option
194 chooses which port will be used to connect to a host
198 cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_DEFAULT {
199 display "Default console channel."
204 cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL {
205 display "Diagnostic serial port"
207 legal_values 0 to CYGNUM_HAL_VIRTUAL_VECTOR_COMM_CHANNELS-1
208 default_value CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_DEFAULT
210 The SE77X9 board has two serial ports. This option
211 chooses which port will be used for diagnostic output."
214 cdl_option CYGNUM_HAL_VIRTUAL_VECTOR_CHANNELS_DEFAULT_BAUD {
215 display "Console/GDB serial port baud rate"
217 legal_values 9600 19200 38400 57600 115200
219 define CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL_BAUD
221 This option controls the default baud rate used for the
222 Console/GDB connection."
225 cdl_component CYGHWR_HAL_SH_PLF_CLOCK_SETTINGS {
226 display "SH on-chip platform clock controls"
228 The various clocks used by the system are derived from
233 cdl_option CYGNUM_HAL_SH_OOC_XTAL_DEFAULT {
234 display "SH clock crystal default value"
236 default_value 33333300
240 cdl_option CYGHWR_HAL_SH_OOC_XTAL {
241 display "SH clock crystal"
243 legal_values 8000000 to 50000000
244 default_value { CYGNUM_HAL_SH_OOC_XTAL_DEFAULT }
247 This option specifies the frequency of the crystal all
248 other clocks are derived from."
251 cdl_option CYGHWR_HAL_SH_OOC_PLL_1 {
252 display "SH clock PLL circuit 1"
255 legal_values { 0 1 2 3 4 6 8 }
257 This selects the multiplication factor provided by
258 PLL1. If PLL1 is disabled via CAP1, this option should
262 cdl_option CYGHWR_HAL_SH_OOC_PLL_2 {
263 display "SH clock PLL circuit 2"
266 legal_values { 0 1 4 }
269 This selects the multiplication factor provided by
270 PLL2. If PLL2 is disabled via CAP2, this option should
274 cdl_option CYGHWR_HAL_SH_OOC_DIVIDER_1 {
275 display "SH clock divider 1"
278 legal_values { 1 2 3 4 6 }
280 This divider option affects the CPU core clock."
283 cdl_option CYGHWR_HAL_SH_OOC_DIVIDER_2 {
284 display "SH clock divider 2"
287 legal_values { 1 2 3 4 6 }
289 This divider option affects the peripheral clock."
292 cdl_option CYGHWR_HAL_SH_OOC_CLOCK_MODE {
293 display "SH clock mode"
296 legal_values { 0 1 2 3 4 7 }
298 This option must mirror the clock mode hardwired on
299 the MD0-MD2 pins of the CPU in order to correctly
300 initialize the FRQCR register."
304 cdl_component CYGBLD_GLOBAL_OPTIONS {
305 display "Global build options"
310 Global build options including control over
311 compiler flags, linker flags and choice of toolchain."
314 cdl_option CYGBLD_GLOBAL_COMMAND_PREFIX {
315 display "Global command prefix"
318 default_value { "sh-elf" }
320 This option specifies the command prefix used when
321 invoking the build tools."
324 cdl_option CYGBLD_GLOBAL_CFLAGS {
325 display "Global compiler flags"
328 default_value { CYGHWR_HAL_SH_BIGENDIAN ? "-mb -m3 -Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef -Woverloaded-virtual -ggdb -O2 -ffunction-sections -fdata-sections -fno-rtti -fno-exceptions -fvtable-gc -finit-priority" : "-ml -m3 -Wall -Wpointer-arith -Wstrict-prototypes -Winline -Wundef -Woverloaded-virtual -ggdb -O2 -ffunction-sections -fdata-sections -fno-rtti -fno-exceptions -fvtable-gc -finit-priority" }
330 This option controls the global compiler flags which
331 are used to compile all packages by
332 default. Individual packages may define
333 options which override these global flags."
336 cdl_option CYGBLD_GLOBAL_LDFLAGS {
337 display "Global linker flags"
340 default_value { CYGHWR_HAL_SH_BIGENDIAN ? "-mb -m3 -ggdb -nostdlib -Wl,--gc-sections -Wl,-static" : "-ml -m3 -ggdb -nostdlib -Wl,--gc-sections -Wl,-static" }
342 This option controls the global linker flags. Individual
343 packages may define options which override these global flags."
346 cdl_option CYGBLD_BUILD_GDB_STUBS {
347 display "Build GDB stub ROM image"
349 requires { CYG_HAL_STARTUP == "ROM" }
350 requires CYGSEM_HAL_ROM_MONITOR
351 requires CYGBLD_BUILD_COMMON_GDB_STUBS
352 requires CYGDBG_HAL_DEBUG_GDB_INCLUDE_STUBS
353 requires ! CYGDBG_HAL_DEBUG_GDB_BREAK_SUPPORT
354 requires ! CYGDBG_HAL_DEBUG_GDB_THREAD_SUPPORT
355 requires ! CYGDBG_HAL_COMMON_INTERRUPTS_SAVE_MINIMUM_CONTEXT
356 requires ! CYGDBG_HAL_COMMON_CONTEXT_SAVE_MINIMUM
359 This option enables the building of the GDB stubs for the
360 board. The common HAL controls takes care of most of the
361 build process, but the final conversion from ELF image to
362 binary data is handled by the platform CDL, allowing
363 relocation of the data if necessary."
366 <PREFIX>/bin/gdb_module.bin : <PREFIX>/bin/gdb_module.img
367 $(OBJCOPY) -O binary $< $@
372 cdl_component CYGHWR_MEMORY_LAYOUT {
373 display "Memory layout"
376 calculated { CYG_HAL_STARTUP == "RAM" ? "sh_sh77x9_se77x9_ram" : \
377 CYG_HAL_STARTUP == "ROM" ? "sh_sh77x9_se77x9_rom" : \
378 "sh_sh77x9_se77x9_romram" }
380 cdl_option CYGHWR_MEMORY_LAYOUT_LDI {
381 display "Memory layout linker script fragment"
384 define -file system.h CYGHWR_MEMORY_LAYOUT_LDI
385 calculated { CYG_HAL_STARTUP == "RAM" ? "<pkgconf/mlt_sh_sh77x9_se77x9_ram.ldi>" : \
386 CYG_HAL_STARTUP == "ROM" ? "<pkgconf/mlt_sh_sh77x9_se77x9_rom.ldi>" : \
387 "<pkgconf/mlt_sh_sh77x9_se77x9_romram.ldi>" }
390 cdl_option CYGHWR_MEMORY_LAYOUT_H {
391 display "Memory layout header file"
394 define -file system.h CYGHWR_MEMORY_LAYOUT_H
395 calculated { CYG_HAL_STARTUP == "RAM" ? "<pkgconf/mlt_sh_sh77x9_se77x9_ram.h>" : \
396 CYG_HAL_STARTUP == "ROM" ? "<pkgconf/mlt_sh_sh77x9_se77x9_rom.h>" : \
397 "<pkgconf/mlt_sh_sh77x9_se77x9_romram.h>" }
401 cdl_option CYGSEM_HAL_USE_ROM_MONITOR {
402 display "Work with a ROM monitor"
404 legal_values { "GDB_stubs" }
405 default_value { CYG_HAL_STARTUP == "RAM" ? "GDB_stubs" : 0 }
406 requires { CYG_HAL_STARTUP == "RAM" }
407 parent CYGPKG_HAL_ROM_MONITOR
409 Support can be enabled for boot ROMs or ROM monitors which contain
410 GDB stubs. This support changes various eCos semantics such as
411 the encoding of diagnostic output, and the overriding of hardware
415 cdl_option CYGSEM_HAL_ROM_MONITOR {
416 display "Behave as a ROM monitor"
419 parent CYGPKG_HAL_ROM_MONITOR
420 requires { CYG_HAL_STARTUP == "ROM" }
422 Enable this option if this program is to be used as a ROM monitor,
423 i.e. applications will be loaded into RAM on the board, and this
424 ROM monitor may process exceptions or interrupts generated from the
425 application. This enables features such as utilizing a separate
426 interrupt stack when exceptions are generated."
429 cdl_component CYGPKG_REDBOOT_HAL_OPTIONS {
430 display "Redboot HAL options"
433 parent CYGPKG_REDBOOT
434 active_if CYGPKG_REDBOOT
436 This option lists the target's requirements for a valid Redboot
439 cdl_option CYGBLD_BUILD_REDBOOT_BIN {
440 display "Build Redboot ROM binary image"
441 active_if CYGBLD_BUILD_REDBOOT
444 description "This option enables the conversion of the Redboot ELF
445 image to a binary image suitable for ROM programming."
448 <PREFIX>/bin/redboot.bin : <PREFIX>/bin/redboot.elf
449 $(OBJCOPY) --strip-debug $< $(@:.bin=.img)
450 $(OBJCOPY) -O srec $< $(@:.bin=.srec)
451 $(OBJCOPY) --change-address 0x21000000 -O srec $< $(@:.bin=.eprom.srec)
452 $(OBJCOPY) -O binary $< $@