packages/hal/sh/se77x9/v2_0/include/plf_intr.h

   1 #ifndef CYGONCE_HAL_PLF_INTR_H
   2 #define CYGONCE_HAL_PLF_INTR_H
   3
   4 //==========================================================================
   5 //
   6 //      plf_intr.h
   7 //
   8 //      Platform specific Interrupt and clock support
   9 //
  10 //==========================================================================
  11 //####ECOSGPLCOPYRIGHTBEGIN####
  12 // -------------------------------------------
  13 // This file is part of eCos, the Embedded Configurable Operating System.
  14 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
  15 //
  16 // eCos is free software; you can redistribute it and/or modify it under
  17 // the terms of the GNU General Public License as published by the Free
  18 // Software Foundation; either version 2 or (at your option) any later version.
  19 //
  20 // eCos is distributed in the hope that it will be useful, but WITHOUT ANY
  21 // WARRANTY; without even the implied warranty of MERCHANTABILITY or
  22 // FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  23 // for more details.
  24 //
  25 // You should have received a copy of the GNU General Public License along
  26 // with eCos; if not, write to the Free Software Foundation, Inc.,
  27 // 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
  28 //
  29 // As a special exception, if other files instantiate templates or use macros
  30 // or inline functions from this file, or you compile this file and link it
  31 // with other works to produce a work based on this file, this file does not
  32 // by itself cause the resulting work to be covered by the GNU General Public
  33 // License. However the source code for this file must still be made available
  34 // in accordance with section (3) of the GNU General Public License.
  35 //
  36 // This exception does not invalidate any other reasons why a work based on
  37 // this file might be covered by the GNU General Public License.
  38 //
  39 // Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
  40 // at http://sources.redhat.com/ecos/ecos-license/
  41 // -------------------------------------------
  42 //####ECOSGPLCOPYRIGHTEND####
  43 //==========================================================================
  44 //#####DESCRIPTIONBEGIN####
  45 //
  46 // Author(s):    jskov
  47 // Contributors: jskov
  48 // Date:         2001-06-12
  49 // Purpose:      Define Interrupt support
  50 // Description:  The macros defined here provide the HAL APIs for handling
  51 //               interrupts and the clock for the SE77x9 board.
  52 // Usage:
  53 //               #include <cyg/hal/plf_intr.h>
  54 //               ...
  55 //
  56 //
  57 //####DESCRIPTIONEND####
  58 //
  59 //==========================================================================
  60
  61 #include <pkgconf/hal.h>
  62 #include <cyg/hal/hal_io.h>
  63
  64 //----------------------------------------------------------------------------
  65 // External interrupts
  66 #define CYGNUM_HAL_INTERRUPT_EXTERNALS_BASE CYGNUM_HAL_INTERRUPT_LVL0
  67 #define CYGNUM_HAL_INTERRUPT_SLOT_IRQ8 CYGNUM_HAL_INTERRUPT_LVL0
  68 #define CYGNUM_HAL_INTERRUPT_KEYBOARD  CYGNUM_HAL_INTERRUPT_LVL1
  69 #define CYGNUM_HAL_INTERRUPT_PCMCIA2   CYGNUM_HAL_INTERRUPT_LVL2
  70 #define CYGNUM_HAL_INTERRUPT_COM2      CYGNUM_HAL_INTERRUPT_LVL3
  71 #define CYGNUM_HAL_INTERRUPT_SLOT_IRQ6 CYGNUM_HAL_INTERRUPT_LVL4
  72 #define CYGNUM_HAL_INTERRUPT_MOUSE     CYGNUM_HAL_INTERRUPT_LVL5
  73 #define CYGNUM_HAL_INTERRUPT_PCMCIA1   CYGNUM_HAL_INTERRUPT_LVL6
  74 #define CYGNUM_HAL_INTERRUPT_COM1      CYGNUM_HAL_INTERRUPT_LVL7
  75 #define CYGNUM_HAL_INTERRUPT_SLOT_IRQ4 CYGNUM_HAL_INTERRUPT_LVL8
  76 #define CYGNUM_HAL_INTERRUPT_SLOT_IRQ3 CYGNUM_HAL_INTERRUPT_LVL9
  77 #define CYGNUM_HAL_INTERRUPT_PARALLEL  CYGNUM_HAL_INTERRUPT_LVL10
  78 #define CYGNUM_HAL_INTERRUPT_SLOT_IRQ2 CYGNUM_HAL_INTERRUPT_LVL11
  79 #define CYGNUM_HAL_INTERRUPT_LAN       CYGNUM_HAL_INTERRUPT_LVL12
  80 #define CYGNUM_HAL_INTERRUPT_IDE       CYGNUM_HAL_INTERRUPT_LVL13
  81 #define CYGNUM_HAL_INTERRUPT_PCMCIA0   CYGNUM_HAL_INTERRUPT_LVL14
  82
  83 //----------------------------------------------------------------------------
  84 // Interrupt controller
  85 #define CYGARC_REG_INTC_A                   0xb1400000
  86 #define CYGARC_REG_INTC_B                   0xb1400002
  87 #define CYGARC_REG_INTC_C                   0xb1400004
  88 #define CYGARC_REG_INTC_D                   0xb1400006
  89 #define CYGARC_REG_INTC_E                   0xb1400008
  90 #define CYGARC_REG_INTC_F                   0xb140000a
  91 #define CYGARC_REG_INTC_G                   0xb140000c
  92
  93 //----------------------------------------------------------------------------
  94 // Interrupt configuration extention macros
  95 //
  96 // It appears that masks do not appear linear in the INTC like on the SE7751.
  97 // The below magic values determined from the INTC's startup values.
  98 //               A        B       C       D       E       F      G
  99 // 0xb1400000: 0x02a0  0x0005  0x008c  0xe030  0x0d91  0xf0b0  0x7640  0x0000
 100
 101 static inline void
 102 _mask_vec(int level, cyg_uint32 reg, int shift, int lvl)
 103 {
 104     cyg_uint16 msk;
 105     shift *= 4;
 106     HAL_READ_UINT16(reg, msk);
 107     msk &= ~(0x000f << shift);
 108     if (level) msk |= lvl << shift;
 109     HAL_WRITE_UINT16(reg, msk);
 110 }
 111
 112 #define CYGPRI_HAL_INTERRUPT_UPDATE_LEVEL_PLF(vec, level)                        \
 113  case CYGNUM_HAL_INTERRUPT_SLOT_IRQ8:                                            \
 114      _mask_vec(level, CYGARC_REG_INTC_F, 3, 0xf);                                \
 115      break;                                                                      \
 116  case CYGNUM_HAL_INTERRUPT_KEYBOARD:                                             \
 117      _mask_vec(level, CYGARC_REG_INTC_D, 3, 0xe);                                \
 118      break;                                                                      \
 119  case CYGNUM_HAL_INTERRUPT_PCMCIA2:                                              \
 120      _mask_vec(level, CYGARC_REG_INTC_E, 2, 0xd);                                \
 121      break;                                                                      \
 122  case CYGNUM_HAL_INTERRUPT_COM2:                                                 \
 123      _mask_vec(level, CYGARC_REG_INTC_C, 0, 0xc);                                \
 124      break;                                                                      \
 125  case CYGNUM_HAL_INTERRUPT_SLOT_IRQ6:                                            \
 126      _mask_vec(level, CYGARC_REG_INTC_F, 1, 0xb);                                \
 127      break;                                                                      \
 128  case CYGNUM_HAL_INTERRUPT_MOUSE:                                                \
 129      _mask_vec(level, CYGARC_REG_INTC_A, 1, 0xa);                                \
 130      break;                                                                      \
 131  case CYGNUM_HAL_INTERRUPT_PCMCIA1:                                              \
 132      _mask_vec(level, CYGARC_REG_INTC_E, 1, 0x9);                                \
 133      break;                                                                      \
 134  case CYGNUM_HAL_INTERRUPT_COM1:                                                 \
 135      _mask_vec(level, CYGARC_REG_INTC_C, 1, 0x8);                                \
 136      break;                                                                      \
 137  case CYGNUM_HAL_INTERRUPT_SLOT_IRQ4:                                            \
 138      _mask_vec(level, CYGARC_REG_INTC_G, 3, 0x7);                                \
 139      break;                                                                      \
 140  case CYGNUM_HAL_INTERRUPT_SLOT_IRQ3:                                            \
 141      _mask_vec(level, CYGARC_REG_INTC_G, 2, 0x6);                                \
 142      break;                                                                      \
 143  case CYGNUM_HAL_INTERRUPT_PARALLEL:                                             \
 144      _mask_vec(level, CYGARC_REG_INTC_B, 0, 0x5);                                \
 145      break;                                                                      \
 146  case CYGNUM_HAL_INTERRUPT_SLOT_IRQ2:                                            \
 147      _mask_vec(level, CYGARC_REG_INTC_G, 1, 0x4);                                \
 148      break;                                                                      \
 149  case CYGNUM_HAL_INTERRUPT_LAN:                                                  \
 150      _mask_vec(level, CYGARC_REG_INTC_D, 1, 0x3);                                \
 151      break;                                                                      \
 152  case CYGNUM_HAL_INTERRUPT_IDE:                                                  \
 153      _mask_vec(level, CYGARC_REG_INTC_A, 2, 0x2);                                \
 154      break;                                                                      \
 155  case CYGNUM_HAL_INTERRUPT_PCMCIA0:                                              \
 156      _mask_vec(level, CYGARC_REG_INTC_E, 0, 0x1);                                \
 157      break;
 158
 159 //----------------------------------------------------------------------------
 160 // Reset.
 161 // Block interrupts and cause an exception. This forces a reset.
 162 #define HAL_PLATFORM_RESET() \
 163     asm volatile ("ldc %0,sr;trapa #0x00;" : : "r" (CYGARC_REG_SR_BL))
 164
 165 #define HAL_PLATFORM_RESET_ENTRY 0x80000000
 166
 167 //--------------------------------------------------------------------------
 168 #endif // ifndef CYGONCE_HAL_PLF_INTR_H
 169 // End of plf_intr.h