1 //=============================================================================
5 // EMI (External Memory Interface) Module register definitions
7 //=============================================================================
8 //####ECOSGPLCOPYRIGHTBEGIN####
9 // -------------------------------------------
10 // This file is part of eCos, the Embedded Configurable Operating System.
11 // Copyright (C) 2003 Nick Garnett
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27 // or inline functions from this file, or you compile this file and link it
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30 // License. However the source code for this file must still be made available
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40 //=============================================================================
41 //#####DESCRIPTIONBEGIN####
47 //####DESCRIPTIONEND####
49 //=============================================================================
51 //--------------------------------------------------------------------------
53 #define CYGARC_REG_EMI_BASE 0xFEC00000
54 #define CYGARC_REG_EMI_VCR_L (CYGARC_REG_EMI_BASE+0x00)
55 #define CYGARC_REG_EMI_VCR_H (CYGARC_REG_EMI_BASE+0x04)
56 #define CYGARC_REG_EMI_MIM (CYGARC_REG_EMI_BASE+0x0c)
57 #define CYGARC_REG_EMI_SCR (CYGARC_REG_EMI_BASE+0x14)
58 #define CYGARC_REG_EMI_STR (CYGARC_REG_EMI_BASE+0x1c)
59 #define CYGARC_REG_EMI_COC (CYGARC_REG_EMI_BASE+0x24)
60 #define CYGARC_REG_EMI_SDRA0 (CYGARC_REG_EMI_BASE+0x3c)
61 #define CYGARC_REG_EMI_SDRA1 (CYGARC_REG_EMI_BASE+0x34)
62 #define CYGARC_REG_EMI_SDMR0 (CYGARC_REG_EMI_BASE+0x100000)
63 #define CYGARC_REG_EMI_SDMR1 (CYGARC_REG_EMI_BASE+0x200000)
65 #define CYGARC_REG_EMI_VCR_L_ID 0x0000FFFF
66 #define CYGARC_REG_EMI_VCR_L_BOT_MB 0x00FF0000
67 #define CYGARC_REG_EMI_VCR_L_TOP_MB 0xFF000000
69 #define CYGARC_REG_EMI_VCR_H_PERR 0x000000FF
70 #define CYGARC_REG_EMI_VCR_H_MERR 0x0000FF00
71 #define CYGARC_REG_EMI_VCR_H_VERS 0xFFFF0000
73 #define CYGARC_REG_EMI_MIM_DCR 0x00000001
74 #define CYGARC_REG_EMI_MIM_DT 0x00000002
75 #define CYGARC_REG_EMI_MIM_BW 0x000000c0
76 #define CYGARC_REG_EMI_MIM_ENDIAN 0x00000100
77 #define CYGARC_REG_EMI_MIM_DRE 0x00000200
78 #define CYGARC_REG_EMI_MIM_DIMM 0x00000400
79 #define CYGARC_REG_EMI_MIM_BY32AP 0x00000800
80 #define CYGARC_REG_EMI_MIM_DRI 0x0fff0000
82 #define CYGARC_REG_EMI_SCR_SMS 0x00000007
83 #define CYGARC_REG_EMI_SCR_BRFSH 0x00000070
85 #define CYGARC_REG_EMI_STR_SRP 0x00000001
86 #define CYGARC_REG_EMI_STR_SRCD 0x00000002
87 #define CYGARC_REG_EMI_STR_SCL 0x0000001c
88 #define CYGARC_REG_EMI_STR_SRC 0x000000e0
89 #define CYGARC_REG_EMI_STR_SRAS 0x00000700
90 #define CYGARC_REG_EMI_STR_SRRD 0x00000800
91 #define CYGARC_REG_EMI_STR_SDPL 0x00001000
93 #define CYGARC_REG_EMI_COC_LOCK 0x00000001
95 #define CYGARC_REG_EMI_SDRA_SPLIT 0x00000f00
96 #define CYGARC_REG_EMI_SDRA_BANK 0x00001000
97 #define CYGARC_REG_EMI_SDRA_UBA 0xffe00000
100 // end of mod_regs_emi.h