1 //==========================================================================
5 // HAL CPU variant miscellaneous functions
7 //==========================================================================
8 //####ECOSGPLCOPYRIGHTBEGIN####
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38 // -------------------------------------------
39 //####ECOSGPLCOPYRIGHTEND####
40 //==========================================================================
41 //#####DESCRIPTIONBEGIN####
44 // Contributors: gthomas
46 // Purpose: HAL miscellaneous functions
47 // Description: This file contains miscellaneous functions provided by the
50 //####DESCRIPTIONEND####
52 //========================================================================*/
54 #include <pkgconf/hal.h>
56 #include <cyg/infra/cyg_type.h> // Base types
57 #include <cyg/infra/cyg_ass.h> // assertion macros
59 #include <cyg/hal/hal_intr.h>
60 #include <cyg/hal/v850_common.h>
62 externC void cyg_hal_platform_hardware_init(void);
65 // Interrupt management functions
68 static volatile unsigned char *interrupt_control_registers[] = {
69 CYG_HAL_V85X_INTERRUPT_CONTROL_REGISTERS // Defined in <plf_intr.h>
72 #define INT_CONTROL_PENDING 0x80
73 #define INT_CONTROL_DISABLE 0x40
74 #define INT_CONTROL_LEVEL(n) n
76 #define INT_CONTROL_DEFAULT INT_CONTROL_DISABLE|INT_CONTROL_LEVEL(7)
79 // Mask, i.e. disable, interrupt #vector from occurring
82 hal_interrupt_mask(int vector)
84 volatile unsigned char *ctl;
85 CYG_ASSERT(vector >= CYGNUM_HAL_ISR_MIN, "invalid interrupt vector [< MIN]");
86 CYG_ASSERT(vector <= CYGNUM_HAL_ISR_MAX, "invalid interrupt vector [> MAX]");
87 ctl = interrupt_control_registers[vector-CYGNUM_HAL_ISR_MIN];
88 CYG_ASSERT((void *)ctl != 0, "invalid interrupt vector [not defined]");
90 *ctl |= INT_CONTROL_DISABLE;
95 // Unmask, i.e. enable, interrupt #vector
98 hal_interrupt_unmask(int vector)
100 volatile unsigned char *ctl;
101 CYG_ASSERT(vector >= CYGNUM_HAL_ISR_MIN, "invalid interrupt vector [< MIN]");
102 CYG_ASSERT(vector <= CYGNUM_HAL_ISR_MAX, "invalid interrupt vector [> MAX]");
103 ctl = interrupt_control_registers[vector-CYGNUM_HAL_ISR_MIN];
104 CYG_ASSERT((void *)ctl != 0, "invalid interrupt vector [not defined]");
106 *ctl &= ~INT_CONTROL_DISABLE;
111 // Acknowledge, i.e. clear, interrupt #vector
114 hal_interrupt_acknowledge(int vector)
116 volatile unsigned char *ctl;
117 CYG_ASSERT(vector >= CYGNUM_HAL_ISR_MIN, "invalid interrupt vector [< MIN]");
118 CYG_ASSERT(vector <= CYGNUM_HAL_ISR_MAX, "invalid interrupt vector [> MAX]");
119 ctl = interrupt_control_registers[vector-CYGNUM_HAL_ISR_MIN];
120 CYG_ASSERT((void *)ctl != 0, "invalid interrupt vector [not defined]");
122 *ctl &= ~INT_CONTROL_PENDING;
127 init_interrupts(void)
130 volatile unsigned char *ctl;
131 for (i = CYGNUM_HAL_ISR_MIN; i <= CYGNUM_HAL_ISR_MAX; i++) {
132 ctl = interrupt_control_registers[i-CYGNUM_HAL_ISR_MIN];
134 *ctl = INT_CONTROL_DEFAULT;
140 // Initialize the hardware. This may involve platform specific code.
143 cyg_hal_hardware_init(void)
146 cyg_hal_platform_hardware_init();
149 /*------------------------------------------------------------------------*/
150 /* End of v850_misc.c */