arch/arm/dts/socfpga_cyclone5_sockit.dts

   1 /*
   2  *  Copyright (C) 2014 Steffen Trumtrar <s.trumtrar@pengutronix.de>
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 #include "socfpga_cyclone5.dtsi"
   8
   9 / {
  10         model = "Terasic SoCkit";
  11         compatible = "altr,socfpga-cyclone5", "altr,socfpga";
  12
  13         chosen {
  14                 bootargs = "console=ttyS0,115200";
  15         };
  16
  17         aliases {
  18                 ethernet0 = &gmac1;
  19         };
  20
  21         memory {
  22                 name = "memory";
  23                 device_type = "memory";
  24                 reg = <0x0 0x40000000>; /* 1GB */
  25         };
  26
  27         soc {
  28                 u-boot,dm-pre-reloc;
  29         };
  30 };
  31
  32 &gmac1 {
  33         status = "okay";
  34         phy-mode = "rgmii";
  35
  36         rxd0-skew-ps = <0>;
  37         rxd1-skew-ps = <0>;
  38         rxd2-skew-ps = <0>;
  39         rxd3-skew-ps = <0>;
  40         txen-skew-ps = <0>;
  41         txc-skew-ps = <2600>;
  42         rxdv-skew-ps = <0>;
  43         rxc-skew-ps = <2000>;
  44 };
  45
  46 &gpio0 {
  47         status = "okay";
  48 };
  49
  50 &gpio1 {
  51         status = "okay";
  52 };
  53
  54 &gpio2 {
  55         status = "okay";
  56 };
  57
  58 &i2c0 {
  59         status = "okay";
  60
  61         rtc: rtc@68 {
  62                 compatible = "stm,m41t82";
  63                 reg = <0x68>;
  64         };
  65 };
  66
  67 &mmc0 {
  68         status = "okay";
  69         u-boot,dm-pre-reloc;
  70 };
  71
  72 &qspi {
  73         status = "okay";
  74         u-boot,dm-pre-reloc;
  75
  76         flash0: n25q00@0 {
  77                 u-boot,dm-pre-reloc;
  78                 #address-cells = <1>;
  79                 #size-cells = <1>;
  80                 compatible = "n25q00", "spi-flash";
  81                 reg = <0>;      /* chip select */
  82                 spi-max-frequency = <50000000>;
  83                 m25p,fast-read;
  84                 page-size = <256>;
  85                 block-size = <16>; /* 2^16, 64KB */
  86                 read-delay = <4>;  /* delay value in read data capture register */
  87                 tshsl-ns = <50>;
  88                 tsd2d-ns = <50>;
  89                 tchsh-ns = <4>;
  90                 tslch-ns = <4>;
  91         };
  92 };