arch/arm/dts/tegra30-apalis.dts

   1 /dts-v1/;
   2
   3 #include "tegra30.dtsi"
   4
   5 / {
   6         model = "Toradex Apalis T30";
   7         compatible = "toradex,apalis_t30", "nvidia,tegra30";
   8
   9         chosen {
  10                 stdout-path = &uarta;
  11         };
  12
  13         aliases {
  14                 i2c0 = "/i2c@7000d000";
  15                 i2c1 = "/i2c@7000c000";
  16                 i2c2 = "/i2c@7000c500";
  17                 i2c3 = "/i2c@7000c700";
  18                 mmc0 = "/sdhci@78000600";
  19                 mmc1 = "/sdhci@78000400";
  20                 mmc2 = "/sdhci@78000000";
  21                 spi0 = "/spi@7000d400";
  22                 spi1 = "/spi@7000dc00";
  23                 spi2 = "/spi@7000de00";
  24                 spi3 = "/spi@7000da00";
  25                 usb0 = "/usb@7d000000";
  26                 usb1 = "/usb@7d004000";
  27                 usb2 = "/usb@7d008000";
  28         };
  29
  30         memory {
  31                 device_type = "memory";
  32                 reg = <0x80000000 0x40000000>;
  33         };
  34
  35         pcie-controller@00003000 {
  36                 status = "okay";
  37                 avdd-pexa-supply = <&vdd2_reg>;
  38                 vdd-pexa-supply = <&vdd2_reg>;
  39                 avdd-pexb-supply = <&vdd2_reg>;
  40                 vdd-pexb-supply = <&vdd2_reg>;
  41                 avdd-pex-pll-supply = <&vdd2_reg>;
  42                 avdd-plle-supply = <&ldo6_reg>;
  43                 vddio-pex-ctl-supply = <&sys_3v3_reg>;
  44                 hvdd-pex-supply = <&sys_3v3_reg>;
  45
  46                 pci@1,0 {
  47                         nvidia,num-lanes = <4>;
  48                 };
  49
  50                 pci@2,0 {
  51                         nvidia,num-lanes = <1>;
  52                 };
  53
  54                 pci@3,0 {
  55                         status = "okay";
  56                         nvidia,num-lanes = <1>;
  57                 };
  58         };
  59
  60         /*
  61          * GEN1_I2C: I2C1_SDA/SCL on MXM3 pin 209/211 (e.g. RTC on carrier
  62          * board)
  63          */
  64         i2c@7000c000 {
  65                 status = "okay";
  66                 clock-frequency = <100000>;
  67         };
  68
  69         /* GEN2_I2C: unused */
  70
  71         /*
  72          * CAM_I2C: I2C3_SDA/SCL on MXM3 pin 201/203 (e.g. camera sensor on
  73          * carrier board)
  74          */
  75         i2c@7000c500 {
  76                 status = "okay";
  77                 clock-frequency = <100000>;
  78         };
  79
  80         /* DDC: I2C2_SDA/SCL on MXM3 pin 205/207 (e.g. display EDID) */
  81         i2c@7000c700 {
  82                 status = "okay";
  83                 clock-frequency = <100000>;
  84         };
  85
  86         /*
  87          * PWR_I2C: power I2C to audio codec, PMIC, temperature sensor and
  88          * touch screen controller
  89          */
  90         i2c@7000d000 {
  91                 status = "okay";
  92                 clock-frequency = <100000>;
  93
  94                 pmic: tps65911@2d {
  95                         compatible = "ti,tps65911";
  96                         reg = <0x2d>;
  97
  98                         interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
  99                         #interrupt-cells = <2>;
 100                         interrupt-controller;
 101
 102                         ti,system-power-controller;
 103
 104                         #gpio-cells = <2>;
 105                         gpio-controller;
 106
 107                         vcc1-supply = <&sys_3v3_reg>;
 108                         vcc2-supply = <&sys_3v3_reg>;
 109                         vcc3-supply = <&vio_reg>;
 110                         vcc4-supply = <&sys_3v3_reg>;
 111                         vcc5-supply = <&sys_3v3_reg>;
 112                         vcc6-supply = <&vio_reg>;
 113                         vcc7-supply = <&charge_pump_5v0_reg>;
 114                         vccio-supply = <&sys_3v3_reg>;
 115
 116                         regulators {
 117                                 #address-cells = <1>;
 118                                 #size-cells = <0>;
 119
 120                                 /* SW1: +V1.35_VDDIO_DDR */
 121                                 vdd1_reg: vdd1 {
 122                                         regulator-name = "vddio_ddr_1v35";
 123                                         regulator-min-microvolt = <1350000>;
 124                                         regulator-max-microvolt = <1350000>;
 125                                         regulator-always-on;
 126                                 };
 127
 128                                 /* SW2: +V1.05 */
 129                                 vdd2_reg: vdd2 {
 130                                         regulator-name =
 131                                                 "vdd_pexa,vdd_pexb,vdd_sata";
 132                                         regulator-min-microvolt = <1050000>;
 133                                         regulator-max-microvolt = <1050000>;
 134                                 };
 135
 136                                 /* SW CTRL: +V1.0_VDD_CPU */
 137                                 vddctrl_reg: vddctrl {
 138                                         regulator-name = "vdd_cpu,vdd_sys";
 139                                         regulator-min-microvolt = <1150000>;
 140                                         regulator-max-microvolt = <1150000>;
 141                                         regulator-always-on;
 142                                 };
 143
 144                                 /* SWIO: +V1.8 */
 145                                 vio_reg: vio {
 146                                         regulator-name = "vdd_1v8_gen";
 147                                         regulator-min-microvolt = <1800000>;
 148                                         regulator-max-microvolt = <1800000>;
 149                                         regulator-always-on;
 150                                 };
 151
 152                                 /* LDO1: unused */
 153
 154                                 /*
 155                                  * EN_+V3.3 switching via FET:
 156                                  * +V3.3_AUDIO_AVDD_S, +V3.3 and +V1.8_VDD_LAN
 157                                  * see also v3_3 fixed supply
 158                                  */
 159                                 ldo2_reg: ldo2 {
 160                                         regulator-name = "en_3v3";
 161                                         regulator-min-microvolt = <3300000>;
 162                                         regulator-max-microvolt = <3300000>;
 163                                         regulator-always-on;
 164                                 };
 165
 166                                 /* +V1.2_CSI */
 167                                 ldo3_reg: ldo3 {
 168                                         regulator-name =
 169                                                 "avdd_dsi_csi,pwrdet_mipi";
 170                                         regulator-min-microvolt = <1200000>;
 171                                         regulator-max-microvolt = <1200000>;
 172                                 };
 173
 174                                 /* +V1.2_VDD_RTC */
 175                                 ldo4_reg: ldo4 {
 176                                         regulator-name = "vdd_rtc";
 177                                         regulator-min-microvolt = <1200000>;
 178                                         regulator-max-microvolt = <1200000>;
 179                                         regulator-always-on;
 180                                 };
 181
 182                                 /*
 183                                  * +V2.8_AVDD_VDAC:
 184                                  * only required for analog RGB
 185                                  */
 186                                 ldo5_reg: ldo5 {
 187                                         regulator-name = "avdd_vdac";
 188                                         regulator-min-microvolt = <2800000>;
 189                                         regulator-max-microvolt = <2800000>;
 190                                         regulator-always-on;
 191                                 };
 192
 193                                 /*
 194                                  * +V1.05_AVDD_PLLE: avdd_plle should be 1.05V
 195                                  * but LDO6 can't set voltage in 50mV
 196                                  * granularity
 197                                  */
 198                                 ldo6_reg: ldo6 {
 199                                         regulator-name = "avdd_plle";
 200                                         regulator-min-microvolt = <1100000>;
 201                                         regulator-max-microvolt = <1100000>;
 202                                 };
 203
 204                                 /* +V1.2_AVDD_PLL */
 205                                 ldo7_reg: ldo7 {
 206                                         regulator-name = "avdd_pll";
 207                                         regulator-min-microvolt = <1200000>;
 208                                         regulator-max-microvolt = <1200000>;
 209                                         regulator-always-on;
 210                                 };
 211
 212                                 /* +V1.0_VDD_DDR_HS */
 213                                 ldo8_reg: ldo8 {
 214                                         regulator-name = "vdd_ddr_hs";
 215                                         regulator-min-microvolt = <1000000>;
 216                                         regulator-max-microvolt = <1000000>;
 217                                         regulator-always-on;
 218                                 };
 219                         };
 220                 };
 221         };
 222
 223         /* SPI1: Apalis SPI1 */
 224         spi@7000d400 {
 225                 status = "okay";
 226                 spi-max-frequency = <25000000>;
 227         };
 228
 229         /* SPI4: CAN2 */
 230         spi@7000da00 {
 231                 status = "okay";
 232                 spi-max-frequency = <25000000>;
 233         };
 234
 235         /* SPI5: Apalis SPI2 */
 236         spi@7000dc00 {
 237                 status = "okay";
 238                 spi-max-frequency = <25000000>;
 239         };
 240
 241         /* SPI6: CAN1 */
 242         spi@7000de00 {
 243                 status = "okay";
 244                 spi-max-frequency = <25000000>;
 245         };
 246
 247         sdhci@78000000 {
 248                 status = "okay";
 249                 bus-width = <4>;
 250                 /* SD1_CD# */
 251                 cd-gpios = <&gpio TEGRA_GPIO(CC, 5) GPIO_ACTIVE_LOW>;
 252         };
 253
 254         sdhci@78000400 {
 255                 status = "okay";
 256                 bus-width = <8>;
 257                 /* MMC1_CD# */
 258                 cd-gpios = <&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_LOW>;
 259         };
 260
 261         sdhci@78000600 {
 262                 status = "okay";
 263                 bus-width = <8>;
 264                 non-removable;
 265         };
 266
 267         /* EHCI instance 0: USB1_DP/N -> USBO1_DP/N */
 268         usb@7d000000 {
 269                 status = "okay";
 270                 dr_mode = "otg";
 271                 /* USBO1_EN */
 272                 nvidia,vbus-gpio = <&gpio TEGRA_GPIO(T, 5) GPIO_ACTIVE_HIGH>;
 273         };
 274
 275         /* EHCI instance 1: USB2_DP/N -> USBH2_DP/N */
 276         usb@7d004000 {
 277                 status = "okay";
 278                 /* USBH_EN */
 279                 nvidia,vbus-gpio = <&gpio TEGRA_GPIO(DD, 1) GPIO_ACTIVE_HIGH>;
 280         };
 281
 282         /* EHCI instance 2: USB3_DP/N -> USBH3_DP/N */
 283         usb@7d008000 {
 284                 status = "okay";
 285                 /* USBH_EN */
 286                 nvidia,vbus-gpio = <&gpio TEGRA_GPIO(DD, 1) GPIO_ACTIVE_HIGH>;
 287         };
 288
 289         clocks {
 290                 compatible = "simple-bus";
 291                 #address-cells = <1>;
 292                 #size-cells = <0>;
 293
 294                 clk32k_in: clk@0 {
 295                         compatible = "fixed-clock";
 296                         reg=<0>;
 297                         #clock-cells = <0>;
 298                         clock-frequency = <32768>;
 299                 };
 300                 clk16m: clk@1 {
 301                         compatible = "fixed-clock";
 302                         reg=<1>;
 303                         #clock-cells = <0>;
 304                         clock-frequency = <16000000>;
 305                         clock-output-names = "clk16m";
 306                 };
 307         };
 308
 309         regulators {
 310                 compatible = "simple-bus";
 311                 #address-cells = <1>;
 312                 #size-cells = <0>;
 313
 314                 sys_3v3_reg: regulator@100 {
 315                         compatible = "regulator-fixed";
 316                         reg = <100>;
 317                         regulator-name = "3v3";
 318                         regulator-min-microvolt = <3300000>;
 319                         regulator-max-microvolt = <3300000>;
 320                         regulator-always-on;
 321                 };
 322
 323                 charge_pump_5v0_reg: regulator@101 {
 324                         compatible = "regulator-fixed";
 325                         reg = <101>;
 326                         regulator-name = "5v0";
 327                         regulator-min-microvolt = <5000000>;
 328                         regulator-max-microvolt = <5000000>;
 329                         regulator-always-on;
 330                 };
 331         };
 332 };