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1 /*
2  * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
3  *
4  * SPDX-License-Identifier:     GPL-2.0+
5  */
6
7 #include <common.h>
8 #include <pci.h>
9 #include <asm/pci.h>
10 #include <asm/arch/device.h>
11
12 DECLARE_GLOBAL_DATA_PTR;
13
14 void board_pci_setup_hose(struct pci_controller *hose)
15 {
16         hose->first_busno = 0;
17         hose->last_busno = 0;
18
19         /* PCI memory space */
20         pci_set_region(hose->regions + 0,
21                        CONFIG_PCI_MEM_BUS,
22                        CONFIG_PCI_MEM_PHYS,
23                        CONFIG_PCI_MEM_SIZE,
24                        PCI_REGION_MEM);
25
26         /* PCI IO space */
27         pci_set_region(hose->regions + 1,
28                        CONFIG_PCI_IO_BUS,
29                        CONFIG_PCI_IO_PHYS,
30                        CONFIG_PCI_IO_SIZE,
31                        PCI_REGION_IO);
32
33         pci_set_region(hose->regions + 2,
34                        CONFIG_PCI_PREF_BUS,
35                        CONFIG_PCI_PREF_PHYS,
36                        CONFIG_PCI_PREF_SIZE,
37                        PCI_REGION_PREFETCH);
38
39         pci_set_region(hose->regions + 3,
40                        0,
41                        0,
42                        gd->ram_size,
43                        PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
44
45         hose->region_count = 4;
46 }
47
48 int board_pci_post_scan(struct pci_controller *hose)
49 {
50         return 0;
51 }
52
53 int pci_skip_dev(struct pci_controller *hose, pci_dev_t dev)
54 {
55         /*
56          * TODO:
57          *
58          * For some unknown reason, the PCI enumeration process hangs
59          * when it scans to the PCIe root port 0 (D23:F0) & 1 (D23:F1).
60          *
61          * For now we just skip these two devices, and this needs to
62          * be revisited later.
63          */
64         if (dev == QUARK_HOST_BRIDGE ||
65             dev == QUARK_PCIE0 || dev == QUARK_PCIE1) {
66                 return 1;
67         }
68
69         return 0;
70 }