2 * Copyright (C) 2014 Eukréa Electromatique
3 * Author: Eric Bénard <eric@eukrea.com>
5 * Configuration settings for the Embest RIoTboard
7 * based on mx6*sabre*.h which are :
8 * Copyright (C) 2012 Freescale Semiconductor, Inc.
10 * SPDX-License-Identifier: GPL-2.0+
13 #ifndef __RIOTBOARD_CONFIG_H
14 #define __RIOTBOARD_CONFIG_H
16 #include <asm/arch/imx-regs.h>
17 #include <asm/imx-common/gpio.h>
19 #include "mx6_common.h"
20 #include <linux/sizes.h>
22 #define CONFIG_SYS_GENERIC_BOARD
24 #define CONFIG_MXC_UART_BASE UART2_BASE
25 #define CONFIG_CONSOLE_DEV "ttymxc1"
26 #define CONFIG_MMCROOT "/dev/mmcblk0p2"
28 #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
31 #define CONFIG_DISPLAY_CPUINFO
32 #define CONFIG_DISPLAY_BOARDINFO
34 #define CONFIG_CMDLINE_TAG
35 #define CONFIG_SETUP_MEMORY_TAGS
36 #define CONFIG_INITRD_TAG
37 #define CONFIG_REVISION_TAG
38 #define CONFIG_IMX6_THERMAL
40 /* Size of malloc() pool */
41 #define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
43 #define CONFIG_BOARD_EARLY_INIT_F
44 #define CONFIG_BOARD_LATE_INIT
45 #define CONFIG_MXC_GPIO
47 #define CONFIG_MXC_UART
49 #define CONFIG_CMD_FUSE
50 #ifdef CONFIG_CMD_FUSE
51 #define CONFIG_MXC_OCOTP
55 #define CONFIG_CMD_I2C
56 #define CONFIG_SYS_I2C
57 #define CONFIG_SYS_I2C_MXC
58 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
59 #define CONFIG_SYS_I2C_SPEED 100000
62 #define CONFIG_CMD_USB
63 #define CONFIG_USB_EHCI
64 #define CONFIG_USB_EHCI_MX6
65 #define CONFIG_USB_STORAGE
66 #define CONFIG_USB_HOST_ETHER
67 #define CONFIG_USB_ETHER_ASIX
68 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
69 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */
70 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
71 #define CONFIG_MXC_USB_FLAGS 0
74 #define CONFIG_FSL_ESDHC
75 #define CONFIG_FSL_USDHC
76 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
79 #define CONFIG_CMD_MMC
80 #define CONFIG_GENERIC_MMC
81 #define CONFIG_BOUNCE_BUFFER
83 #define CONFIG_FEC_MXC
85 #define IMX_FEC_BASE ENET_BASE_ADDR
86 #define CONFIG_FEC_XCV_TYPE RGMII
87 #define CONFIG_ETHPRIME "FEC"
88 #define CONFIG_FEC_MXC_PHYADDR 4
91 #define CONFIG_PHY_ATHEROS
95 #define CONFIG_SPI_FLASH
96 #define CONFIG_SPI_FLASH_SST
97 #define CONFIG_MXC_SPI
98 #define CONFIG_SF_DEFAULT_BUS 0
99 #define CONFIG_SF_DEFAULT_CS 0
100 #define CONFIG_SF_DEFAULT_SPEED 20000000
101 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
104 /* allow to overwrite serial and ethaddr */
105 #define CONFIG_ENV_OVERWRITE
106 #define CONFIG_CONS_INDEX 1
107 #define CONFIG_BAUDRATE 115200
109 /* Command definition */
110 #include <config_cmd_default.h>
111 #undef CONFIG_CMD_FPGA
113 #define CONFIG_CMD_BMODE
114 #define CONFIG_CMD_SETEXPR
115 #undef CONFIG_CMD_IMLS
117 #define CONFIG_LOADADDR 0x12000000
118 #define CONFIG_SYS_TEXT_BASE 0x17800000
120 #ifdef CONFIG_SUPPORT_EMMC_BOOT
123 "update_emmc_firmware=" \
124 "if test ${ip_dyn} = yes; then " \
125 "setenv get_cmd dhcp; " \
127 "setenv get_cmd tftp; " \
129 "if ${get_cmd} ${update_sd_firmware_filename}; then " \
130 "if mmc dev ${emmcdev}; then " \
131 "setexpr fw_sz ${filesize} / 0x200; " \
132 "setexpr fw_sz ${fw_sz} + 1; " \
133 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \
142 "update_spi_firmware=" \
143 "if test ${ip_dyn} = yes; then " \
144 "setenv get_cmd dhcp; " \
146 "setenv get_cmd tftp; " \
148 "if ${get_cmd} ${update_spi_firmware_filename}; then " \
149 "if sf probe; then " \
150 "sf erase 0 0xc0000; " \
151 "sf write ${loadaddr} 0x400 ${filesize}; " \
158 #define CONFIG_EXTRA_ENV_SETTINGS \
159 "script=boot.scr\0" \
161 "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
162 "fdt_addr=0x18000000\0" \
165 "console=" CONFIG_CONSOLE_DEV "\0" \
166 "fdt_high=0xffffffff\0" \
167 "initrd_high=0xffffffff\0" \
168 "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
170 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
171 "update_sd_firmware=" \
172 "if test ${ip_dyn} = yes; then " \
173 "setenv get_cmd dhcp; " \
175 "setenv get_cmd tftp; " \
177 "if mmc dev ${mmcdev}; then " \
178 "if ${get_cmd} ${update_sd_firmware_filename}; then " \
179 "setexpr fw_sz ${filesize} / 0x200; " \
180 "setexpr fw_sz ${fw_sz} + 1; " \
181 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \
186 "mmcargs=setenv bootargs console=${console},${baudrate} " \
187 "root=${mmcroot}\0" \
189 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
190 "bootscript=echo Running bootscript from mmc ...; " \
192 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
193 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
194 "mmcboot=echo Booting from mmc ...; " \
196 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
197 "if run loadfdt; then " \
198 "bootz ${loadaddr} - ${fdt_addr}; " \
200 "if test ${boot_fdt} = try; then " \
203 "echo WARN: Cannot load the DT; " \
209 "netargs=setenv bootargs console=${console},${baudrate} " \
211 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
212 "netboot=echo Booting from net ...; " \
214 "if test ${ip_dyn} = yes; then " \
215 "setenv get_cmd dhcp; " \
217 "setenv get_cmd tftp; " \
219 "${get_cmd} ${image}; " \
220 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
221 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
222 "bootz ${loadaddr} - ${fdt_addr}; " \
224 "if test ${boot_fdt} = try; then " \
227 "echo WARN: Cannot load the DT; " \
234 #define CONFIG_BOOTCOMMAND \
235 "mmc dev ${mmcdev};" \
236 "if mmc rescan; then " \
237 "if run loadbootscript; then " \
240 "if run loadimage; then " \
242 "else run netboot; " \
245 "else run netboot; fi"
247 #define CONFIG_ARP_TIMEOUT 200UL
249 /* Miscellaneous configurable options */
250 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
251 #define CONFIG_SYS_CBSIZE 256
253 /* Print Buffer Size */
254 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
255 #define CONFIG_SYS_MAXARGS 16
256 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
258 #define CONFIG_SYS_MEMTEST_START 0x10000000
259 #define CONFIG_SYS_MEMTEST_END 0x10010000
260 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
262 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
264 #define CONFIG_STACKSIZE (128 * 1024)
266 /* Physical Memory Map */
267 #define CONFIG_NR_DRAM_BANKS 1
268 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
270 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
271 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
272 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
274 #define CONFIG_SYS_INIT_SP_OFFSET \
275 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
276 #define CONFIG_SYS_INIT_SP_ADDR \
277 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
279 /* FLASH and environment organization */
280 #define CONFIG_SYS_NO_FLASH
282 #define CONFIG_ENV_SIZE (8 * 1024)
284 #if defined(CONFIG_ENV_IS_IN_MMC)
286 #define CONFIG_DEFAULT_FDT_FILE "imx6dl-riotboard.dtb"
287 #define CONFIG_SYS_FSL_USDHC_NUM 3
288 #define CONFIG_SYS_MMC_ENV_DEV 0 /* SDHC2 */
289 #define CONFIG_ENV_OFFSET (6 * 64 * 1024)
290 #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
291 #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
293 #define CONFIG_DEFAULT_FDT_FILE "imx6q-marsboard.dtb"
294 #define CONFIG_SYS_FSL_USDHC_NUM 2
295 #define CONFIG_ENV_OFFSET (768 * 1024)
296 #define CONFIG_ENV_SECT_SIZE (8 * 1024)
297 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
298 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
299 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
300 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
303 #ifndef CONFIG_SYS_DCACHE_OFF
304 #define CONFIG_CMD_CACHE
309 #define CONFIG_VIDEO_IPUV3
310 #define CONFIG_CFB_CONSOLE
311 #define CONFIG_VGA_AS_SINGLE_DEVICE
312 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
313 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
314 #define CONFIG_VIDEO_BMP_RLE8
315 #define CONFIG_SPLASH_SCREEN
316 #define CONFIG_SPLASH_SCREEN_ALIGN
317 #define CONFIG_BMP_16BPP
318 #define CONFIG_VIDEO_LOGO
319 #define CONFIG_VIDEO_BMP_LOGO
320 #define CONFIG_IPUV3_CLK 260000000
321 #define CONFIG_IMX_HDMI
322 #define CONFIG_IMX_VIDEO_SKIP
324 #include <config_distro_defaults.h>
326 #endif /* __RIOTBOARD_CONFIG_H */