COBJS-$(CONFIG_LTC3676) += ltc3676.o
COBJS-$(CONFIG_RN5T567) += rn5t567.o
COBJS-$(CONFIG_RN5T618) += rn5t618.o
-
+COBJS-y += pmic.o
COBJS-$(CONFIG_CMD_ROMUPDATE) += flash.o
SOBJS-y := lowlevel_init.o
return pad_settings & 1;
}
-static int ltc3676_setup_regs(struct ltc3676_regs *r, size_t count)
+static int ltc3676_setup_regs(uchar slave_addr, struct ltc3676_regs *r,
+ size_t count)
{
int ret;
int i;
#ifdef DEBUG
unsigned char value;
- ret = i2c_read(CONFIG_SYS_I2C_SLAVE, r->addr, 1, &value, 1);
+ ret = i2c_read(slave_addr, r->addr, 1, &value, 1);
if ((value & ~r->mask) != r->val) {
printf("Changing PMIC reg %02x from %02x to %02x\n",
r->addr, value, r->val);
return ret;
}
#endif
- ret = i2c_write(CONFIG_SYS_I2C_SLAVE,
- r->addr, 1, &r->val, 1);
+ ret = i2c_write(slave_addr, r->addr, 1, &r->val, 1);
if (ret) {
printf("%s: failed to write PMIC register %02x: %d\n",
__func__, r->addr, ret);
return 0;
}
-int setup_pmic_voltages(void)
+int ltc3676_pmic_setup(uchar slave_addr)
{
int ret;
unsigned char value;
- ret = i2c_probe(CONFIG_SYS_I2C_SLAVE);
- if (ret != 0) {
- printf("Failed to initialize I2C\n");
- return ret;
- }
-
- ret = i2c_read(CONFIG_SYS_I2C_SLAVE, 0x11, 1, &value, 1);
+ ret = i2c_read(slave_addr, 0x11, 1, &value, 1);
if (ret) {
printf("%s: i2c_read error: %d\n", __func__, ret);
return ret;
}
- ret = ltc3676_setup_regs(ltc3676_regs, ARRAY_SIZE(ltc3676_regs));
+ ret = ltc3676_setup_regs(slave_addr, ltc3676_regs,
+ ARRAY_SIZE(ltc3676_regs));
if (ret)
return ret;
DIV_ROUND(vref_to_vout(regval_to_mV(VDD_SOC_VAL), 6), 10));
if (tx6_rev_2()) {
- ret = ltc3676_setup_regs(ltc3676_regs_2,
+ ret = ltc3676_setup_regs(slave_addr, ltc3676_regs_2,
ARRAY_SIZE(ltc3676_regs_2));
printf("VDDIO set to %umV\n",
DIV_ROUND(vref_to_vout(
regval_to_mV(VDD_IO_VAL_2), 5_2), 10));
} else {
- ret = ltc3676_setup_regs(ltc3676_regs_1,
+ ret = ltc3676_setup_regs(slave_addr, ltc3676_regs_1,
ARRAY_SIZE(ltc3676_regs_1));
}
return ret;
--- /dev/null
+/*
+ * Copyright (C) 2015 Lothar Waßmann <LW@KARO-electronics.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <common.h>
+#include <i2c.h>
+
+#include "pmic.h"
+
+static struct {
+ uchar addr;
+ int (*init)(uchar addr);
+} i2c_addrs[] = {
+#ifdef CONFIG_LTC3676
+ { 0x3c, ltc3676_pmic_setup, },
+#endif
+#ifdef CONFIG_RN5T618
+ { 0x32, rn5t618_pmic_setup, },
+#endif
+#ifdef CONFIG_RN5T567
+ { 0x33, rn5t567_pmic_setup, },
+#endif
+};
+
+int tx6_pmic_init(void)
+{
+ int ret;
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(i2c_addrs); i++) {
+ ret = i2c_probe(i2c_addrs[i].addr);
+ if (ret == 0) {
+ i2c_addrs[i].init(i2c_addrs[i].addr);
+ break;
+ }
+ }
+ return ret;
+}
*
*/
-int setup_pmic_voltages(void);
+int ltc3676_pmic_setup(uchar addr);
+int rn5t618_pmic_setup(uchar addr);
+int rn5t567_pmic_setup(uchar addr);
+
+int tx6_pmic_init(void);
{ 0xbc, 1, },
};
-static int rn5t567_setup_regs(struct rn5t567_regs *r, size_t count)
+static int rn5t567_setup_regs(uchar slave_addr, struct rn5t567_regs *r,
+ size_t count)
{
int ret;
int i;
#ifdef DEBUG
unsigned char value;
- ret = i2c_read(CONFIG_SYS_I2C_SLAVE, r->addr, 1, &value, 1);
+ ret = i2c_read(slave_addr, r->addr, 1, &value, 1);
if ((value & ~r->mask) != r->val) {
printf("Changing PMIC reg %02x from %02x to %02x\n",
r->addr, value, r->val);
}
#endif
// value = (value & ~r->mask) | r->val;
- ret = i2c_write(CONFIG_SYS_I2C_SLAVE,
- r->addr, 1, &r->val, 1);
+ ret = i2c_write(slave_addr, r->addr, 1, &r->val, 1);
if (ret) {
printf("%s: failed to write PMIC register %02x: %d\n",
__func__, r->addr, ret);
return ret;
}
#ifdef DEBUG
- ret = i2c_read(CONFIG_SYS_I2C_SLAVE, r->addr, 1, &value, 1);
+ ret = i2c_read(slave_addr, r->addr, 1, &value, 1);
printf("PMIC reg %02x is %02x\n", r->addr, value);
#endif
}
for (j = r->addr; j < r->addr + r->val; j++) {
unsigned char value;
- ret = i2c_read(CONFIG_SYS_I2C_SLAVE, j, 1, &value, 1);
+ ret = i2c_read(slave_addr, j, 1, &value, 1);
printf("PMIC reg %02x = %02x\n",
j, value);
}
return 0;
}
-int setup_pmic_voltages(void)
+int rn5t567_pmic_setup(uchar slave_addr)
{
int ret;
unsigned char value;
- ret = i2c_probe(CONFIG_SYS_I2C_SLAVE);
- if (ret != 0) {
- printf("Failed to initialize I2C\n");
- return ret;
- }
-
- ret = i2c_read(CONFIG_SYS_I2C_SLAVE, 0x11, 1, &value, 1);
+ ret = i2c_read(slave_addr, 0x11, 1, &value, 1);
if (ret) {
printf("%s: i2c_read error: %d\n", __func__, ret);
return ret;
}
- ret = rn5t567_setup_regs(rn5t567_regs, ARRAY_SIZE(rn5t567_regs));
+ ret = rn5t567_setup_regs(slave_addr, rn5t567_regs,
+ ARRAY_SIZE(rn5t567_regs));
if (ret)
return ret;
u8 val;
u8 mask;
} rn5t618_regs[] = {
-#if CONFIG_TX6_REV == 2
{ RN5T618_NOETIMSET, 0, },
{ RN5T618_DC1DAC, VDD_CORE_VAL, },
{ RN5T618_DC2DAC, VDD_SOC_VAL, },
{ RN5T618_LDO3DAC, VDD_HIGH_VAL, },
{ RN5T618_LDORTCDAC, VDD_RTC_VAL, },
{ RN5T618_LDORTC1_SLOT, 0x0f, ~0x3f, },
-#elif CONFIG_TX6_REV == 3
- { RN5T618_NOETIMSET, 0, },
- { RN5T618_DC1DAC, VDD_CORE_VAL, },
- { RN5T618_DC2DAC, VDD_SOC_VAL, },
- { RN5T618_DC3DAC, VDD_DDR_VAL, },
- { RN5T618_DC1DAC_SLP, VDD_CORE_VAL_LP, },
- { RN5T618_DC2DAC_SLP, VDD_SOC_VAL_LP, },
- { RN5T618_DC3DAC_SLP, VDD_DDR_VAL_LP, },
- { RN5T618_LDOEN1, 0x01f, ~0x1f, },
- { RN5T618_LDOEN2, 0x10, ~0x30, },
- { RN5T618_LDODIS, 0x00, },
- { RN5T618_LDO3DAC, VDD_HIGH_VAL, },
- { RN5T618_LDORTCDAC, VDD_RTC_VAL, },
- { RN5T618_LDORTC1_SLOT, 0x0f, ~0x3f, },
-#else
-#error Unsupported TX6 module revision
-#endif
};
-static int rn5t618_setup_regs(struct rn5t618_regs *r, size_t count)
+static int rn5t618_setup_regs(uchar slave_addr, struct rn5t618_regs *r,
+ size_t count)
{
int ret;
int i;
for (i = 0; i < count; i++, r++) {
unsigned char value;
- ret = i2c_read(CONFIG_SYS_I2C_SLAVE, r->addr, 1, &value, 1);
- printf("PMIC reg %02x = %02x\n",
- r->addr, value);
+ ret = i2c_read(slave_addr, r->addr, 1, &value, 1);
+ debug("PMIC reg %02x = %02x\n", r->addr, value);
}
for (i = 0; i < count; i++, r++) {
#ifdef DEBUG
unsigned char value;
- ret = i2c_read(CONFIG_SYS_I2C_SLAVE, r->addr, 1, &value, 1);
+ ret = i2c_read(slave_addr, r->addr, 1, &value, 1);
if ((value & ~r->mask) != r->val) {
printf("Changing PMIC reg %02x from %02x to %02x\n",
r->addr, value, r->val);
return ret;
}
#endif
- ret = i2c_write(CONFIG_SYS_I2C_SLAVE,
- r->addr, 1, &r->val, 1);
+ ret = i2c_write(slave_addr, r->addr, 1, &r->val, 1);
if (ret) {
printf("%s: failed to write PMIC register %02x: %d\n",
__func__, r->addr, ret);
return ret;
}
#ifdef DEBUG
- ret = i2c_read(CONFIG_SYS_I2C_SLAVE, r->addr, 1, &value, 1);
+ ret = i2c_read(slave_addr, r->addr, 1, &value, 1);
printf("PMIC reg %02x is %02x\n", r->addr, value);
#endif
}
return 0;
}
-int setup_pmic_voltages(void)
+int rn5t618_pmic_setup(uchar slave_addr)
{
int ret;
unsigned char value;
- ret = i2c_probe(CONFIG_SYS_I2C_SLAVE);
- if (ret != 0) {
- printf("Failed to initialize I2C\n");
- return ret;
- }
-
- ret = i2c_read(CONFIG_SYS_I2C_SLAVE, 0x11, 1, &value, 1);
+ ret = i2c_read(slave_addr, 0x11, 1, &value, 1);
if (ret) {
printf("%s: i2c_read error: %d\n", __func__, ret);
return ret;
}
- ret = rn5t618_setup_regs(rn5t618_regs, ARRAY_SIZE(rn5t618_regs));
+ ret = rn5t618_setup_regs(slave_addr, rn5t618_regs,
+ ARRAY_SIZE(rn5t618_regs));
if (ret)
return ret;
/*
- * Copyright (C) 2012,2013 Lothar Waßmann <LW@KARO-electronics.de>
+ * Copyright (C) 2012-2015 Lothar Waßmann <LW@KARO-electronics.de>
*
* See file CREDITS for list of people who contributed to this
* project.
* GNU General Public License for more details.
*
*/
-
#include <common.h>
#include <errno.h>
#include <libfdt.h>
return 1;
}
- ret = setup_pmic_voltages();
+ ret = tx6_pmic_init();
if (ret) {
printf("Failed to setup PMIC voltages\n");
hang();
if (cfg->cd_gpio < 0)
return 1;
- debug("SD card %d is %spresent\n",
+ debug("SD card %d is %spresent (GPIO %d)\n",
cfg - tx6qdl_esdhc_cfg,
- gpio_get_value(cfg->cd_gpio) ? "NOT " : "");
+ gpio_get_value(cfg->cd_gpio) ? "NOT " : "",
+ cfg->cd_gpio);
return !gpio_get_value(cfg->cd_gpio);
}
}
#ifdef CONFIG_NO_NAND
-#ifdef CONFIG_MMC_BOOT_SIZE
-#define TX6_FLASH_SZ (CONFIG_MMC_BOOT_SIZE / 1024 - 1 + 2)
-#else
-#define TX6_FLASH_SZ 3
-#endif
+#define TX6_FLASH_SZ (CONFIG_MMC_BOOT_SIZE / 4096 + 2)
#else /* CONFIG_NO_NAND */
#define TX6_FLASH_SZ (CONFIG_SYS_NAND_BLOCKS / 1024 - 1)
#endif /* CONFIG_NO_NAND */
#define TX6_DDR_SZ 2
#endif
-#if CONFIG_TX6_REV >= 0x3
static char tx6_mem_table[] = {
- '4', /* 256MiB SDRAM; 128MiB NAND */
- '1', /* 512MiB SDRAM; 128MiB NAND */
- '0', /* 1GiB SDRAM; 128MiB NAND */
- '?', /* 256MiB SDRAM; 256MiB NAND */
- '?', /* 512MiB SDRAM; 256MiB NAND */
- '2', /* 1GiB SDRAM; 256MiB NAND */
- '?', /* 256MiB SDRAM; 4GiB eMMC */
- '5', /* 512MiB SDRAM; 4GiB eMMC */
- '3', /* 1GiB SDRAM; 4GiB eMMC */
- '?', /* 256MiB SDRAM; 8GiB eMMC */
- '?', /* 512MiB SDRAM; 8GiB eMMC */
- '?', /* 1GiB SDRAM; 8GiB eMMC */
+ '4', /* 256MiB SDRAM 16bit; 128MiB NAND */
+ '1', /* 512MiB SDRAM 32bit; 128MiB NAND */
+ '0', /* 1GiB SDRAM 64bit; 128MiB NAND */
+ '?', /* 256MiB SDRAM 16bit; 256MiB NAND */
+ '?', /* 512MiB SDRAM 32bit; 256MiB NAND */
+ '2', /* 1GiB SDRAM 64bit; 256MiB NAND */
+ '?', /* 256MiB SDRAM 16bit; 4GiB eMMC */
+ '5', /* 512MiB SDRAM 32bit; 4GiB eMMC */
+ '3', /* 1GiB SDRAM 64bit; 4GiB eMMC */
+ '?', /* 256MiB SDRAM 16bit; 8GiB eMMC */
+ '?', /* 512MiB SDRAM 32bit; 8GiB eMMC */
+ '0', /* 1GiB SDRAM 64bit; 8GiB eMMC */
};
static inline char tx6_mem_suffix(void)
return tx6_mem_table[mem_idx];
};
-#else /* CONFIG_TX6_REV >= 0x3 */
-static inline char tx6_mem_suffix(void)
+
+static struct {
+ uchar addr;
+ uchar rev;
+} tx6_mod_revs[] = {
+ { 0x3c, 1, },
+ { 0x32, 2, },
+ { 0x33, 3, },
+};
+
+static int tx6_get_mod_rev(void)
{
-#ifdef CONFIG_SYS_SDRAM_BUS_WIDTH
- if (CONFIG_SYS_SDRAM_BUS_WIDTH == 32)
- return '1';
-#endif
-#ifdef CONFIG_SYS_NAND_BLOCKS
- if (CONFIG_SYS_NAND_BLOCKS == 2048)
- return '2';
-#endif
- return '0';
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(tx6_mod_revs); i++) {
+ int ret = i2c_probe(tx6_mod_revs[i].addr);
+ if (ret == 0) {
+ debug("I2C probe succeeded for addr %02x\n", tx6_mod_revs[i].addr);
+ return tx6_mod_revs[i].rev;
+ }
+ debug("I2C probe returned %d for addr %02x\n", ret,
+ tx6_mod_revs[i].addr);
+ }
+ return 0;
}
-#endif /* CONFIG_TX6_REV >= 0x3 */
int checkboard(void)
{
tx6qdl_print_cpuinfo();
+ i2c_init(CONFIG_SYS_I2C_SPEED, 0 /* unused */);
+
printf("Board: Ka-Ro TX6%s-%d%d%d%c\n",
tx6_mod_suffix,
cpu_variant == MXC_CPU_MX6Q ? 1 : 8,
- is_lvds(), CONFIG_TX6_REV,
+ is_lvds(), tx6_get_mod_rev(),
tx6_mem_suffix());
return 0;
tx53-x130 arm armv7 tx53 karo mx5 tx53:NR_DRAM_BANKS=1,SYS_LVDS_IF
tx53-x131 arm armv7 tx53 karo mx5 tx53:NR_DRAM_BANKS=2,SYS_LVDS_IF
tx53-1232 arm armv7 tx53 karo mx5 tx53:NR_DRAM_BANKS=2,SYS_SDRAM_SIZE=SZ_2G
-tx6q-1010 arm armv7 tx6 karo mx6 tx6:MX6Q
-tx6q-1010_mfg arm armv7 tx6 karo mx6 tx6:MX6Q,MFG
-tx6q-1010_noenv arm armv7 tx6 karo mx6 tx6:MX6Q,ENV_IS_NOWHERE
-tx6q-1020 arm armv7 tx6 karo mx6 tx6:MX6Q,ENV_IS_IN_MMC,NO_NAND,TX6_REV=0x2
-tx6q-1020_mfg arm armv7 tx6 karo mx6 tx6:MX6Q,ENV_IS_IN_MMC,NO_NAND,MFG,TX6_REV=0x2
-tx6q-1020_noenv arm armv7 tx6 karo mx6 tx6:MX6Q,ENV_IS_NOWHERE,NO_NAND,TX6_REV=0x2
-tx6q-1030 arm armv7 tx6 karo mx6 tx6:MX6Q,TX6_REV=0x3
-tx6q-1030_mfg arm armv7 tx6 karo mx6 tx6:MX6Q,MFG,TX6_REV=0x3
-tx6q-1030_noenv arm armv7 tx6 karo mx6 tx6:MX6Q,ENV_IS_NOWHERE,TX6_REV=0x3
-tx6q-1110 arm armv7 tx6 karo mx6 tx6:MX6Q,SYS_LVDS_IF
-tx6q-1110_mfg arm armv7 tx6 karo mx6 tx6:MX6Q,MFG,SYS_LVDS_IF
-tx6q-1110_noenv arm armv7 tx6 karo mx6 tx6:MX6Q,ENV_IS_NOWHERE,SYS_LVDS_IF
-tx6q-1130 arm armv7 tx6 karo mx6 tx6:MX6Q,SYS_LVDS_IF,TX6_REV=0x3
-tx6q-1130_mfg arm armv7 tx6 karo mx6 tx6:MX6Q,MFG,SYS_LVDS_IF,TX6_REV=0x3
-tx6q-1130_noenv arm armv7 tx6 karo mx6 tx6:MX6Q,ENV_IS_NOWHERE,SYS_LVDS_IF,TX6_REV=0x3
+tx6q-10x0 arm armv7 tx6 karo mx6 tx6:MX6Q
+tx6q-10x0_mfg arm armv7 tx6 karo mx6 tx6:MX6Q,MFG
+tx6q-10x0_noenv arm armv7 tx6 karo mx6 tx6:MX6Q,ENV_IS_NOWHERE
+tx6q-1020 arm armv7 tx6 karo mx6 tx6:MX6Q,ENV_IS_IN_MMC,MMC_BOOT_SIZE=4096,NO_NAND,TX6_REV=0x2
+tx6q-1020_mfg arm armv7 tx6 karo mx6 tx6:MX6Q,ENV_IS_IN_MMC,MMC_BOOT_SIZE=4096,NO_NAND,MFG,TX6_REV=0x2
+tx6q-1020_noenv arm armv7 tx6 karo mx6 tx6:MX6Q,ENV_IS_NOWHERE,MMC_BOOT_SIZE=4096,NO_NAND,TX6_REV=0x2
+tx6q-1033 arm armv7 tx6 karo mx6 tx6:MX6Q,ENV_IS_IN_MMC,MMC_BOOT_SIZE=1024,NO_NAND,TX6_REV=0x3
+tx6q-1033_mfg arm armv7 tx6 karo mx6 tx6:MX6Q,ENV_IS_IN_MMC,MFG,MMC_BOOT_SIZE=1024,NO_NAND,TX6_REV=0x3
+tx6q-1033_noenv arm armv7 tx6 karo mx6 tx6:MX6Q,ENV_IS_NOWHERE,MMC_BOOT_SIZE=1024,NO_NAND,TX6_REV=0x3
+tx6q-11x0 arm armv7 tx6 karo mx6 tx6:MX6Q,SYS_LVDS_IF
+tx6q-11x0_mfg arm armv7 tx6 karo mx6 tx6:MX6Q,MFG,SYS_LVDS_IF
+tx6q-11x0_noenv arm armv7 tx6 karo mx6 tx6:MX6Q,ENV_IS_NOWHERE,SYS_LVDS_IF
tx6s-8034 arm armv7 tx6 karo mx6 tx6:MX6S,SYS_SDRAM_BUS_WIDTH=16,TX6_REV=0x3
tx6s-8034_mfg arm armv7 tx6 karo mx6 tx6:MX6S,MFG,SYS_SDRAM_BUS_WIDTH=16,TX6_REV=0x3
tx6s-8034_noenv arm armv7 tx6 karo mx6 tx6:MX6S,ENV_IS_NOWHERE,SYS_SDRAM_BUS_WIDTH=16,TX6_REV=0x3
tx6s-8035 arm armv7 tx6 karo mx6 tx6:MX6S,ENV_IS_IN_MMC,MMC_BOOT_SIZE=1024,NO_NAND,SYS_SDRAM_BUS_WIDTH=32,TX6_REV=0x3
tx6s-8035_mfg arm armv7 tx6 karo mx6 tx6:MX6S,ENV_IS_IN_MMC,MFG,MMC_BOOT_SIZE=1024,NO_NAND,SYS_SDRAM_BUS_WIDTH=32,TX6_REV=0x3
tx6s-8035_noenv arm armv7 tx6 karo mx6 tx6:MX6S,ENV_IS_NOWHERE,MMC_BOOT_SIZE=1024,NO_NAND,SYS_SDRAM_BUS_WIDTH=32,TX6_REV=0x3
-tx6u-8010 arm armv7 tx6 karo mx6 tx6:MX6DL
-tx6u-8010_mfg arm armv7 tx6 karo mx6 tx6:MX6DL,MFG
-tx6u-8010_noenv arm armv7 tx6 karo mx6 tx6:MX6DL,ENV_IS_NOWHERE
-tx6u-8011 arm armv7 tx6 karo mx6 tx6:MX6DL,SYS_SDRAM_BUS_WIDTH=32
-tx6u-8011_mfg arm armv7 tx6 karo mx6 tx6:MX6DL,SYS_SDRAM_BUS_WIDTH=32,MFG
-tx6u-8011_noenv arm armv7 tx6 karo mx6 tx6:MX6DL,SYS_SDRAM_BUS_WIDTH=32,ENV_IS_NOWHERE
-tx6u-8012 arm armv7 tx6 karo mx6 tx6:MX6DL,SYS_NAND_BLOCKS=2048
-tx6u-8012_mfg arm armv7 tx6 karo mx6 tx6:MX6DL,SYS_NAND_BLOCKS=2048,MFG
-tx6u-8012_noenv arm armv7 tx6 karo mx6 tx6:MX6DL,SYS_NAND_BLOCKS=2048,ENV_IS_NOWHERE
-tx6u-8110 arm armv7 tx6 karo mx6 tx6:MX6DL,SYS_LVDS_IF
-tx6u-8110_mfg arm armv7 tx6 karo mx6 tx6:MX6DL,MFG,SYS_LVDS_IF
-tx6u-8110_noenv arm armv7 tx6 karo mx6 tx6:MX6DL,ENV_IS_NOWHERE,SYS_LVDS_IF
-tx6u-8111 arm armv7 tx6 karo mx6 tx6:MX6DL,SYS_SDRAM_BUS_WIDTH=32,SYS_LVDS_IF
-tx6u-8111_mfg arm armv7 tx6 karo mx6 tx6:MX6DL,SYS_SDRAM_BUS_WIDTH=32,MFG,SYS_LVDS_IF
-tx6u-8111_noenv arm armv7 tx6 karo mx6 tx6:MX6DL,SYS_SDRAM_BUS_WIDTH=32,ENV_IS_NOWHERE,SYS_LVDS_IF
-tx6u-8030 arm armv7 tx6 karo mx6 tx6:MX6DL,TX6_REV=0x3
-tx6u-8030_mfg arm armv7 tx6 karo mx6 tx6:MX6DL,MFG,TX6_REV=0x3
-tx6u-8030_noenv arm armv7 tx6 karo mx6 tx6:MX6DL,ENV_IS_NOWHERE,TX6_REV=0x3
+tx6u-80x0 arm armv7 tx6 karo mx6 tx6:MX6DL
+tx6u-80x0_mfg arm armv7 tx6 karo mx6 tx6:MX6DL,MFG
+tx6u-80x0_noenv arm armv7 tx6 karo mx6 tx6:MX6DL,ENV_IS_NOWHERE
+tx6u-8011 arm armv7 tx6 karo mx6 tx6:MX6DL,SYS_SDRAM_BUS_WIDTH=32,TX6_REV=0x1
+tx6u-8011_mfg arm armv7 tx6 karo mx6 tx6:MX6DL,SYS_SDRAM_BUS_WIDTH=32,MFG,TX6_REV=0x1
+tx6u-8011_noenv arm armv7 tx6 karo mx6 tx6:MX6DL,SYS_SDRAM_BUS_WIDTH=32,ENV_IS_NOWHERE,TX6_REV=0x1
+tx6u-8012 arm armv7 tx6 karo mx6 tx6:MX6DL,SYS_NAND_BLOCKS=2048,TX6_REV=0x1
+tx6u-8012_mfg arm armv7 tx6 karo mx6 tx6:MX6DL,SYS_NAND_BLOCKS=2048,MFG,TX6_REV=0x1
+tx6u-8012_noenv arm armv7 tx6 karo mx6 tx6:MX6DL,SYS_NAND_BLOCKS=2048,ENV_IS_NOWHERE,TX6_REV=0x1
+tx6u-81x0 arm armv7 tx6 karo mx6 tx6:MX6DL,SYS_LVDS_IF
+tx6u-81x0_mfg arm armv7 tx6 karo mx6 tx6:MX6DL,MFG,SYS_LVDS_IF
+tx6u-81x0_noenv arm armv7 tx6 karo mx6 tx6:MX6DL,ENV_IS_NOWHERE,SYS_LVDS_IF
+tx6u-8111 arm armv7 tx6 karo mx6 tx6:MX6DL,SYS_SDRAM_BUS_WIDTH=32,SYS_LVDS_IF,TX6_REV=0x1
+tx6u-8111_mfg arm armv7 tx6 karo mx6 tx6:MX6DL,SYS_SDRAM_BUS_WIDTH=32,MFG,SYS_LVDS_IF,TX6_REV=0x1
+tx6u-8111_noenv arm armv7 tx6 karo mx6 tx6:MX6DL,SYS_SDRAM_BUS_WIDTH=32,ENV_IS_NOWHERE,SYS_LVDS_IF,TX6_REV=0x1
tx6u-8033 arm armv7 tx6 karo mx6 tx6:MX6DL,ENV_IS_IN_MMC,MMC_BOOT_SIZE=1024,NO_NAND,TX6_REV=0x3
tx6u-8033_mfg arm armv7 tx6 karo mx6 tx6:MX6DL,ENV_IS_IN_MMC,MFG,MMC_BOOT_SIZE=1024,NO_NAND,TX6_REV=0x3
tx6u-8033_noenv arm armv7 tx6 karo mx6 tx6:MX6DL,ENV_IS_NOWHERE,MMC_BOOT_SIZE=1024,NO_NAND,TX6_REV=0x3
/*
* Ka-Ro TX6 board - SoC configuration
*/
-#ifndef CONFIG_TX6_REV
-#define CONFIG_TX6_REV 0x1 /* '1' would be converted to 'y' by define2mk.sed */
-#endif
#define CONFIG_MX6
#define CONFIG_SYS_MX6_HCLK 24000000
#define CONFIG_SYS_MX6_CLK32 32768
#define CONFIG_SYS_I2C_BASE I2C1_BASE_ADDR
#define CONFIG_SYS_I2C_MX6_PORT1
#define CONFIG_SYS_I2C_SPEED 400000
+#if defined(CONFIG_TX6_REV)
#if CONFIG_TX6_REV == 0x1
#define CONFIG_SYS_I2C_SLAVE 0x3c
#define CONFIG_LTC3676
#else
#error Unsupported TX6 module revision
#endif
-#endif
+#endif /* CONFIG_TX6_REV */
+/* autodetect which PMIC is present to derive TX6_REV */
+#define CONFIG_LTC3676 /* TX6_REV == 1 */
+#define CONFIG_RN5T567 /* TX6_REV == 3 */
+#endif /* CONFIG_CMD_I2C */
#ifndef CONFIG_ENV_IS_NOWHERE
/* define one of the following options: