PAD_CTL_DSE_40ohm | \
PAD_CTL_SRE_SLOW)
-static const iomux_v3_cfg_t const tx6qdl_pads[] = {
+static const iomux_v3_cfg_t tx6qdl_pads[] = {
/* RESET_OUT */
MX6_PAD_GPIO_17__GPIO7_IO12 | TX6_DEFAULT_PAD_CTRL,
MX6_PAD_SD3_DAT4__GPIO7_IO01 | TX6_DEFAULT_PAD_CTRL, /* PHY INT */
};
-static const iomux_v3_cfg_t const tx6qdl_fec_pads[] = {
+static const iomux_v3_cfg_t tx6qdl_fec_pads[] = {
/* FEC functions */
MX6_PAD_ENET_MDC__ENET_MDC | TX6_FEC_PAD_CTRL,
MX6_PAD_ENET_MDIO__ENET_MDIO | TX6_FEC_PAD_CTRL,
MX6_PAD_ENET_TXD0__ENET_TX_DATA0 | TX6_FEC_PAD_CTRL,
};
-static const iomux_v3_cfg_t const tx6_i2c_gpio_pads[] = {
+static const iomux_v3_cfg_t tx6_i2c_gpio_pads[] = {
/* internal I2C */
MX6_PAD_EIM_D28__GPIO3_IO28 | MUX_CFG_SION |
TX6_GPIO_PAD_CTRL,
TX6_GPIO_PAD_CTRL,
};
-static const iomux_v3_cfg_t const tx6_i2c_pads[] = {
+static const iomux_v3_cfg_t tx6_i2c_pads[] = {
/* internal I2C */
MX6_PAD_EIM_D28__I2C1_SDA | TX6_I2C_PAD_CTRL,
MX6_PAD_EIM_D21__I2C1_SCL | TX6_I2C_PAD_CTRL,
};
-static const struct gpio const tx6qdl_gpios[] = {
+static const struct gpio tx6qdl_gpios[] = {
/* These two entries are used to forcefully reinitialize the I2C bus */
{ TX6_I2C1_SCL_GPIO, GPIOFLAG_INPUT, "I2C1 SCL", },
{ TX6_I2C1_SDA_GPIO, GPIOFLAG_INPUT, "I2C1 SDA", },
PAD_CTL_PUS_47K_UP)
-static const iomux_v3_cfg_t const tx6ul_pads[] = {
+static const iomux_v3_cfg_t tx6ul_pads[] = {
/* UART pads */
#if CONFIG_MXC_UART_BASE == UART1_BASE
MX6_PAD_UART1_TX_DATA__UART1_DCE_TX | TX6UL_DEFAULT_PAD_CTRL,
MX6_PAD_SNVS_TAMPER5__GPIO5_IO05 | TX6UL_GPIO_IN_PAD_CTRL, /* PHY INT */
};
-static const iomux_v3_cfg_t const tx6ul_enet1_pads[] = {
+static const iomux_v3_cfg_t tx6ul_enet1_pads[] = {
/* FEC functions */
MX6_PAD_GPIO1_IO07__ENET1_MDC | MUX_PAD_CTRL(PAD_CTL_DSE_120ohm |
PAD_CTL_SPEED_LOW),
MX6_PAD_ENET1_TX_DATA0__ENET1_TDATA00 | TX6UL_ENET_PAD_CTRL,
};
-static const iomux_v3_cfg_t const tx6ul_enet2_pads[] = {
+static const iomux_v3_cfg_t tx6ul_enet2_pads[] = {
MX6_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 | MUX_PAD_CTRL(PAD_CTL_SPEED_LOW |
PAD_CTL_DSE_80ohm |
PAD_CTL_SRE_SLOW),
MX6_PAD_ENET2_TX_DATA0__ENET2_TDATA00 | TX6UL_ENET_PAD_CTRL,
};
-static const iomux_v3_cfg_t const tx6ul_i2c_pads[] = {
+static const iomux_v3_cfg_t tx6ul_i2c_pads[] = {
/* internal I2C */
MX6_PAD_SNVS_TAMPER1__GPIO5_IO01 | MUX_CFG_SION |
TX6UL_I2C_PAD_CTRL, /* I2C SCL */
TX6UL_I2C_PAD_CTRL, /* I2C SDA */
};
-static const struct gpio const tx6ul_gpios[] = {
+static const struct gpio tx6ul_gpios[] = {
#ifdef CONFIG_SYS_I2C_SOFT
/* These two entries are used to forcefully reinitialize the I2C bus */
{ TX6UL_I2C1_SCL_GPIO, GPIOFLAG_INPUT, "I2C1 SCL", },
{ TX6UL_FEC_INT_GPIO, GPIOFLAG_INPUT, "FEC PHY INT", },
};
-static const struct gpio const tx6ul_fec2_gpios[] = {
+static const struct gpio tx6ul_fec2_gpios[] = {
{ TX6UL_FEC2_RST_GPIO, GPIOFLAG_OUTPUT_INIT_LOW, "FEC2 PHY RESET", },
{ TX6UL_FEC2_INT_GPIO, GPIOFLAG_INPUT, "FEC2 PHY INT", },
};