2 * linux/arch/m32r/platforms/oaks32r/setup.c
4 * Setup routines for OAKS32R Board
6 * Copyright (c) 2002-2005 Hiroyuki Kondo, Hirokazu Takata,
7 * Hitoshi Yamamoto, Mamoru Sakugawa
10 #include <linux/irq.h>
11 #include <linux/kernel.h>
12 #include <linux/init.h>
14 #include <asm/system.h>
18 #define irq2port(x) (M32R_ICU_CR1_PORTL + ((x - 1) * sizeof(unsigned long)))
20 icu_data_t icu_data[NR_IRQS];
22 static void disable_oaks32r_irq(unsigned int irq)
24 unsigned long port, data;
27 data = icu_data[irq].icucr|M32R_ICUCR_ILEVEL7;
31 static void enable_oaks32r_irq(unsigned int irq)
33 unsigned long port, data;
36 data = icu_data[irq].icucr|M32R_ICUCR_IEN|M32R_ICUCR_ILEVEL6;
40 static void mask_and_ack_mappi(unsigned int irq)
42 disable_oaks32r_irq(irq);
45 static void end_oaks32r_irq(unsigned int irq)
47 enable_oaks32r_irq(irq);
50 static unsigned int startup_oaks32r_irq(unsigned int irq)
52 enable_oaks32r_irq(irq);
56 static void shutdown_oaks32r_irq(unsigned int irq)
61 outl(M32R_ICUCR_ILEVEL7, port);
64 static struct irq_chip oaks32r_irq_type =
66 .name = "OAKS32R-IRQ",
67 .startup = startup_oaks32r_irq,
68 .shutdown = shutdown_oaks32r_irq,
69 .enable = enable_oaks32r_irq,
70 .disable = disable_oaks32r_irq,
71 .ack = mask_and_ack_mappi,
72 .end = end_oaks32r_irq
75 void __init init_IRQ(void)
85 /* INT3 : LAN controller (RTL8019AS) */
86 set_irq_chip(M32R_IRQ_INT3, &oaks32r_irq_type);
87 icu_data[M32R_IRQ_INT3].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
88 disable_oaks32r_irq(M32R_IRQ_INT3);
89 #endif /* CONFIG_M32R_NE2000 */
91 /* MFT2 : system timer */
92 set_irq_chip(M32R_IRQ_MFT2, &oaks32r_irq_type);
93 icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
94 disable_oaks32r_irq(M32R_IRQ_MFT2);
96 #ifdef CONFIG_SERIAL_M32R_SIO
97 /* SIO0_R : uart receive data */
98 set_irq_chip(M32R_IRQ_SIO0_R, &oaks32r_irq_type);
99 icu_data[M32R_IRQ_SIO0_R].icucr = 0;
100 disable_oaks32r_irq(M32R_IRQ_SIO0_R);
102 /* SIO0_S : uart send data */
103 set_irq_chip(M32R_IRQ_SIO0_S, &oaks32r_irq_type);
104 icu_data[M32R_IRQ_SIO0_S].icucr = 0;
105 disable_oaks32r_irq(M32R_IRQ_SIO0_S);
107 /* SIO1_R : uart receive data */
108 set_irq_chip(M32R_IRQ_SIO1_R, &oaks32r_irq_type);
109 icu_data[M32R_IRQ_SIO1_R].icucr = 0;
110 disable_oaks32r_irq(M32R_IRQ_SIO1_R);
112 /* SIO1_S : uart send data */
113 set_irq_chip(M32R_IRQ_SIO1_S, &oaks32r_irq_type);
114 icu_data[M32R_IRQ_SIO1_S].icucr = 0;
115 disable_oaks32r_irq(M32R_IRQ_SIO1_S);
116 #endif /* CONFIG_SERIAL_M32R_SIO */