drivers/gpu/drm/i915/intel_sdvo.c

   1 /*
   2  * Copyright 2006 Dave Airlie <airlied@linux.ie>
   3  * Copyright © 2006-2007 Intel Corporation
   4  *   Jesse Barnes <jesse.barnes@intel.com>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  22  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  23  * DEALINGS IN THE SOFTWARE.
  24  *
  25  * Authors:
  26  *      Eric Anholt <eric@anholt.net>
  27  */
  28 #include <linux/i2c.h>
  29 #include <linux/slab.h>
  30 #include <linux/delay.h>
  31 #include "drmP.h"
  32 #include "drm.h"
  33 #include "drm_crtc.h"
  34 #include "drm_edid.h"
  35 #include "intel_drv.h"
  36 #include "i915_drm.h"
  37 #include "i915_drv.h"
  38 #include "intel_sdvo_regs.h"
  39
  40 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
  41 #define SDVO_RGB_MASK  (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
  42 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
  43 #define SDVO_TV_MASK   (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0)
  44
  45 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
  46                          SDVO_TV_MASK)
  47
  48 #define IS_TV(c)        (c->output_flag & SDVO_TV_MASK)
  49 #define IS_LVDS(c)      (c->output_flag & SDVO_LVDS_MASK)
  50 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
  51
  52
  53 static const char *tv_format_names[] = {
  54         "NTSC_M"   , "NTSC_J"  , "NTSC_443",
  55         "PAL_B"    , "PAL_D"   , "PAL_G"   ,
  56         "PAL_H"    , "PAL_I"   , "PAL_M"   ,
  57         "PAL_N"    , "PAL_NC"  , "PAL_60"  ,
  58         "SECAM_B"  , "SECAM_D" , "SECAM_G" ,
  59         "SECAM_K"  , "SECAM_K1", "SECAM_L" ,
  60         "SECAM_60"
  61 };
  62
  63 #define TV_FORMAT_NUM  (sizeof(tv_format_names) / sizeof(*tv_format_names))
  64
  65 struct intel_sdvo {
  66         struct intel_encoder base;
  67
  68         struct i2c_adapter *i2c;
  69         u8 slave_addr;
  70
  71         struct i2c_adapter ddc;
  72
  73         /* Register for the SDVO device: SDVOB or SDVOC */
  74         int sdvo_reg;
  75
  76         /* Active outputs controlled by this SDVO output */
  77         uint16_t controlled_output;
  78
  79         /*
  80          * Capabilities of the SDVO device returned by
  81          * i830_sdvo_get_capabilities()
  82          */
  83         struct intel_sdvo_caps caps;
  84
  85         /* Pixel clock limitations reported by the SDVO device, in kHz */
  86         int pixel_clock_min, pixel_clock_max;
  87
  88         /*
  89         * For multiple function SDVO device,
  90         * this is for current attached outputs.
  91         */
  92         uint16_t attached_output;
  93
  94         /**
  95          * This is set if we're going to treat the device as TV-out.
  96          *
  97          * While we have these nice friendly flags for output types that ought
  98          * to decide this for us, the S-Video output on our HDMI+S-Video card
  99          * shows up as RGB1 (VGA).
 100          */
 101         bool is_tv;
 102
 103         /* This is for current tv format name */
 104         int tv_format_index;
 105
 106         /**
 107          * This is set if we treat the device as HDMI, instead of DVI.
 108          */
 109         bool is_hdmi;
 110         bool has_hdmi_monitor;
 111         bool has_hdmi_audio;
 112
 113         /**
 114          * This is set if we detect output of sdvo device as LVDS and
 115          * have a valid fixed mode to use with the panel.
 116          */
 117         bool is_lvds;
 118
 119         /**
 120          * This is sdvo fixed pannel mode pointer
 121          */
 122         struct drm_display_mode *sdvo_lvds_fixed_mode;
 123
 124         /* DDC bus used by this SDVO encoder */
 125         uint8_t ddc_bus;
 126
 127         /* Input timings for adjusted_mode */
 128         struct intel_sdvo_dtd input_dtd;
 129 };
 130
 131 struct intel_sdvo_connector {
 132         struct intel_connector base;
 133
 134         /* Mark the type of connector */
 135         uint16_t output_flag;
 136
 137         int force_audio;
 138
 139         /* This contains all current supported TV format */
 140         u8 tv_format_supported[TV_FORMAT_NUM];
 141         int   format_supported_num;
 142         struct drm_property *tv_format;
 143
 144         struct drm_property *force_audio_property;
 145
 146         /* add the property for the SDVO-TV */
 147         struct drm_property *left;
 148         struct drm_property *right;
 149         struct drm_property *top;
 150         struct drm_property *bottom;
 151         struct drm_property *hpos;
 152         struct drm_property *vpos;
 153         struct drm_property *contrast;
 154         struct drm_property *saturation;
 155         struct drm_property *hue;
 156         struct drm_property *sharpness;
 157         struct drm_property *flicker_filter;
 158         struct drm_property *flicker_filter_adaptive;
 159         struct drm_property *flicker_filter_2d;
 160         struct drm_property *tv_chroma_filter;
 161         struct drm_property *tv_luma_filter;
 162         struct drm_property *dot_crawl;
 163
 164         /* add the property for the SDVO-TV/LVDS */
 165         struct drm_property *brightness;
 166
 167         /* Add variable to record current setting for the above property */
 168         u32     left_margin, right_margin, top_margin, bottom_margin;
 169
 170         /* this is to get the range of margin.*/
 171         u32     max_hscan,  max_vscan;
 172         u32     max_hpos, cur_hpos;
 173         u32     max_vpos, cur_vpos;
 174         u32     cur_brightness, max_brightness;
 175         u32     cur_contrast,   max_contrast;
 176         u32     cur_saturation, max_saturation;
 177         u32     cur_hue,        max_hue;
 178         u32     cur_sharpness,  max_sharpness;
 179         u32     cur_flicker_filter,             max_flicker_filter;
 180         u32     cur_flicker_filter_adaptive,    max_flicker_filter_adaptive;
 181         u32     cur_flicker_filter_2d,          max_flicker_filter_2d;
 182         u32     cur_tv_chroma_filter,   max_tv_chroma_filter;
 183         u32     cur_tv_luma_filter,     max_tv_luma_filter;
 184         u32     cur_dot_crawl,  max_dot_crawl;
 185 };
 186
 187 static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
 188 {
 189         return container_of(encoder, struct intel_sdvo, base.base);
 190 }
 191
 192 static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
 193 {
 194         return container_of(intel_attached_encoder(connector),
 195                             struct intel_sdvo, base);
 196 }
 197
 198 static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
 199 {
 200         return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
 201 }
 202
 203 static bool
 204 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
 205 static bool
 206 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
 207                               struct intel_sdvo_connector *intel_sdvo_connector,
 208                               int type);
 209 static bool
 210 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
 211                                    struct intel_sdvo_connector *intel_sdvo_connector);
 212
 213 /**
 214  * Writes the SDVOB or SDVOC with the given value, but always writes both
 215  * SDVOB and SDVOC to work around apparent hardware issues (according to
 216  * comments in the BIOS).
 217  */
 218 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
 219 {
 220         struct drm_device *dev = intel_sdvo->base.base.dev;
 221         struct drm_i915_private *dev_priv = dev->dev_private;
 222         u32 bval = val, cval = val;
 223         int i;
 224
 225         if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
 226                 I915_WRITE(intel_sdvo->sdvo_reg, val);
 227                 I915_READ(intel_sdvo->sdvo_reg);
 228                 return;
 229         }
 230
 231         if (intel_sdvo->sdvo_reg == SDVOB) {
 232                 cval = I915_READ(SDVOC);
 233         } else {
 234                 bval = I915_READ(SDVOB);
 235         }
 236         /*
 237          * Write the registers twice for luck. Sometimes,
 238          * writing them only once doesn't appear to 'stick'.
 239          * The BIOS does this too. Yay, magic
 240          */
 241         for (i = 0; i < 2; i++)
 242         {
 243                 I915_WRITE(SDVOB, bval);
 244                 I915_READ(SDVOB);
 245                 I915_WRITE(SDVOC, cval);
 246                 I915_READ(SDVOC);
 247         }
 248 }
 249
 250 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
 251 {
 252         struct i2c_msg msgs[] = {
 253                 {
 254                         .addr = intel_sdvo->slave_addr,
 255                         .flags = 0,
 256                         .len = 1,
 257                         .buf = &addr,
 258                 },
 259                 {
 260                         .addr = intel_sdvo->slave_addr,
 261                         .flags = I2C_M_RD,
 262                         .len = 1,
 263                         .buf = ch,
 264                 }
 265         };
 266         int ret;
 267
 268         if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
 269                 return true;
 270
 271         DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
 272         return false;
 273 }
 274
 275 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
 276 /** Mapping of command numbers to names, for debug output */
 277 static const struct _sdvo_cmd_name {
 278         u8 cmd;
 279         const char *name;
 280 } sdvo_cmd_names[] = {
 281     SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
 282     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
 283     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
 284     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
 285     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
 286     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
 287     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
 288     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
 289     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
 290     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
 291     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
 292     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
 293     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
 294     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
 295     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
 296     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
 297     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
 298     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
 299     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
 300     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
 301     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
 302     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
 303     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
 304     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
 305     SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
 306     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
 307     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
 308     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
 309     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
 310     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
 311     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
 312     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
 313     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
 314     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
 315     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
 316     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
 317     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
 318     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
 319     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
 320     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
 321     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
 322     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
 323     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
 324
 325     /* Add the op code for SDVO enhancements */
 326     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
 327     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
 328     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
 329     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
 330     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
 331     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
 332     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
 333     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
 334     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
 335     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
 336     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
 337     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
 338     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
 339     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
 340     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
 341     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
 342     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
 343     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
 344     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
 345     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
 346     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
 347     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
 348     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
 349     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
 350     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
 351     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
 352     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
 353     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
 354     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
 355     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
 356     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
 357     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
 358     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
 359     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
 360     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
 361     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
 362     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
 363     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
 364     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
 365     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
 366     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
 367     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
 368     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
 369     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
 370
 371     /* HDMI op code */
 372     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
 373     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
 374     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
 375     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
 376     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
 377     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
 378     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
 379     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
 380     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
 381     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
 382     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
 383     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
 384     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
 385     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
 386     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
 387     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
 388     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
 389     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
 390     SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
 391     SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
 392 };
 393
 394 #define IS_SDVOB(reg)   (reg == SDVOB || reg == PCH_SDVOB)
 395 #define SDVO_NAME(svdo) (IS_SDVOB((svdo)->sdvo_reg) ? "SDVOB" : "SDVOC")
 396
 397 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
 398                                    const void *args, int args_len)
 399 {
 400         int i;
 401
 402         DRM_DEBUG_KMS("%s: W: %02X ",
 403                                 SDVO_NAME(intel_sdvo), cmd);
 404         for (i = 0; i < args_len; i++)
 405                 DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
 406         for (; i < 8; i++)
 407                 DRM_LOG_KMS("   ");
 408         for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
 409                 if (cmd == sdvo_cmd_names[i].cmd) {
 410                         DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
 411                         break;
 412                 }
 413         }
 414         if (i == ARRAY_SIZE(sdvo_cmd_names))
 415                 DRM_LOG_KMS("(%02X)", cmd);
 416         DRM_LOG_KMS("\n");
 417 }
 418
 419 static const char *cmd_status_names[] = {
 420         "Power on",
 421         "Success",
 422         "Not supported",
 423         "Invalid arg",
 424         "Pending",
 425         "Target not specified",
 426         "Scaling not supported"
 427 };
 428
 429 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
 430                                  const void *args, int args_len)
 431 {
 432         u8 buf[args_len*2 + 2], status;
 433         struct i2c_msg msgs[args_len + 3];
 434         int i, ret;
 435
 436         intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
 437
 438         for (i = 0; i < args_len; i++) {
 439                 msgs[i].addr = intel_sdvo->slave_addr;
 440                 msgs[i].flags = 0;
 441                 msgs[i].len = 2;
 442                 msgs[i].buf = buf + 2 *i;
 443                 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
 444                 buf[2*i + 1] = ((u8*)args)[i];
 445         }
 446         msgs[i].addr = intel_sdvo->slave_addr;
 447         msgs[i].flags = 0;
 448         msgs[i].len = 2;
 449         msgs[i].buf = buf + 2*i;
 450         buf[2*i + 0] = SDVO_I2C_OPCODE;
 451         buf[2*i + 1] = cmd;
 452
 453         /* the following two are to read the response */
 454         status = SDVO_I2C_CMD_STATUS;
 455         msgs[i+1].addr = intel_sdvo->slave_addr;
 456         msgs[i+1].flags = 0;
 457         msgs[i+1].len = 1;
 458         msgs[i+1].buf = &status;
 459
 460         msgs[i+2].addr = intel_sdvo->slave_addr;
 461         msgs[i+2].flags = I2C_M_RD;
 462         msgs[i+2].len = 1;
 463         msgs[i+2].buf = &status;
 464
 465         ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
 466         if (ret < 0) {
 467                 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
 468                 return false;
 469         }
 470         if (ret != i+3) {
 471                 /* failure in I2C transfer */
 472                 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
 473                 return false;
 474         }
 475
 476         i = 3;
 477         while (status == SDVO_CMD_STATUS_PENDING && i--) {
 478                 if (!intel_sdvo_read_byte(intel_sdvo,
 479                                           SDVO_I2C_CMD_STATUS,
 480                                           &status))
 481                         return false;
 482         }
 483         if (status != SDVO_CMD_STATUS_SUCCESS) {
 484                 DRM_DEBUG_KMS("command returns response %s [%d]\n",
 485                               status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP ? cmd_status_names[status] : "???",
 486                               status);
 487                 return false;
 488         }
 489
 490         return true;
 491 }
 492
 493 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
 494                                      void *response, int response_len)
 495 {
 496         u8 retry = 5;
 497         u8 status;
 498         int i;
 499
 500         /*
 501          * The documentation states that all commands will be
 502          * processed within 15µs, and that we need only poll
 503          * the status byte a maximum of 3 times in order for the
 504          * command to be complete.
 505          *
 506          * Check 5 times in case the hardware failed to read the docs.
 507          */
 508         do {
 509                 if (!intel_sdvo_read_byte(intel_sdvo,
 510                                           SDVO_I2C_CMD_STATUS,
 511                                           &status))
 512                         return false;
 513         } while (status == SDVO_CMD_STATUS_PENDING && --retry);
 514
 515         DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
 516         if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
 517                 DRM_LOG_KMS("(%s)", cmd_status_names[status]);
 518         else
 519                 DRM_LOG_KMS("(??? %d)", status);
 520
 521         if (status != SDVO_CMD_STATUS_SUCCESS)
 522                 goto log_fail;
 523
 524         /* Read the command response */
 525         for (i = 0; i < response_len; i++) {
 526                 if (!intel_sdvo_read_byte(intel_sdvo,
 527                                           SDVO_I2C_RETURN_0 + i,
 528                                           &((u8 *)response)[i]))
 529                         goto log_fail;
 530                 DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
 531         }
 532         DRM_LOG_KMS("\n");
 533         return true;
 534
 535 log_fail:
 536         DRM_LOG_KMS("\n");
 537         return false;
 538 }
 539
 540 static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
 541 {
 542         if (mode->clock >= 100000)
 543                 return 1;
 544         else if (mode->clock >= 50000)
 545                 return 2;
 546         else
 547                 return 4;
 548 }
 549
 550 static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
 551                                               u8 ddc_bus)
 552 {
 553         return intel_sdvo_write_cmd(intel_sdvo,
 554                                     SDVO_CMD_SET_CONTROL_BUS_SWITCH,
 555                                     &ddc_bus, 1);
 556 }
 557
 558 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
 559 {
 560         return intel_sdvo_write_cmd(intel_sdvo, cmd, data, len);
 561 }
 562
 563 static bool
 564 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
 565 {
 566         if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
 567                 return false;
 568
 569         return intel_sdvo_read_response(intel_sdvo, value, len);
 570 }
 571
 572 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
 573 {
 574         struct intel_sdvo_set_target_input_args targets = {0};
 575         return intel_sdvo_set_value(intel_sdvo,
 576                                     SDVO_CMD_SET_TARGET_INPUT,
 577                                     &targets, sizeof(targets));
 578 }
 579
 580 /**
 581  * Return whether each input is trained.
 582  *
 583  * This function is making an assumption about the layout of the response,
 584  * which should be checked against the docs.
 585  */
 586 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
 587 {
 588         struct intel_sdvo_get_trained_inputs_response response;
 589
 590         if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
 591                                   &response, sizeof(response)))
 592                 return false;
 593
 594         *input_1 = response.input0_trained;
 595         *input_2 = response.input1_trained;
 596         return true;
 597 }
 598
 599 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
 600                                           u16 outputs)
 601 {
 602         return intel_sdvo_set_value(intel_sdvo,
 603                                     SDVO_CMD_SET_ACTIVE_OUTPUTS,
 604                                     &outputs, sizeof(outputs));
 605 }
 606
 607 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
 608                                                int mode)
 609 {
 610         u8 state = SDVO_ENCODER_STATE_ON;
 611
 612         switch (mode) {
 613         case DRM_MODE_DPMS_ON:
 614                 state = SDVO_ENCODER_STATE_ON;
 615                 break;
 616         case DRM_MODE_DPMS_STANDBY:
 617                 state = SDVO_ENCODER_STATE_STANDBY;
 618                 break;
 619         case DRM_MODE_DPMS_SUSPEND:
 620                 state = SDVO_ENCODER_STATE_SUSPEND;
 621                 break;
 622         case DRM_MODE_DPMS_OFF:
 623                 state = SDVO_ENCODER_STATE_OFF;
 624                 break;
 625         }
 626
 627         return intel_sdvo_set_value(intel_sdvo,
 628                                     SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
 629 }
 630
 631 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
 632                                                    int *clock_min,
 633                                                    int *clock_max)
 634 {
 635         struct intel_sdvo_pixel_clock_range clocks;
 636
 637         if (!intel_sdvo_get_value(intel_sdvo,
 638                                   SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
 639                                   &clocks, sizeof(clocks)))
 640                 return false;
 641
 642         /* Convert the values from units of 10 kHz to kHz. */
 643         *clock_min = clocks.min * 10;
 644         *clock_max = clocks.max * 10;
 645         return true;
 646 }
 647
 648 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
 649                                          u16 outputs)
 650 {
 651         return intel_sdvo_set_value(intel_sdvo,
 652                                     SDVO_CMD_SET_TARGET_OUTPUT,
 653                                     &outputs, sizeof(outputs));
 654 }
 655
 656 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
 657                                   struct intel_sdvo_dtd *dtd)
 658 {
 659         return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
 660                 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
 661 }
 662
 663 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
 664                                          struct intel_sdvo_dtd *dtd)
 665 {
 666         return intel_sdvo_set_timing(intel_sdvo,
 667                                      SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
 668 }
 669
 670 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
 671                                          struct intel_sdvo_dtd *dtd)
 672 {
 673         return intel_sdvo_set_timing(intel_sdvo,
 674                                      SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
 675 }
 676
 677 static bool
 678 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
 679                                          uint16_t clock,
 680                                          uint16_t width,
 681                                          uint16_t height)
 682 {
 683         struct intel_sdvo_preferred_input_timing_args args;
 684
 685         memset(&args, 0, sizeof(args));
 686         args.clock = clock;
 687         args.width = width;
 688         args.height = height;
 689         args.interlace = 0;
 690
 691         if (intel_sdvo->is_lvds &&
 692            (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
 693             intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
 694                 args.scaled = 1;
 695
 696         return intel_sdvo_set_value(intel_sdvo,
 697                                     SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
 698                                     &args, sizeof(args));
 699 }
 700
 701 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
 702                                                   struct intel_sdvo_dtd *dtd)
 703 {
 704         return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
 705                                     &dtd->part1, sizeof(dtd->part1)) &&
 706                 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
 707                                      &dtd->part2, sizeof(dtd->part2));
 708 }
 709
 710 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
 711 {
 712         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
 713 }
 714
 715 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
 716                                          const struct drm_display_mode *mode)
 717 {
 718         uint16_t width, height;
 719         uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
 720         uint16_t h_sync_offset, v_sync_offset;
 721
 722         width = mode->crtc_hdisplay;
 723         height = mode->crtc_vdisplay;
 724
 725         /* do some mode translations */
 726         h_blank_len = mode->crtc_hblank_end - mode->crtc_hblank_start;
 727         h_sync_len = mode->crtc_hsync_end - mode->crtc_hsync_start;
 728
 729         v_blank_len = mode->crtc_vblank_end - mode->crtc_vblank_start;
 730         v_sync_len = mode->crtc_vsync_end - mode->crtc_vsync_start;
 731
 732         h_sync_offset = mode->crtc_hsync_start - mode->crtc_hblank_start;
 733         v_sync_offset = mode->crtc_vsync_start - mode->crtc_vblank_start;
 734
 735         dtd->part1.clock = mode->clock / 10;
 736         dtd->part1.h_active = width & 0xff;
 737         dtd->part1.h_blank = h_blank_len & 0xff;
 738         dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
 739                 ((h_blank_len >> 8) & 0xf);
 740         dtd->part1.v_active = height & 0xff;
 741         dtd->part1.v_blank = v_blank_len & 0xff;
 742         dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
 743                 ((v_blank_len >> 8) & 0xf);
 744
 745         dtd->part2.h_sync_off = h_sync_offset & 0xff;
 746         dtd->part2.h_sync_width = h_sync_len & 0xff;
 747         dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
 748                 (v_sync_len & 0xf);
 749         dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
 750                 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
 751                 ((v_sync_len & 0x30) >> 4);
 752
 753         dtd->part2.dtd_flags = 0x18;
 754         if (mode->flags & DRM_MODE_FLAG_PHSYNC)
 755                 dtd->part2.dtd_flags |= 0x2;
 756         if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 757                 dtd->part2.dtd_flags |= 0x4;
 758
 759         dtd->part2.sdvo_flags = 0;
 760         dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
 761         dtd->part2.reserved = 0;
 762 }
 763
 764 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
 765                                          const struct intel_sdvo_dtd *dtd)
 766 {
 767         mode->hdisplay = dtd->part1.h_active;
 768         mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
 769         mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
 770         mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
 771         mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
 772         mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
 773         mode->htotal = mode->hdisplay + dtd->part1.h_blank;
 774         mode->htotal += (dtd->part1.h_high & 0xf) << 8;
 775
 776         mode->vdisplay = dtd->part1.v_active;
 777         mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
 778         mode->vsync_start = mode->vdisplay;
 779         mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
 780         mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
 781         mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
 782         mode->vsync_end = mode->vsync_start +
 783                 (dtd->part2.v_sync_off_width & 0xf);
 784         mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
 785         mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
 786         mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
 787
 788         mode->clock = dtd->part1.clock * 10;
 789
 790         mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
 791         if (dtd->part2.dtd_flags & 0x2)
 792                 mode->flags |= DRM_MODE_FLAG_PHSYNC;
 793         if (dtd->part2.dtd_flags & 0x4)
 794                 mode->flags |= DRM_MODE_FLAG_PVSYNC;
 795 }
 796
 797 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
 798 {
 799         struct intel_sdvo_encode encode;
 800
 801         return intel_sdvo_get_value(intel_sdvo,
 802                                   SDVO_CMD_GET_SUPP_ENCODE,
 803                                   &encode, sizeof(encode));
 804 }
 805
 806 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
 807                                   uint8_t mode)
 808 {
 809         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
 810 }
 811
 812 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
 813                                        uint8_t mode)
 814 {
 815         return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
 816 }
 817
 818 #if 0
 819 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
 820 {
 821         int i, j;
 822         uint8_t set_buf_index[2];
 823         uint8_t av_split;
 824         uint8_t buf_size;
 825         uint8_t buf[48];
 826         uint8_t *pos;
 827
 828         intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
 829
 830         for (i = 0; i <= av_split; i++) {
 831                 set_buf_index[0] = i; set_buf_index[1] = 0;
 832                 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
 833                                      set_buf_index, 2);
 834                 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
 835                 intel_sdvo_read_response(encoder, &buf_size, 1);
 836
 837                 pos = buf;
 838                 for (j = 0; j <= buf_size; j += 8) {
 839                         intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
 840                                              NULL, 0);
 841                         intel_sdvo_read_response(encoder, pos, 8);
 842                         pos += 8;
 843                 }
 844         }
 845 }
 846 #endif
 847
 848 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo)
 849 {
 850         struct dip_infoframe avi_if = {
 851                 .type = DIP_TYPE_AVI,
 852                 .ver = DIP_VERSION_AVI,
 853                 .len = DIP_LEN_AVI,
 854         };
 855         uint8_t tx_rate = SDVO_HBUF_TX_VSYNC;
 856         uint8_t set_buf_index[2] = { 1, 0 };
 857         uint64_t *data = (uint64_t *)&avi_if;
 858         unsigned i;
 859
 860         intel_dip_infoframe_csum(&avi_if);
 861
 862         if (!intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_HBUF_INDEX,
 863                                   set_buf_index, 2))
 864                 return false;
 865
 866         for (i = 0; i < sizeof(avi_if); i += 8) {
 867                 if (!intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_HBUF_DATA,
 868                                           data, 8))
 869                         return false;
 870                 data++;
 871         }
 872
 873         return intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_HBUF_TXRATE,
 874                                     &tx_rate, 1);
 875 }
 876
 877 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
 878 {
 879         struct intel_sdvo_tv_format format;
 880         uint32_t format_map;
 881
 882         format_map = 1 << intel_sdvo->tv_format_index;
 883         memset(&format, 0, sizeof(format));
 884         memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
 885
 886         BUILD_BUG_ON(sizeof(format) != 6);
 887         return intel_sdvo_set_value(intel_sdvo,
 888                                     SDVO_CMD_SET_TV_FORMAT,
 889                                     &format, sizeof(format));
 890 }
 891
 892 static bool
 893 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
 894                                         struct drm_display_mode *mode)
 895 {
 896         struct intel_sdvo_dtd output_dtd;
 897
 898         if (!intel_sdvo_set_target_output(intel_sdvo,
 899                                           intel_sdvo->attached_output))
 900                 return false;
 901
 902         intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
 903         if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
 904                 return false;
 905
 906         return true;
 907 }
 908
 909 static bool
 910 intel_sdvo_set_input_timings_for_mode(struct intel_sdvo *intel_sdvo,
 911                                         struct drm_display_mode *mode,
 912                                         struct drm_display_mode *adjusted_mode)
 913 {
 914         /* Reset the input timing to the screen. Assume always input 0. */
 915         if (!intel_sdvo_set_target_input(intel_sdvo))
 916                 return false;
 917
 918         if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
 919                                                       mode->clock / 10,
 920                                                       mode->hdisplay,
 921                                                       mode->vdisplay))
 922                 return false;
 923
 924         if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
 925                                                    &intel_sdvo->input_dtd))
 926                 return false;
 927
 928         intel_sdvo_get_mode_from_dtd(adjusted_mode, &intel_sdvo->input_dtd);
 929
 930         drm_mode_set_crtcinfo(adjusted_mode, 0);
 931         return true;
 932 }
 933
 934 static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
 935                                   struct drm_display_mode *mode,
 936                                   struct drm_display_mode *adjusted_mode)
 937 {
 938         struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
 939         int multiplier;
 940
 941         /* We need to construct preferred input timings based on our
 942          * output timings.  To do that, we have to set the output
 943          * timings, even though this isn't really the right place in
 944          * the sequence to do it. Oh well.
 945          */
 946         if (intel_sdvo->is_tv) {
 947                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
 948                         return false;
 949
 950                 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
 951                                                              mode,
 952                                                              adjusted_mode);
 953         } else if (intel_sdvo->is_lvds) {
 954                 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
 955                                                              intel_sdvo->sdvo_lvds_fixed_mode))
 956                         return false;
 957
 958                 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
 959                                                              mode,
 960                                                              adjusted_mode);
 961         }
 962
 963         /* Make the CRTC code factor in the SDVO pixel multiplier.  The
 964          * SDVO device will factor out the multiplier during mode_set.
 965          */
 966         multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode);
 967         intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
 968
 969         return true;
 970 }
 971
 972 static void intel_sdvo_mode_set(struct drm_encoder *encoder,
 973                                 struct drm_display_mode *mode,
 974                                 struct drm_display_mode *adjusted_mode)
 975 {
 976         struct drm_device *dev = encoder->dev;
 977         struct drm_i915_private *dev_priv = dev->dev_private;
 978         struct drm_crtc *crtc = encoder->crtc;
 979         struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 980         struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
 981         u32 sdvox;
 982         struct intel_sdvo_in_out_map in_out;
 983         struct intel_sdvo_dtd input_dtd;
 984         int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
 985         int rate;
 986
 987         if (!mode)
 988                 return;
 989
 990         /* First, set the input mapping for the first input to our controlled
 991          * output. This is only correct if we're a single-input device, in
 992          * which case the first input is the output from the appropriate SDVO
 993          * channel on the motherboard.  In a two-input device, the first input
 994          * will be SDVOB and the second SDVOC.
 995          */
 996         in_out.in0 = intel_sdvo->attached_output;
 997         in_out.in1 = 0;
 998
 999         intel_sdvo_set_value(intel_sdvo,
1000                              SDVO_CMD_SET_IN_OUT_MAP,
1001                              &in_out, sizeof(in_out));
1002
1003         /* Set the output timings to the screen */
1004         if (!intel_sdvo_set_target_output(intel_sdvo,
1005                                           intel_sdvo->attached_output))
1006                 return;
1007
1008         /* We have tried to get input timing in mode_fixup, and filled into
1009          * adjusted_mode.
1010          */
1011         if (intel_sdvo->is_tv || intel_sdvo->is_lvds) {
1012                 input_dtd = intel_sdvo->input_dtd;
1013         } else {
1014                 /* Set the output timing to the screen */
1015                 if (!intel_sdvo_set_target_output(intel_sdvo,
1016                                                   intel_sdvo->attached_output))
1017                         return;
1018
1019                 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1020                 (void) intel_sdvo_set_output_timing(intel_sdvo, &input_dtd);
1021         }
1022
1023         /* Set the input timing to the screen. Assume always input 0. */
1024         if (!intel_sdvo_set_target_input(intel_sdvo))
1025                 return;
1026
1027         if (intel_sdvo->has_hdmi_monitor) {
1028                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1029                 intel_sdvo_set_colorimetry(intel_sdvo,
1030                                            SDVO_COLORIMETRY_RGB256);
1031                 intel_sdvo_set_avi_infoframe(intel_sdvo);
1032         } else
1033                 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
1034
1035         if (intel_sdvo->is_tv &&
1036             !intel_sdvo_set_tv_format(intel_sdvo))
1037                 return;
1038
1039         (void) intel_sdvo_set_input_timing(intel_sdvo, &input_dtd);
1040
1041         switch (pixel_multiplier) {
1042         default:
1043         case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1044         case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1045         case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1046         }
1047         if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1048                 return;
1049
1050         /* Set the SDVO control regs. */
1051         if (INTEL_INFO(dev)->gen >= 4) {
1052                 sdvox = 0;
1053                 if (INTEL_INFO(dev)->gen < 5)
1054                         sdvox |= SDVO_BORDER_ENABLE;
1055                 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
1056                         sdvox |= SDVO_VSYNC_ACTIVE_HIGH;
1057                 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
1058                         sdvox |= SDVO_HSYNC_ACTIVE_HIGH;
1059         } else {
1060                 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1061                 switch (intel_sdvo->sdvo_reg) {
1062                 case SDVOB:
1063                         sdvox &= SDVOB_PRESERVE_MASK;
1064                         break;
1065                 case SDVOC:
1066                         sdvox &= SDVOC_PRESERVE_MASK;
1067                         break;
1068                 }
1069                 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1070         }
1071         if (intel_crtc->pipe == 1)
1072                 sdvox |= SDVO_PIPE_B_SELECT;
1073         if (intel_sdvo->has_hdmi_audio)
1074                 sdvox |= SDVO_AUDIO_ENABLE;
1075
1076         if (INTEL_INFO(dev)->gen >= 4) {
1077                 /* done in crtc_mode_set as the dpll_md reg must be written early */
1078         } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1079                 /* done in crtc_mode_set as it lives inside the dpll register */
1080         } else {
1081                 sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
1082         }
1083
1084         if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1085             INTEL_INFO(dev)->gen < 5)
1086                 sdvox |= SDVO_STALL_SELECT;
1087         intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1088 }
1089
1090 static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
1091 {
1092         struct drm_device *dev = encoder->dev;
1093         struct drm_i915_private *dev_priv = dev->dev_private;
1094         struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1095         struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
1096         u32 temp;
1097
1098         if (mode != DRM_MODE_DPMS_ON) {
1099                 intel_sdvo_set_active_outputs(intel_sdvo, 0);
1100                 if (0)
1101                         intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1102
1103                 if (mode == DRM_MODE_DPMS_OFF) {
1104                         temp = I915_READ(intel_sdvo->sdvo_reg);
1105                         if ((temp & SDVO_ENABLE) != 0) {
1106                                 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
1107                         }
1108                 }
1109         } else {
1110                 bool input1, input2;
1111                 int i;
1112                 u8 status;
1113
1114                 temp = I915_READ(intel_sdvo->sdvo_reg);
1115                 if ((temp & SDVO_ENABLE) == 0)
1116                         intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
1117                 for (i = 0; i < 2; i++)
1118                         intel_wait_for_vblank(dev, intel_crtc->pipe);
1119
1120                 status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1121                 /* Warn if the device reported failure to sync.
1122                  * A lot of SDVO devices fail to notify of sync, but it's
1123                  * a given it the status is a success, we succeeded.
1124                  */
1125                 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
1126                         DRM_DEBUG_KMS("First %s output reported failure to "
1127                                         "sync\n", SDVO_NAME(intel_sdvo));
1128                 }
1129
1130                 if (0)
1131                         intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1132                 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1133         }
1134         return;
1135 }
1136
1137 static int intel_sdvo_mode_valid(struct drm_connector *connector,
1138                                  struct drm_display_mode *mode)
1139 {
1140         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1141
1142         if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1143                 return MODE_NO_DBLESCAN;
1144
1145         if (intel_sdvo->pixel_clock_min > mode->clock)
1146                 return MODE_CLOCK_LOW;
1147
1148         if (intel_sdvo->pixel_clock_max < mode->clock)
1149                 return MODE_CLOCK_HIGH;
1150
1151         if (intel_sdvo->is_lvds) {
1152                 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
1153                         return MODE_PANEL;
1154
1155                 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
1156                         return MODE_PANEL;
1157         }
1158
1159         return MODE_OK;
1160 }
1161
1162 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1163 {
1164         if (!intel_sdvo_get_value(intel_sdvo,
1165                                   SDVO_CMD_GET_DEVICE_CAPS,
1166                                   caps, sizeof(*caps)))
1167                 return false;
1168
1169         DRM_DEBUG_KMS("SDVO capabilities:\n"
1170                       "  vendor_id: %d\n"
1171                       "  device_id: %d\n"
1172                       "  device_rev_id: %d\n"
1173                       "  sdvo_version_major: %d\n"
1174                       "  sdvo_version_minor: %d\n"
1175                       "  sdvo_inputs_mask: %d\n"
1176                       "  smooth_scaling: %d\n"
1177                       "  sharp_scaling: %d\n"
1178                       "  up_scaling: %d\n"
1179                       "  down_scaling: %d\n"
1180                       "  stall_support: %d\n"
1181                       "  output_flags: %d\n",
1182                       caps->vendor_id,
1183                       caps->device_id,
1184                       caps->device_rev_id,
1185                       caps->sdvo_version_major,
1186                       caps->sdvo_version_minor,
1187                       caps->sdvo_inputs_mask,
1188                       caps->smooth_scaling,
1189                       caps->sharp_scaling,
1190                       caps->up_scaling,
1191                       caps->down_scaling,
1192                       caps->stall_support,
1193                       caps->output_flags);
1194
1195         return true;
1196 }
1197
1198 /* No use! */
1199 #if 0
1200 struct drm_connector* intel_sdvo_find(struct drm_device *dev, int sdvoB)
1201 {
1202         struct drm_connector *connector = NULL;
1203         struct intel_sdvo *iout = NULL;
1204         struct intel_sdvo *sdvo;
1205
1206         /* find the sdvo connector */
1207         list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
1208                 iout = to_intel_sdvo(connector);
1209
1210                 if (iout->type != INTEL_OUTPUT_SDVO)
1211                         continue;
1212
1213                 sdvo = iout->dev_priv;
1214
1215                 if (sdvo->sdvo_reg == SDVOB && sdvoB)
1216                         return connector;
1217
1218                 if (sdvo->sdvo_reg == SDVOC && !sdvoB)
1219                         return connector;
1220
1221         }
1222
1223         return NULL;
1224 }
1225
1226 int intel_sdvo_supports_hotplug(struct drm_connector *connector)
1227 {
1228         u8 response[2];
1229         u8 status;
1230         struct intel_sdvo *intel_sdvo;
1231         DRM_DEBUG_KMS("\n");
1232
1233         if (!connector)
1234                 return 0;
1235
1236         intel_sdvo = to_intel_sdvo(connector);
1237
1238         return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1239                                     &response, 2) && response[0];
1240 }
1241
1242 void intel_sdvo_set_hotplug(struct drm_connector *connector, int on)
1243 {
1244         u8 response[2];
1245         u8 status;
1246         struct intel_sdvo *intel_sdvo = to_intel_sdvo(connector);
1247
1248         intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0);
1249         intel_sdvo_read_response(intel_sdvo, &response, 2);
1250
1251         if (on) {
1252                 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT, NULL, 0);
1253                 status = intel_sdvo_read_response(intel_sdvo, &response, 2);
1254
1255                 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2);
1256         } else {
1257                 response[0] = 0;
1258                 response[1] = 0;
1259                 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2);
1260         }
1261
1262         intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0);
1263         intel_sdvo_read_response(intel_sdvo, &response, 2);
1264 }
1265 #endif
1266
1267 static bool
1268 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
1269 {
1270         int caps = 0;
1271
1272         if (intel_sdvo->caps.output_flags &
1273                 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1))
1274                 caps++;
1275         if (intel_sdvo->caps.output_flags &
1276                 (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1))
1277                 caps++;
1278         if (intel_sdvo->caps.output_flags &
1279                 (SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_SVID1))
1280                 caps++;
1281         if (intel_sdvo->caps.output_flags &
1282                 (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_CVBS1))
1283                 caps++;
1284         if (intel_sdvo->caps.output_flags &
1285                 (SDVO_OUTPUT_YPRPB0 | SDVO_OUTPUT_YPRPB1))
1286                 caps++;
1287
1288         if (intel_sdvo->caps.output_flags &
1289                 (SDVO_OUTPUT_SCART0 | SDVO_OUTPUT_SCART1))
1290                 caps++;
1291
1292         if (intel_sdvo->caps.output_flags &
1293                 (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1))
1294                 caps++;
1295
1296         return (caps > 1);
1297 }
1298
1299 static struct edid *
1300 intel_sdvo_get_edid(struct drm_connector *connector)
1301 {
1302         struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1303         return drm_get_edid(connector, &sdvo->ddc);
1304 }
1305
1306 /* Mac mini hack -- use the same DDC as the analog connector */
1307 static struct edid *
1308 intel_sdvo_get_analog_edid(struct drm_connector *connector)
1309 {
1310         struct drm_i915_private *dev_priv = connector->dev->dev_private;
1311
1312         return drm_get_edid(connector,
1313                             &dev_priv->gmbus[dev_priv->crt_ddc_pin].adapter);
1314 }
1315
1316 enum drm_connector_status
1317 intel_sdvo_hdmi_sink_detect(struct drm_connector *connector)
1318 {
1319         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1320         enum drm_connector_status status;
1321         struct edid *edid;
1322
1323         edid = intel_sdvo_get_edid(connector);
1324
1325         if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
1326                 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
1327
1328                 /*
1329                  * Don't use the 1 as the argument of DDC bus switch to get
1330                  * the EDID. It is used for SDVO SPD ROM.
1331                  */
1332                 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1333                         intel_sdvo->ddc_bus = ddc;
1334                         edid = intel_sdvo_get_edid(connector);
1335                         if (edid)
1336                                 break;
1337                 }
1338                 /*
1339                  * If we found the EDID on the other bus,
1340                  * assume that is the correct DDC bus.
1341                  */
1342                 if (edid == NULL)
1343                         intel_sdvo->ddc_bus = saved_ddc;
1344         }
1345
1346         /*
1347          * When there is no edid and no monitor is connected with VGA
1348          * port, try to use the CRT ddc to read the EDID for DVI-connector.
1349          */
1350         if (edid == NULL)
1351                 edid = intel_sdvo_get_analog_edid(connector);
1352
1353         status = connector_status_unknown;
1354         if (edid != NULL) {
1355                 /* DDC bus is shared, match EDID to connector type */
1356                 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1357                         status = connector_status_connected;
1358                         if (intel_sdvo->is_hdmi) {
1359                                 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1360                                 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1361                         }
1362                 }
1363                 connector->display_info.raw_edid = NULL;
1364                 kfree(edid);
1365         }
1366
1367         if (status == connector_status_connected) {
1368                 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1369                 if (intel_sdvo_connector->force_audio)
1370                         intel_sdvo->has_hdmi_audio = intel_sdvo_connector->force_audio > 0;
1371         }
1372
1373         return status;
1374 }
1375
1376 static enum drm_connector_status
1377 intel_sdvo_detect(struct drm_connector *connector, bool force)
1378 {
1379         uint16_t response;
1380         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1381         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1382         enum drm_connector_status ret;
1383
1384         if (!intel_sdvo_write_cmd(intel_sdvo,
1385                                   SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
1386                 return connector_status_unknown;
1387
1388         /* add 30ms delay when the output type might be TV */
1389         if (intel_sdvo->caps.output_flags &
1390             (SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_CVBS0))
1391                 mdelay(30);
1392
1393         if (!intel_sdvo_read_response(intel_sdvo, &response, 2))
1394                 return connector_status_unknown;
1395
1396         DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1397                       response & 0xff, response >> 8,
1398                       intel_sdvo_connector->output_flag);
1399
1400         if (response == 0)
1401                 return connector_status_disconnected;
1402
1403         intel_sdvo->attached_output = response;
1404
1405         intel_sdvo->has_hdmi_monitor = false;
1406         intel_sdvo->has_hdmi_audio = false;
1407
1408         if ((intel_sdvo_connector->output_flag & response) == 0)
1409                 ret = connector_status_disconnected;
1410         else if (response & SDVO_TMDS_MASK)
1411                 ret = intel_sdvo_hdmi_sink_detect(connector);
1412         else
1413                 ret = connector_status_connected;
1414
1415         /* May update encoder flag for like clock for SDVO TV, etc.*/
1416         if (ret == connector_status_connected) {
1417                 intel_sdvo->is_tv = false;
1418                 intel_sdvo->is_lvds = false;
1419                 intel_sdvo->base.needs_tv_clock = false;
1420
1421                 if (response & SDVO_TV_MASK) {
1422                         intel_sdvo->is_tv = true;
1423                         intel_sdvo->base.needs_tv_clock = true;
1424                 }
1425                 if (response & SDVO_LVDS_MASK)
1426                         intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
1427         }
1428
1429         return ret;
1430 }
1431
1432 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1433 {
1434         struct edid *edid;
1435
1436         /* set the bus switch and get the modes */
1437         edid = intel_sdvo_get_edid(connector);
1438
1439         /*
1440          * Mac mini hack.  On this device, the DVI-I connector shares one DDC
1441          * link between analog and digital outputs. So, if the regular SDVO
1442          * DDC fails, check to see if the analog output is disconnected, in
1443          * which case we'll look there for the digital DDC data.
1444          */
1445         if (edid == NULL)
1446                 edid = intel_sdvo_get_analog_edid(connector);
1447
1448         if (edid != NULL) {
1449                 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1450                         drm_mode_connector_update_edid_property(connector, edid);
1451                         drm_add_edid_modes(connector, edid);
1452                 }
1453                 connector->display_info.raw_edid = NULL;
1454                 kfree(edid);
1455         }
1456 }
1457
1458 /*
1459  * Set of SDVO TV modes.
1460  * Note!  This is in reply order (see loop in get_tv_modes).
1461  * XXX: all 60Hz refresh?
1462  */
1463 struct drm_display_mode sdvo_tv_modes[] = {
1464         { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1465                    416, 0, 200, 201, 232, 233, 0,
1466                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1467         { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1468                    416, 0, 240, 241, 272, 273, 0,
1469                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1470         { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1471                    496, 0, 300, 301, 332, 333, 0,
1472                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1473         { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1474                    736, 0, 350, 351, 382, 383, 0,
1475                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1476         { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1477                    736, 0, 400, 401, 432, 433, 0,
1478                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1479         { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1480                    736, 0, 480, 481, 512, 513, 0,
1481                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1482         { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1483                    800, 0, 480, 481, 512, 513, 0,
1484                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1485         { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1486                    800, 0, 576, 577, 608, 609, 0,
1487                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1488         { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1489                    816, 0, 350, 351, 382, 383, 0,
1490                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1491         { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1492                    816, 0, 400, 401, 432, 433, 0,
1493                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1494         { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1495                    816, 0, 480, 481, 512, 513, 0,
1496                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1497         { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1498                    816, 0, 540, 541, 572, 573, 0,
1499                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1500         { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1501                    816, 0, 576, 577, 608, 609, 0,
1502                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1503         { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1504                    864, 0, 576, 577, 608, 609, 0,
1505                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1506         { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1507                    896, 0, 600, 601, 632, 633, 0,
1508                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1509         { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1510                    928, 0, 624, 625, 656, 657, 0,
1511                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1512         { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1513                    1016, 0, 766, 767, 798, 799, 0,
1514                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1515         { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1516                    1120, 0, 768, 769, 800, 801, 0,
1517                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1518         { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1519                    1376, 0, 1024, 1025, 1056, 1057, 0,
1520                    DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1521 };
1522
1523 static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1524 {
1525         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1526         struct intel_sdvo_sdtv_resolution_request tv_res;
1527         uint32_t reply = 0, format_map = 0;
1528         int i;
1529
1530         /* Read the list of supported input resolutions for the selected TV
1531          * format.
1532          */
1533         format_map = 1 << intel_sdvo->tv_format_index;
1534         memcpy(&tv_res, &format_map,
1535                min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
1536
1537         if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1538                 return;
1539
1540         BUILD_BUG_ON(sizeof(tv_res) != 3);
1541         if (!intel_sdvo_write_cmd(intel_sdvo,
1542                                   SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
1543                                   &tv_res, sizeof(tv_res)))
1544                 return;
1545         if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
1546                 return;
1547
1548         for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
1549                 if (reply & (1 << i)) {
1550                         struct drm_display_mode *nmode;
1551                         nmode = drm_mode_duplicate(connector->dev,
1552                                                    &sdvo_tv_modes[i]);
1553                         if (nmode)
1554                                 drm_mode_probed_add(connector, nmode);
1555                 }
1556 }
1557
1558 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1559 {
1560         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1561         struct drm_i915_private *dev_priv = connector->dev->dev_private;
1562         struct drm_display_mode *newmode;
1563
1564         /*
1565          * Attempt to get the mode list from DDC.
1566          * Assume that the preferred modes are
1567          * arranged in priority order.
1568          */
1569         intel_ddc_get_modes(connector, intel_sdvo->i2c);
1570         if (list_empty(&connector->probed_modes) == false)
1571                 goto end;
1572
1573         /* Fetch modes from VBT */
1574         if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
1575                 newmode = drm_mode_duplicate(connector->dev,
1576                                              dev_priv->sdvo_lvds_vbt_mode);
1577                 if (newmode != NULL) {
1578                         /* Guarantee the mode is preferred */
1579                         newmode->type = (DRM_MODE_TYPE_PREFERRED |
1580                                          DRM_MODE_TYPE_DRIVER);
1581                         drm_mode_probed_add(connector, newmode);
1582                 }
1583         }
1584
1585 end:
1586         list_for_each_entry(newmode, &connector->probed_modes, head) {
1587                 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
1588                         intel_sdvo->sdvo_lvds_fixed_mode =
1589                                 drm_mode_duplicate(connector->dev, newmode);
1590
1591                         drm_mode_set_crtcinfo(intel_sdvo->sdvo_lvds_fixed_mode,
1592                                               0);
1593
1594                         intel_sdvo->is_lvds = true;
1595                         break;
1596                 }
1597         }
1598
1599 }
1600
1601 static int intel_sdvo_get_modes(struct drm_connector *connector)
1602 {
1603         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1604
1605         if (IS_TV(intel_sdvo_connector))
1606                 intel_sdvo_get_tv_modes(connector);
1607         else if (IS_LVDS(intel_sdvo_connector))
1608                 intel_sdvo_get_lvds_modes(connector);
1609         else
1610                 intel_sdvo_get_ddc_modes(connector);
1611
1612         return !list_empty(&connector->probed_modes);
1613 }
1614
1615 static void
1616 intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
1617 {
1618         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1619         struct drm_device *dev = connector->dev;
1620
1621         if (intel_sdvo_connector->left)
1622                 drm_property_destroy(dev, intel_sdvo_connector->left);
1623         if (intel_sdvo_connector->right)
1624                 drm_property_destroy(dev, intel_sdvo_connector->right);
1625         if (intel_sdvo_connector->top)
1626                 drm_property_destroy(dev, intel_sdvo_connector->top);
1627         if (intel_sdvo_connector->bottom)
1628                 drm_property_destroy(dev, intel_sdvo_connector->bottom);
1629         if (intel_sdvo_connector->hpos)
1630                 drm_property_destroy(dev, intel_sdvo_connector->hpos);
1631         if (intel_sdvo_connector->vpos)
1632                 drm_property_destroy(dev, intel_sdvo_connector->vpos);
1633         if (intel_sdvo_connector->saturation)
1634                 drm_property_destroy(dev, intel_sdvo_connector->saturation);
1635         if (intel_sdvo_connector->contrast)
1636                 drm_property_destroy(dev, intel_sdvo_connector->contrast);
1637         if (intel_sdvo_connector->hue)
1638                 drm_property_destroy(dev, intel_sdvo_connector->hue);
1639         if (intel_sdvo_connector->sharpness)
1640                 drm_property_destroy(dev, intel_sdvo_connector->sharpness);
1641         if (intel_sdvo_connector->flicker_filter)
1642                 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
1643         if (intel_sdvo_connector->flicker_filter_2d)
1644                 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
1645         if (intel_sdvo_connector->flicker_filter_adaptive)
1646                 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
1647         if (intel_sdvo_connector->tv_luma_filter)
1648                 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
1649         if (intel_sdvo_connector->tv_chroma_filter)
1650                 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
1651         if (intel_sdvo_connector->dot_crawl)
1652                 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
1653         if (intel_sdvo_connector->brightness)
1654                 drm_property_destroy(dev, intel_sdvo_connector->brightness);
1655 }
1656
1657 static void intel_sdvo_destroy(struct drm_connector *connector)
1658 {
1659         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1660
1661         if (intel_sdvo_connector->tv_format)
1662                 drm_property_destroy(connector->dev,
1663                                      intel_sdvo_connector->tv_format);
1664
1665         intel_sdvo_destroy_enhance_property(connector);
1666         drm_sysfs_connector_remove(connector);
1667         drm_connector_cleanup(connector);
1668         kfree(connector);
1669 }
1670
1671 static int
1672 intel_sdvo_set_property(struct drm_connector *connector,
1673                         struct drm_property *property,
1674                         uint64_t val)
1675 {
1676         struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1677         struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1678         uint16_t temp_value;
1679         uint8_t cmd;
1680         int ret;
1681
1682         ret = drm_connector_property_set_value(connector, property, val);
1683         if (ret)
1684                 return ret;
1685
1686         if (property == intel_sdvo_connector->force_audio_property) {
1687                 if (val == intel_sdvo_connector->force_audio)
1688                         return 0;
1689
1690                 intel_sdvo_connector->force_audio = val;
1691
1692                 if (val > 0 && intel_sdvo->has_hdmi_audio)
1693                         return 0;
1694                 if (val < 0 && !intel_sdvo->has_hdmi_audio)
1695                         return 0;
1696
1697                 intel_sdvo->has_hdmi_audio = val > 0;
1698                 goto done;
1699         }
1700
1701 #define CHECK_PROPERTY(name, NAME) \
1702         if (intel_sdvo_connector->name == property) { \
1703                 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
1704                 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1705                 cmd = SDVO_CMD_SET_##NAME; \
1706                 intel_sdvo_connector->cur_##name = temp_value; \
1707                 goto set_value; \
1708         }
1709
1710         if (property == intel_sdvo_connector->tv_format) {
1711                 if (val >= TV_FORMAT_NUM)
1712                         return -EINVAL;
1713
1714                 if (intel_sdvo->tv_format_index ==
1715                     intel_sdvo_connector->tv_format_supported[val])
1716                         return 0;
1717
1718                 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
1719                 goto done;
1720         } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
1721                 temp_value = val;
1722                 if (intel_sdvo_connector->left == property) {
1723                         drm_connector_property_set_value(connector,
1724                                                          intel_sdvo_connector->right, val);
1725                         if (intel_sdvo_connector->left_margin == temp_value)
1726                                 return 0;
1727
1728                         intel_sdvo_connector->left_margin = temp_value;
1729                         intel_sdvo_connector->right_margin = temp_value;
1730                         temp_value = intel_sdvo_connector->max_hscan -
1731                                 intel_sdvo_connector->left_margin;
1732                         cmd = SDVO_CMD_SET_OVERSCAN_H;
1733                         goto set_value;
1734                 } else if (intel_sdvo_connector->right == property) {
1735                         drm_connector_property_set_value(connector,
1736                                                          intel_sdvo_connector->left, val);
1737                         if (intel_sdvo_connector->right_margin == temp_value)
1738                                 return 0;
1739
1740                         intel_sdvo_connector->left_margin = temp_value;
1741                         intel_sdvo_connector->right_margin = temp_value;
1742                         temp_value = intel_sdvo_connector->max_hscan -
1743                                 intel_sdvo_connector->left_margin;
1744                         cmd = SDVO_CMD_SET_OVERSCAN_H;
1745                         goto set_value;
1746                 } else if (intel_sdvo_connector->top == property) {
1747                         drm_connector_property_set_value(connector,
1748                                                          intel_sdvo_connector->bottom, val);
1749                         if (intel_sdvo_connector->top_margin == temp_value)
1750                                 return 0;
1751
1752                         intel_sdvo_connector->top_margin = temp_value;
1753                         intel_sdvo_connector->bottom_margin = temp_value;
1754                         temp_value = intel_sdvo_connector->max_vscan -
1755                                 intel_sdvo_connector->top_margin;
1756                         cmd = SDVO_CMD_SET_OVERSCAN_V;
1757                         goto set_value;
1758                 } else if (intel_sdvo_connector->bottom == property) {
1759                         drm_connector_property_set_value(connector,
1760                                                          intel_sdvo_connector->top, val);
1761                         if (intel_sdvo_connector->bottom_margin == temp_value)
1762                                 return 0;
1763
1764                         intel_sdvo_connector->top_margin = temp_value;
1765                         intel_sdvo_connector->bottom_margin = temp_value;
1766                         temp_value = intel_sdvo_connector->max_vscan -
1767                                 intel_sdvo_connector->top_margin;
1768                         cmd = SDVO_CMD_SET_OVERSCAN_V;
1769                         goto set_value;
1770                 }
1771                 CHECK_PROPERTY(hpos, HPOS)
1772                 CHECK_PROPERTY(vpos, VPOS)
1773                 CHECK_PROPERTY(saturation, SATURATION)
1774                 CHECK_PROPERTY(contrast, CONTRAST)
1775                 CHECK_PROPERTY(hue, HUE)
1776                 CHECK_PROPERTY(brightness, BRIGHTNESS)
1777                 CHECK_PROPERTY(sharpness, SHARPNESS)
1778                 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
1779                 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
1780                 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
1781                 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
1782                 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
1783                 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
1784         }
1785
1786         return -EINVAL; /* unknown property */
1787
1788 set_value:
1789         if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
1790                 return -EIO;
1791
1792
1793 done:
1794         if (intel_sdvo->base.base.crtc) {
1795                 struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
1796                 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x,
1797                                          crtc->y, crtc->fb);
1798         }
1799
1800         return 0;
1801 #undef CHECK_PROPERTY
1802 }
1803
1804 static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
1805         .dpms = intel_sdvo_dpms,
1806         .mode_fixup = intel_sdvo_mode_fixup,
1807         .prepare = intel_encoder_prepare,
1808         .mode_set = intel_sdvo_mode_set,
1809         .commit = intel_encoder_commit,
1810 };
1811
1812 static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
1813         .dpms = drm_helper_connector_dpms,
1814         .detect = intel_sdvo_detect,
1815         .fill_modes = drm_helper_probe_single_connector_modes,
1816         .set_property = intel_sdvo_set_property,
1817         .destroy = intel_sdvo_destroy,
1818 };
1819
1820 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
1821         .get_modes = intel_sdvo_get_modes,
1822         .mode_valid = intel_sdvo_mode_valid,
1823         .best_encoder = intel_best_encoder,
1824 };
1825
1826 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
1827 {
1828         struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1829
1830         if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
1831                 drm_mode_destroy(encoder->dev,
1832                                  intel_sdvo->sdvo_lvds_fixed_mode);
1833
1834         i2c_del_adapter(&intel_sdvo->ddc);
1835         intel_encoder_destroy(encoder);
1836 }
1837
1838 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
1839         .destroy = intel_sdvo_enc_destroy,
1840 };
1841
1842 static void
1843 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
1844 {
1845         uint16_t mask = 0;
1846         unsigned int num_bits;
1847
1848         /* Make a mask of outputs less than or equal to our own priority in the
1849          * list.
1850          */
1851         switch (sdvo->controlled_output) {
1852         case SDVO_OUTPUT_LVDS1:
1853                 mask |= SDVO_OUTPUT_LVDS1;
1854         case SDVO_OUTPUT_LVDS0:
1855                 mask |= SDVO_OUTPUT_LVDS0;
1856         case SDVO_OUTPUT_TMDS1:
1857                 mask |= SDVO_OUTPUT_TMDS1;
1858         case SDVO_OUTPUT_TMDS0:
1859                 mask |= SDVO_OUTPUT_TMDS0;
1860         case SDVO_OUTPUT_RGB1:
1861                 mask |= SDVO_OUTPUT_RGB1;
1862         case SDVO_OUTPUT_RGB0:
1863                 mask |= SDVO_OUTPUT_RGB0;
1864                 break;
1865         }
1866
1867         /* Count bits to find what number we are in the priority list. */
1868         mask &= sdvo->caps.output_flags;
1869         num_bits = hweight16(mask);
1870         /* If more than 3 outputs, default to DDC bus 3 for now. */
1871         if (num_bits > 3)
1872                 num_bits = 3;
1873
1874         /* Corresponds to SDVO_CONTROL_BUS_DDCx */
1875         sdvo->ddc_bus = 1 << num_bits;
1876 }
1877
1878 /**
1879  * Choose the appropriate DDC bus for control bus switch command for this
1880  * SDVO output based on the controlled output.
1881  *
1882  * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
1883  * outputs, then LVDS outputs.
1884  */
1885 static void
1886 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
1887                           struct intel_sdvo *sdvo, u32 reg)
1888 {
1889         struct sdvo_device_mapping *mapping;
1890
1891         if (IS_SDVOB(reg))
1892                 mapping = &(dev_priv->sdvo_mappings[0]);
1893         else
1894                 mapping = &(dev_priv->sdvo_mappings[1]);
1895
1896         if (mapping->initialized)
1897                 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
1898         else
1899                 intel_sdvo_guess_ddc_bus(sdvo);
1900 }
1901
1902 static void
1903 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
1904                           struct intel_sdvo *sdvo, u32 reg)
1905 {
1906         struct sdvo_device_mapping *mapping;
1907         u8 pin, speed;
1908
1909         if (IS_SDVOB(reg))
1910                 mapping = &dev_priv->sdvo_mappings[0];
1911         else
1912                 mapping = &dev_priv->sdvo_mappings[1];
1913
1914         pin = GMBUS_PORT_DPB;
1915         speed = GMBUS_RATE_1MHZ >> 8;
1916         if (mapping->initialized) {
1917                 pin = mapping->i2c_pin;
1918                 speed = mapping->i2c_speed;
1919         }
1920
1921         if (pin < GMBUS_NUM_PORTS) {
1922                 sdvo->i2c = &dev_priv->gmbus[pin].adapter;
1923                 intel_gmbus_set_speed(sdvo->i2c, speed);
1924                 intel_gmbus_force_bit(sdvo->i2c, true);
1925         } else
1926                 sdvo->i2c = &dev_priv->gmbus[GMBUS_PORT_DPB].adapter;
1927 }
1928
1929 static bool
1930 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
1931 {
1932         return intel_sdvo_check_supp_encode(intel_sdvo);
1933 }
1934
1935 static u8
1936 intel_sdvo_get_slave_addr(struct drm_device *dev, int sdvo_reg)
1937 {
1938         struct drm_i915_private *dev_priv = dev->dev_private;
1939         struct sdvo_device_mapping *my_mapping, *other_mapping;
1940
1941         if (IS_SDVOB(sdvo_reg)) {
1942                 my_mapping = &dev_priv->sdvo_mappings[0];
1943                 other_mapping = &dev_priv->sdvo_mappings[1];
1944         } else {
1945                 my_mapping = &dev_priv->sdvo_mappings[1];
1946                 other_mapping = &dev_priv->sdvo_mappings[0];
1947         }
1948
1949         /* If the BIOS described our SDVO device, take advantage of it. */
1950         if (my_mapping->slave_addr)
1951                 return my_mapping->slave_addr;
1952
1953         /* If the BIOS only described a different SDVO device, use the
1954          * address that it isn't using.
1955          */
1956         if (other_mapping->slave_addr) {
1957                 if (other_mapping->slave_addr == 0x70)
1958                         return 0x72;
1959                 else
1960                         return 0x70;
1961         }
1962
1963         /* No SDVO device info is found for another DVO port,
1964          * so use mapping assumption we had before BIOS parsing.
1965          */
1966         if (IS_SDVOB(sdvo_reg))
1967                 return 0x70;
1968         else
1969                 return 0x72;
1970 }
1971
1972 static void
1973 intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
1974                           struct intel_sdvo *encoder)
1975 {
1976         drm_connector_init(encoder->base.base.dev,
1977                            &connector->base.base,
1978                            &intel_sdvo_connector_funcs,
1979                            connector->base.base.connector_type);
1980
1981         drm_connector_helper_add(&connector->base.base,
1982                                  &intel_sdvo_connector_helper_funcs);
1983
1984         connector->base.base.interlace_allowed = 0;
1985         connector->base.base.doublescan_allowed = 0;
1986         connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
1987
1988         intel_connector_attach_encoder(&connector->base, &encoder->base);
1989         drm_sysfs_connector_add(&connector->base.base);
1990 }
1991
1992 static void
1993 intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector)
1994 {
1995         struct drm_device *dev = connector->base.base.dev;
1996
1997         connector->force_audio_property =
1998                 drm_property_create(dev, DRM_MODE_PROP_RANGE, "force_audio", 2);
1999         if (connector->force_audio_property) {
2000                 connector->force_audio_property->values[0] = -1;
2001                 connector->force_audio_property->values[1] = 1;
2002                 drm_connector_attach_property(&connector->base.base,
2003                                               connector->force_audio_property, 0);
2004         }
2005 }
2006
2007 static bool
2008 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
2009 {
2010         struct drm_encoder *encoder = &intel_sdvo->base.base;
2011         struct drm_connector *connector;
2012         struct intel_connector *intel_connector;
2013         struct intel_sdvo_connector *intel_sdvo_connector;
2014
2015         intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2016         if (!intel_sdvo_connector)
2017                 return false;
2018
2019         if (device == 0) {
2020                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2021                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2022         } else if (device == 1) {
2023                 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2024                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2025         }
2026
2027         intel_connector = &intel_sdvo_connector->base;
2028         connector = &intel_connector->base;
2029         connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2030         encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2031         connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2032
2033         if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
2034                 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2035                 intel_sdvo->is_hdmi = true;
2036         }
2037         intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2038                                        (1 << INTEL_ANALOG_CLONE_BIT));
2039
2040         intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2041         if (intel_sdvo->is_hdmi)
2042                 intel_sdvo_add_hdmi_properties(intel_sdvo_connector);
2043
2044         return true;
2045 }
2046
2047 static bool
2048 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
2049 {
2050         struct drm_encoder *encoder = &intel_sdvo->base.base;
2051         struct drm_connector *connector;
2052         struct intel_connector *intel_connector;
2053         struct intel_sdvo_connector *intel_sdvo_connector;
2054
2055         intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2056         if (!intel_sdvo_connector)
2057                 return false;
2058
2059         intel_connector = &intel_sdvo_connector->base;
2060         connector = &intel_connector->base;
2061         encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2062         connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2063
2064         intel_sdvo->controlled_output |= type;
2065         intel_sdvo_connector->output_flag = type;
2066
2067         intel_sdvo->is_tv = true;
2068         intel_sdvo->base.needs_tv_clock = true;
2069         intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT;
2070
2071         intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2072
2073         if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2074                 goto err;
2075
2076         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2077                 goto err;
2078
2079         return true;
2080
2081 err:
2082         intel_sdvo_destroy(connector);
2083         return false;
2084 }
2085
2086 static bool
2087 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
2088 {
2089         struct drm_encoder *encoder = &intel_sdvo->base.base;
2090         struct drm_connector *connector;
2091         struct intel_connector *intel_connector;
2092         struct intel_sdvo_connector *intel_sdvo_connector;
2093
2094         intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2095         if (!intel_sdvo_connector)
2096                 return false;
2097
2098         intel_connector = &intel_sdvo_connector->base;
2099         connector = &intel_connector->base;
2100         connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2101         encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2102         connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2103
2104         if (device == 0) {
2105                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2106                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2107         } else if (device == 1) {
2108                 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2109                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2110         }
2111
2112         intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2113                                        (1 << INTEL_ANALOG_CLONE_BIT));
2114
2115         intel_sdvo_connector_init(intel_sdvo_connector,
2116                                   intel_sdvo);
2117         return true;
2118 }
2119
2120 static bool
2121 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2122 {
2123         struct drm_encoder *encoder = &intel_sdvo->base.base;
2124         struct drm_connector *connector;
2125         struct intel_connector *intel_connector;
2126         struct intel_sdvo_connector *intel_sdvo_connector;
2127
2128         intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2129         if (!intel_sdvo_connector)
2130                 return false;
2131
2132         intel_connector = &intel_sdvo_connector->base;
2133         connector = &intel_connector->base;
2134         encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2135         connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2136
2137         if (device == 0) {
2138                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2139                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2140         } else if (device == 1) {
2141                 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2142                 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2143         }
2144
2145         intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) |
2146                                        (1 << INTEL_SDVO_LVDS_CLONE_BIT));
2147
2148         intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2149         if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2150                 goto err;
2151
2152         return true;
2153
2154 err:
2155         intel_sdvo_destroy(connector);
2156         return false;
2157 }
2158
2159 static bool
2160 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
2161 {
2162         intel_sdvo->is_tv = false;
2163         intel_sdvo->base.needs_tv_clock = false;
2164         intel_sdvo->is_lvds = false;
2165
2166         /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2167
2168         if (flags & SDVO_OUTPUT_TMDS0)
2169                 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
2170                         return false;
2171
2172         if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2173                 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
2174                         return false;
2175
2176         /* TV has no XXX1 function block */
2177         if (flags & SDVO_OUTPUT_SVID0)
2178                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
2179                         return false;
2180
2181         if (flags & SDVO_OUTPUT_CVBS0)
2182                 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
2183                         return false;
2184
2185         if (flags & SDVO_OUTPUT_RGB0)
2186                 if (!intel_sdvo_analog_init(intel_sdvo, 0))
2187                         return false;
2188
2189         if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2190                 if (!intel_sdvo_analog_init(intel_sdvo, 1))
2191                         return false;
2192
2193         if (flags & SDVO_OUTPUT_LVDS0)
2194                 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
2195                         return false;
2196
2197         if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2198                 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
2199                         return false;
2200
2201         if ((flags & SDVO_OUTPUT_MASK) == 0) {
2202                 unsigned char bytes[2];
2203
2204                 intel_sdvo->controlled_output = 0;
2205                 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
2206                 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2207                               SDVO_NAME(intel_sdvo),
2208                               bytes[0], bytes[1]);
2209                 return false;
2210         }
2211         intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1);
2212
2213         return true;
2214 }
2215
2216 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2217                                           struct intel_sdvo_connector *intel_sdvo_connector,
2218                                           int type)
2219 {
2220         struct drm_device *dev = intel_sdvo->base.base.dev;
2221         struct intel_sdvo_tv_format format;
2222         uint32_t format_map, i;
2223
2224         if (!intel_sdvo_set_target_output(intel_sdvo, type))
2225                 return false;
2226
2227         if (!intel_sdvo_get_value(intel_sdvo,
2228                                   SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2229                                   &format, sizeof(format)))
2230                 return false;
2231
2232         memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2233
2234         if (format_map == 0)
2235                 return false;
2236
2237         intel_sdvo_connector->format_supported_num = 0;
2238         for (i = 0 ; i < TV_FORMAT_NUM; i++)
2239                 if (format_map & (1 << i))
2240                         intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
2241
2242
2243         intel_sdvo_connector->tv_format =
2244                         drm_property_create(dev, DRM_MODE_PROP_ENUM,
2245                                             "mode", intel_sdvo_connector->format_supported_num);
2246         if (!intel_sdvo_connector->tv_format)
2247                 return false;
2248
2249         for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2250                 drm_property_add_enum(
2251                                 intel_sdvo_connector->tv_format, i,
2252                                 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
2253
2254         intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
2255         drm_connector_attach_property(&intel_sdvo_connector->base.base,
2256                                       intel_sdvo_connector->tv_format, 0);
2257         return true;
2258
2259 }
2260
2261 #define ENHANCEMENT(name, NAME) do { \
2262         if (enhancements.name) { \
2263                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2264                     !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2265                         return false; \
2266                 intel_sdvo_connector->max_##name = data_value[0]; \
2267                 intel_sdvo_connector->cur_##name = response; \
2268                 intel_sdvo_connector->name = \
2269                         drm_property_create(dev, DRM_MODE_PROP_RANGE, #name, 2); \
2270                 if (!intel_sdvo_connector->name) return false; \
2271                 intel_sdvo_connector->name->values[0] = 0; \
2272                 intel_sdvo_connector->name->values[1] = data_value[0]; \
2273                 drm_connector_attach_property(connector, \
2274                                               intel_sdvo_connector->name, \
2275                                               intel_sdvo_connector->cur_##name); \
2276                 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2277                               data_value[0], data_value[1], response); \
2278         } \
2279 } while(0)
2280
2281 static bool
2282 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2283                                       struct intel_sdvo_connector *intel_sdvo_connector,
2284                                       struct intel_sdvo_enhancements_reply enhancements)
2285 {
2286         struct drm_device *dev = intel_sdvo->base.base.dev;
2287         struct drm_connector *connector = &intel_sdvo_connector->base.base;
2288         uint16_t response, data_value[2];
2289
2290         /* when horizontal overscan is supported, Add the left/right  property */
2291         if (enhancements.overscan_h) {
2292                 if (!intel_sdvo_get_value(intel_sdvo,
2293                                           SDVO_CMD_GET_MAX_OVERSCAN_H,
2294                                           &data_value, 4))
2295                         return false;
2296
2297                 if (!intel_sdvo_get_value(intel_sdvo,
2298                                           SDVO_CMD_GET_OVERSCAN_H,
2299                                           &response, 2))
2300                         return false;
2301
2302                 intel_sdvo_connector->max_hscan = data_value[0];
2303                 intel_sdvo_connector->left_margin = data_value[0] - response;
2304                 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2305                 intel_sdvo_connector->left =
2306                         drm_property_create(dev, DRM_MODE_PROP_RANGE,
2307                                             "left_margin", 2);
2308                 if (!intel_sdvo_connector->left)
2309                         return false;
2310
2311                 intel_sdvo_connector->left->values[0] = 0;
2312                 intel_sdvo_connector->left->values[1] = data_value[0];
2313                 drm_connector_attach_property(connector,
2314                                               intel_sdvo_connector->left,
2315                                               intel_sdvo_connector->left_margin);
2316
2317                 intel_sdvo_connector->right =
2318                         drm_property_create(dev, DRM_MODE_PROP_RANGE,
2319                                             "right_margin", 2);
2320                 if (!intel_sdvo_connector->right)
2321                         return false;
2322
2323                 intel_sdvo_connector->right->values[0] = 0;
2324                 intel_sdvo_connector->right->values[1] = data_value[0];
2325                 drm_connector_attach_property(connector,
2326                                               intel_sdvo_connector->right,
2327                                               intel_sdvo_connector->right_margin);
2328                 DRM_DEBUG_KMS("h_overscan: max %d, "
2329                               "default %d, current %d\n",
2330                               data_value[0], data_value[1], response);
2331         }
2332
2333         if (enhancements.overscan_v) {
2334                 if (!intel_sdvo_get_value(intel_sdvo,
2335                                           SDVO_CMD_GET_MAX_OVERSCAN_V,
2336                                           &data_value, 4))
2337                         return false;
2338
2339                 if (!intel_sdvo_get_value(intel_sdvo,
2340                                           SDVO_CMD_GET_OVERSCAN_V,
2341                                           &response, 2))
2342                         return false;
2343
2344                 intel_sdvo_connector->max_vscan = data_value[0];
2345                 intel_sdvo_connector->top_margin = data_value[0] - response;
2346                 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2347                 intel_sdvo_connector->top =
2348                         drm_property_create(dev, DRM_MODE_PROP_RANGE,
2349                                             "top_margin", 2);
2350                 if (!intel_sdvo_connector->top)
2351                         return false;
2352
2353                 intel_sdvo_connector->top->values[0] = 0;
2354                 intel_sdvo_connector->top->values[1] = data_value[0];
2355                 drm_connector_attach_property(connector,
2356                                               intel_sdvo_connector->top,
2357                                               intel_sdvo_connector->top_margin);
2358
2359                 intel_sdvo_connector->bottom =
2360                         drm_property_create(dev, DRM_MODE_PROP_RANGE,
2361                                             "bottom_margin", 2);
2362                 if (!intel_sdvo_connector->bottom)
2363                         return false;
2364
2365                 intel_sdvo_connector->bottom->values[0] = 0;
2366                 intel_sdvo_connector->bottom->values[1] = data_value[0];
2367                 drm_connector_attach_property(connector,
2368                                               intel_sdvo_connector->bottom,
2369                                               intel_sdvo_connector->bottom_margin);
2370                 DRM_DEBUG_KMS("v_overscan: max %d, "
2371                               "default %d, current %d\n",
2372                               data_value[0], data_value[1], response);
2373         }
2374
2375         ENHANCEMENT(hpos, HPOS);
2376         ENHANCEMENT(vpos, VPOS);
2377         ENHANCEMENT(saturation, SATURATION);
2378         ENHANCEMENT(contrast, CONTRAST);
2379         ENHANCEMENT(hue, HUE);
2380         ENHANCEMENT(sharpness, SHARPNESS);
2381         ENHANCEMENT(brightness, BRIGHTNESS);
2382         ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2383         ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2384         ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2385         ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2386         ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2387
2388         if (enhancements.dot_crawl) {
2389                 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2390                         return false;
2391
2392                 intel_sdvo_connector->max_dot_crawl = 1;
2393                 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2394                 intel_sdvo_connector->dot_crawl =
2395                         drm_property_create(dev, DRM_MODE_PROP_RANGE, "dot_crawl", 2);
2396                 if (!intel_sdvo_connector->dot_crawl)
2397                         return false;
2398
2399                 intel_sdvo_connector->dot_crawl->values[0] = 0;
2400                 intel_sdvo_connector->dot_crawl->values[1] = 1;
2401                 drm_connector_attach_property(connector,
2402                                               intel_sdvo_connector->dot_crawl,
2403                                               intel_sdvo_connector->cur_dot_crawl);
2404                 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2405         }
2406
2407         return true;
2408 }
2409
2410 static bool
2411 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2412                                         struct intel_sdvo_connector *intel_sdvo_connector,
2413                                         struct intel_sdvo_enhancements_reply enhancements)
2414 {
2415         struct drm_device *dev = intel_sdvo->base.base.dev;
2416         struct drm_connector *connector = &intel_sdvo_connector->base.base;
2417         uint16_t response, data_value[2];
2418
2419         ENHANCEMENT(brightness, BRIGHTNESS);
2420
2421         return true;
2422 }
2423 #undef ENHANCEMENT
2424
2425 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2426                                                struct intel_sdvo_connector *intel_sdvo_connector)
2427 {
2428         union {
2429                 struct intel_sdvo_enhancements_reply reply;
2430                 uint16_t response;
2431         } enhancements;
2432
2433         enhancements.response = 0;
2434         intel_sdvo_get_value(intel_sdvo,
2435                              SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2436                              &enhancements, sizeof(enhancements));
2437         if (enhancements.response == 0) {
2438                 DRM_DEBUG_KMS("No enhancement is supported\n");
2439                 return true;
2440         }
2441
2442         if (IS_TV(intel_sdvo_connector))
2443                 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2444         else if(IS_LVDS(intel_sdvo_connector))
2445                 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2446         else
2447                 return true;
2448 }
2449
2450 static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2451                                      struct i2c_msg *msgs,
2452                                      int num)
2453 {
2454         struct intel_sdvo *sdvo = adapter->algo_data;
2455
2456         if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2457                 return -EIO;
2458
2459         return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2460 }
2461
2462 static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2463 {
2464         struct intel_sdvo *sdvo = adapter->algo_data;
2465         return sdvo->i2c->algo->functionality(sdvo->i2c);
2466 }
2467
2468 static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
2469         .master_xfer    = intel_sdvo_ddc_proxy_xfer,
2470         .functionality  = intel_sdvo_ddc_proxy_func
2471 };
2472
2473 static bool
2474 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
2475                           struct drm_device *dev)
2476 {
2477         sdvo->ddc.owner = THIS_MODULE;
2478         sdvo->ddc.class = I2C_CLASS_DDC;
2479         snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2480         sdvo->ddc.dev.parent = &dev->pdev->dev;
2481         sdvo->ddc.algo_data = sdvo;
2482         sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
2483
2484         return i2c_add_adapter(&sdvo->ddc) == 0;
2485 }
2486
2487 bool intel_sdvo_init(struct drm_device *dev, int sdvo_reg)
2488 {
2489         struct drm_i915_private *dev_priv = dev->dev_private;
2490         struct intel_encoder *intel_encoder;
2491         struct intel_sdvo *intel_sdvo;
2492         int i;
2493
2494         intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
2495         if (!intel_sdvo)
2496                 return false;
2497
2498         if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev)) {
2499                 kfree(intel_sdvo);
2500                 return false;
2501         }
2502
2503         intel_sdvo->sdvo_reg = sdvo_reg;
2504
2505         intel_encoder = &intel_sdvo->base;
2506         intel_encoder->type = INTEL_OUTPUT_SDVO;
2507         /* encoder type will be decided later */
2508         drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
2509
2510         intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, sdvo_reg) >> 1;
2511         intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
2512
2513         /* Read the regs to test if we can talk to the device */
2514         for (i = 0; i < 0x40; i++) {
2515                 u8 byte;
2516
2517                 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
2518                         DRM_DEBUG_KMS("No SDVO device found on SDVO%c\n",
2519                                       IS_SDVOB(sdvo_reg) ? 'B' : 'C');
2520                         goto err;
2521                 }
2522         }
2523
2524         if (IS_SDVOB(sdvo_reg))
2525                 dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS;
2526         else
2527                 dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS;
2528
2529         drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
2530
2531         /* In default case sdvo lvds is false */
2532         if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
2533                 goto err;
2534
2535         if (intel_sdvo_output_setup(intel_sdvo,
2536                                     intel_sdvo->caps.output_flags) != true) {
2537                 DRM_DEBUG_KMS("SDVO output failed to setup on SDVO%c\n",
2538                               IS_SDVOB(sdvo_reg) ? 'B' : 'C');
2539                 goto err;
2540         }
2541
2542         intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
2543
2544         /* Set the input timing to the screen. Assume always input 0. */
2545         if (!intel_sdvo_set_target_input(intel_sdvo))
2546                 goto err;
2547
2548         if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2549                                                     &intel_sdvo->pixel_clock_min,
2550                                                     &intel_sdvo->pixel_clock_max))
2551                 goto err;
2552
2553         DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
2554                         "clock range %dMHz - %dMHz, "
2555                         "input 1: %c, input 2: %c, "
2556                         "output 1: %c, output 2: %c\n",
2557                         SDVO_NAME(intel_sdvo),
2558                         intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
2559                         intel_sdvo->caps.device_rev_id,
2560                         intel_sdvo->pixel_clock_min / 1000,
2561                         intel_sdvo->pixel_clock_max / 1000,
2562                         (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2563                         (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
2564                         /* check currently supported outputs */
2565                         intel_sdvo->caps.output_flags &
2566                         (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
2567                         intel_sdvo->caps.output_flags &
2568                         (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
2569         return true;
2570
2571 err:
2572         drm_encoder_cleanup(&intel_encoder->base);
2573         i2c_del_adapter(&intel_sdvo->ddc);
2574         kfree(intel_sdvo);
2575
2576         return false;
2577 }