drivers/gpu/drm/radeon/radeon_object.c

   1 /*
   2  * Copyright 2009 Jerome Glisse.
   3  * All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the
   7  * "Software"), to deal in the Software without restriction, including
   8  * without limitation the rights to use, copy, modify, merge, publish,
   9  * distribute, sub license, and/or sell copies of the Software, and to
  10  * permit persons to whom the Software is furnished to do so, subject to
  11  * the following conditions:
  12  *
  13  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  14  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  15  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  16  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  17  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  18  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  19  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  20  *
  21  * The above copyright notice and this permission notice (including the
  22  * next paragraph) shall be included in all copies or substantial portions
  23  * of the Software.
  24  *
  25  */
  26 /*
  27  * Authors:
  28  *    Jerome Glisse <glisse@freedesktop.org>
  29  *    Thomas Hellstrom <thomas-at-tungstengraphics-dot-com>
  30  *    Dave Airlie
  31  */
  32 #include <linux/list.h>
  33 #include <linux/slab.h>
  34 #include <drm/drmP.h>
  35 #include "radeon_drm.h"
  36 #include "radeon.h"
  37
  38
  39 int radeon_ttm_init(struct radeon_device *rdev);
  40 void radeon_ttm_fini(struct radeon_device *rdev);
  41 static void radeon_bo_clear_surface_reg(struct radeon_bo *bo);
  42
  43 /*
  44  * To exclude mutual BO access we rely on bo_reserve exclusion, as all
  45  * function are calling it.
  46  */
  47
  48 static void radeon_ttm_bo_destroy(struct ttm_buffer_object *tbo)
  49 {
  50         struct radeon_bo *bo;
  51
  52         bo = container_of(tbo, struct radeon_bo, tbo);
  53         mutex_lock(&bo->rdev->gem.mutex);
  54         list_del_init(&bo->list);
  55         mutex_unlock(&bo->rdev->gem.mutex);
  56         radeon_bo_clear_surface_reg(bo);
  57         kfree(bo);
  58 }
  59
  60 bool radeon_ttm_bo_is_radeon_bo(struct ttm_buffer_object *bo)
  61 {
  62         if (bo->destroy == &radeon_ttm_bo_destroy)
  63                 return true;
  64         return false;
  65 }
  66
  67 void radeon_ttm_placement_from_domain(struct radeon_bo *rbo, u32 domain)
  68 {
  69         u32 c = 0;
  70
  71         rbo->placement.fpfn = 0;
  72         rbo->placement.lpfn = rbo->rdev->mc.active_vram_size >> PAGE_SHIFT;
  73         rbo->placement.placement = rbo->placements;
  74         rbo->placement.busy_placement = rbo->placements;
  75         if (domain & RADEON_GEM_DOMAIN_VRAM)
  76                 rbo->placements[c++] = TTM_PL_FLAG_WC | TTM_PL_FLAG_UNCACHED |
  77                                         TTM_PL_FLAG_VRAM;
  78         if (domain & RADEON_GEM_DOMAIN_GTT)
  79                 rbo->placements[c++] = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT;
  80         if (domain & RADEON_GEM_DOMAIN_CPU)
  81                 rbo->placements[c++] = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM;
  82         if (!c)
  83                 rbo->placements[c++] = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM;
  84         rbo->placement.num_placement = c;
  85         rbo->placement.num_busy_placement = c;
  86 }
  87
  88 int radeon_bo_create(struct radeon_device *rdev, struct drm_gem_object *gobj,
  89                      unsigned long size, int byte_align, bool kernel, u32 domain,
  90                      struct radeon_bo **bo_ptr)
  91 {
  92         struct radeon_bo *bo;
  93         enum ttm_bo_type type;
  94         int page_align = roundup(byte_align, PAGE_SIZE) >> PAGE_SHIFT;
  95         int r;
  96
  97         if (unlikely(rdev->mman.bdev.dev_mapping == NULL)) {
  98                 rdev->mman.bdev.dev_mapping = rdev->ddev->dev_mapping;
  99         }
 100         if (kernel) {
 101                 type = ttm_bo_type_kernel;
 102         } else {
 103                 type = ttm_bo_type_device;
 104         }
 105         *bo_ptr = NULL;
 106
 107 retry:
 108         bo = kzalloc(sizeof(struct radeon_bo), GFP_KERNEL);
 109         if (bo == NULL)
 110                 return -ENOMEM;
 111         bo->rdev = rdev;
 112         bo->gobj = gobj;
 113         bo->surface_reg = -1;
 114         INIT_LIST_HEAD(&bo->list);
 115         radeon_ttm_placement_from_domain(bo, domain);
 116         /* Kernel allocation are uninterruptible */
 117         mutex_lock(&rdev->vram_mutex);
 118         r = ttm_bo_init(&rdev->mman.bdev, &bo->tbo, size, type,
 119                         &bo->placement, page_align, 0, !kernel, NULL, size,
 120                         &radeon_ttm_bo_destroy);
 121         mutex_unlock(&rdev->vram_mutex);
 122         if (unlikely(r != 0)) {
 123                 if (r != -ERESTARTSYS) {
 124                         if (domain == RADEON_GEM_DOMAIN_VRAM) {
 125                                 domain |= RADEON_GEM_DOMAIN_GTT;
 126                                 goto retry;
 127                         }
 128                         dev_err(rdev->dev,
 129                                 "object_init failed for (%lu, 0x%08X)\n",
 130                                 size, domain);
 131                 }
 132                 return r;
 133         }
 134         *bo_ptr = bo;
 135         if (gobj) {
 136                 mutex_lock(&bo->rdev->gem.mutex);
 137                 list_add_tail(&bo->list, &rdev->gem.objects);
 138                 mutex_unlock(&bo->rdev->gem.mutex);
 139         }
 140         return 0;
 141 }
 142
 143 int radeon_bo_kmap(struct radeon_bo *bo, void **ptr)
 144 {
 145         bool is_iomem;
 146         int r;
 147
 148         if (bo->kptr) {
 149                 if (ptr) {
 150                         *ptr = bo->kptr;
 151                 }
 152                 return 0;
 153         }
 154         r = ttm_bo_kmap(&bo->tbo, 0, bo->tbo.num_pages, &bo->kmap);
 155         if (r) {
 156                 return r;
 157         }
 158         bo->kptr = ttm_kmap_obj_virtual(&bo->kmap, &is_iomem);
 159         if (ptr) {
 160                 *ptr = bo->kptr;
 161         }
 162         radeon_bo_check_tiling(bo, 0, 0);
 163         return 0;
 164 }
 165
 166 void radeon_bo_kunmap(struct radeon_bo *bo)
 167 {
 168         if (bo->kptr == NULL)
 169                 return;
 170         bo->kptr = NULL;
 171         radeon_bo_check_tiling(bo, 0, 0);
 172         ttm_bo_kunmap(&bo->kmap);
 173 }
 174
 175 void radeon_bo_unref(struct radeon_bo **bo)
 176 {
 177         struct ttm_buffer_object *tbo;
 178         struct radeon_device *rdev;
 179
 180         if ((*bo) == NULL)
 181                 return;
 182         rdev = (*bo)->rdev;
 183         tbo = &((*bo)->tbo);
 184         mutex_lock(&rdev->vram_mutex);
 185         ttm_bo_unref(&tbo);
 186         mutex_unlock(&rdev->vram_mutex);
 187         if (tbo == NULL)
 188                 *bo = NULL;
 189 }
 190
 191 int radeon_bo_pin(struct radeon_bo *bo, u32 domain, u64 *gpu_addr)
 192 {
 193         int r, i;
 194
 195         if (bo->pin_count) {
 196                 bo->pin_count++;
 197                 if (gpu_addr)
 198                         *gpu_addr = radeon_bo_gpu_offset(bo);
 199                 return 0;
 200         }
 201         radeon_ttm_placement_from_domain(bo, domain);
 202         if (domain == RADEON_GEM_DOMAIN_VRAM) {
 203                 /* force to pin into visible video ram */
 204                 bo->placement.lpfn = bo->rdev->mc.visible_vram_size >> PAGE_SHIFT;
 205         }
 206         for (i = 0; i < bo->placement.num_placement; i++)
 207                 bo->placements[i] |= TTM_PL_FLAG_NO_EVICT;
 208         r = ttm_bo_validate(&bo->tbo, &bo->placement, false, false, false);
 209         if (likely(r == 0)) {
 210                 bo->pin_count = 1;
 211                 if (gpu_addr != NULL)
 212                         *gpu_addr = radeon_bo_gpu_offset(bo);
 213         }
 214         if (unlikely(r != 0))
 215                 dev_err(bo->rdev->dev, "%p pin failed\n", bo);
 216         return r;
 217 }
 218
 219 int radeon_bo_unpin(struct radeon_bo *bo)
 220 {
 221         int r, i;
 222
 223         if (!bo->pin_count) {
 224                 dev_warn(bo->rdev->dev, "%p unpin not necessary\n", bo);
 225                 return 0;
 226         }
 227         bo->pin_count--;
 228         if (bo->pin_count)
 229                 return 0;
 230         for (i = 0; i < bo->placement.num_placement; i++)
 231                 bo->placements[i] &= ~TTM_PL_FLAG_NO_EVICT;
 232         r = ttm_bo_validate(&bo->tbo, &bo->placement, false, false, false);
 233         if (unlikely(r != 0))
 234                 dev_err(bo->rdev->dev, "%p validate failed for unpin\n", bo);
 235         return r;
 236 }
 237
 238 int radeon_bo_evict_vram(struct radeon_device *rdev)
 239 {
 240         /* late 2.6.33 fix IGP hibernate - we need pm ops to do this correct */
 241         if (0 && (rdev->flags & RADEON_IS_IGP)) {
 242                 if (rdev->mc.igp_sideport_enabled == false)
 243                         /* Useless to evict on IGP chips */
 244                         return 0;
 245         }
 246         return ttm_bo_evict_mm(&rdev->mman.bdev, TTM_PL_VRAM);
 247 }
 248
 249 void radeon_bo_force_delete(struct radeon_device *rdev)
 250 {
 251         struct radeon_bo *bo, *n;
 252         struct drm_gem_object *gobj;
 253
 254         if (list_empty(&rdev->gem.objects)) {
 255                 return;
 256         }
 257         dev_err(rdev->dev, "Userspace still has active objects !\n");
 258         list_for_each_entry_safe(bo, n, &rdev->gem.objects, list) {
 259                 mutex_lock(&rdev->ddev->struct_mutex);
 260                 gobj = bo->gobj;
 261                 dev_err(rdev->dev, "%p %p %lu %lu force free\n",
 262                         gobj, bo, (unsigned long)gobj->size,
 263                         *((unsigned long *)&gobj->refcount));
 264                 mutex_lock(&bo->rdev->gem.mutex);
 265                 list_del_init(&bo->list);
 266                 mutex_unlock(&bo->rdev->gem.mutex);
 267                 radeon_bo_unref(&bo);
 268                 gobj->driver_private = NULL;
 269                 drm_gem_object_unreference(gobj);
 270                 mutex_unlock(&rdev->ddev->struct_mutex);
 271         }
 272 }
 273
 274 int radeon_bo_init(struct radeon_device *rdev)
 275 {
 276         /* Add an MTRR for the VRAM */
 277         rdev->mc.vram_mtrr = mtrr_add(rdev->mc.aper_base, rdev->mc.aper_size,
 278                         MTRR_TYPE_WRCOMB, 1);
 279         DRM_INFO("Detected VRAM RAM=%lluM, BAR=%lluM\n",
 280                 rdev->mc.mc_vram_size >> 20,
 281                 (unsigned long long)rdev->mc.aper_size >> 20);
 282         DRM_INFO("RAM width %dbits %cDR\n",
 283                         rdev->mc.vram_width, rdev->mc.vram_is_ddr ? 'D' : 'S');
 284         return radeon_ttm_init(rdev);
 285 }
 286
 287 void radeon_bo_fini(struct radeon_device *rdev)
 288 {
 289         radeon_ttm_fini(rdev);
 290 }
 291
 292 void radeon_bo_list_add_object(struct radeon_bo_list *lobj,
 293                                 struct list_head *head)
 294 {
 295         if (lobj->wdomain) {
 296                 list_add(&lobj->list, head);
 297         } else {
 298                 list_add_tail(&lobj->list, head);
 299         }
 300 }
 301
 302 int radeon_bo_list_reserve(struct list_head *head)
 303 {
 304         struct radeon_bo_list *lobj;
 305         int r;
 306
 307         list_for_each_entry(lobj, head, list){
 308                 r = radeon_bo_reserve(lobj->bo, false);
 309                 if (unlikely(r != 0))
 310                         return r;
 311                 lobj->reserved = true;
 312         }
 313         return 0;
 314 }
 315
 316 void radeon_bo_list_unreserve(struct list_head *head)
 317 {
 318         struct radeon_bo_list *lobj;
 319
 320         list_for_each_entry(lobj, head, list) {
 321                 /* only unreserve object we successfully reserved */
 322                 if (lobj->reserved && radeon_bo_is_reserved(lobj->bo))
 323                         radeon_bo_unreserve(lobj->bo);
 324         }
 325 }
 326
 327 int radeon_bo_list_validate(struct list_head *head)
 328 {
 329         struct radeon_bo_list *lobj;
 330         struct radeon_bo *bo;
 331         u32 domain;
 332         int r;
 333
 334         list_for_each_entry(lobj, head, list) {
 335                 lobj->reserved = false;
 336         }
 337         r = radeon_bo_list_reserve(head);
 338         if (unlikely(r != 0)) {
 339                 return r;
 340         }
 341         list_for_each_entry(lobj, head, list) {
 342                 bo = lobj->bo;
 343                 if (!bo->pin_count) {
 344                         domain = lobj->wdomain ? lobj->wdomain : lobj->rdomain;
 345
 346                 retry:
 347                         radeon_ttm_placement_from_domain(bo, domain);
 348                         r = ttm_bo_validate(&bo->tbo, &bo->placement,
 349                                                 true, false, false);
 350                         if (unlikely(r)) {
 351                                 if (r != -ERESTARTSYS && domain == RADEON_GEM_DOMAIN_VRAM) {
 352                                         domain |= RADEON_GEM_DOMAIN_GTT;
 353                                         goto retry;
 354                                 }
 355                                 return r;
 356                         }
 357                 }
 358                 lobj->gpu_offset = radeon_bo_gpu_offset(bo);
 359                 lobj->tiling_flags = bo->tiling_flags;
 360         }
 361         return 0;
 362 }
 363
 364 void radeon_bo_list_fence(struct list_head *head, void *fence)
 365 {
 366         struct radeon_bo_list *lobj;
 367         struct radeon_bo *bo;
 368         struct radeon_fence *old_fence = NULL;
 369
 370         list_for_each_entry(lobj, head, list) {
 371                 bo = lobj->bo;
 372                 spin_lock(&bo->tbo.lock);
 373                 old_fence = (struct radeon_fence *)bo->tbo.sync_obj;
 374                 bo->tbo.sync_obj = radeon_fence_ref(fence);
 375                 bo->tbo.sync_obj_arg = NULL;
 376                 spin_unlock(&bo->tbo.lock);
 377                 if (old_fence) {
 378                         radeon_fence_unref(&old_fence);
 379                 }
 380         }
 381 }
 382
 383 int radeon_bo_fbdev_mmap(struct radeon_bo *bo,
 384                              struct vm_area_struct *vma)
 385 {
 386         return ttm_fbdev_mmap(vma, &bo->tbo);
 387 }
 388
 389 int radeon_bo_get_surface_reg(struct radeon_bo *bo)
 390 {
 391         struct radeon_device *rdev = bo->rdev;
 392         struct radeon_surface_reg *reg;
 393         struct radeon_bo *old_object;
 394         int steal;
 395         int i;
 396
 397         BUG_ON(!atomic_read(&bo->tbo.reserved));
 398
 399         if (!bo->tiling_flags)
 400                 return 0;
 401
 402         if (bo->surface_reg >= 0) {
 403                 reg = &rdev->surface_regs[bo->surface_reg];
 404                 i = bo->surface_reg;
 405                 goto out;
 406         }
 407
 408         steal = -1;
 409         for (i = 0; i < RADEON_GEM_MAX_SURFACES; i++) {
 410
 411                 reg = &rdev->surface_regs[i];
 412                 if (!reg->bo)
 413                         break;
 414
 415                 old_object = reg->bo;
 416                 if (old_object->pin_count == 0)
 417                         steal = i;
 418         }
 419
 420         /* if we are all out */
 421         if (i == RADEON_GEM_MAX_SURFACES) {
 422                 if (steal == -1)
 423                         return -ENOMEM;
 424                 /* find someone with a surface reg and nuke their BO */
 425                 reg = &rdev->surface_regs[steal];
 426                 old_object = reg->bo;
 427                 /* blow away the mapping */
 428                 DRM_DEBUG("stealing surface reg %d from %p\n", steal, old_object);
 429                 ttm_bo_unmap_virtual(&old_object->tbo);
 430                 old_object->surface_reg = -1;
 431                 i = steal;
 432         }
 433
 434         bo->surface_reg = i;
 435         reg->bo = bo;
 436
 437 out:
 438         radeon_set_surface_reg(rdev, i, bo->tiling_flags, bo->pitch,
 439                                bo->tbo.mem.start << PAGE_SHIFT,
 440                                bo->tbo.num_pages << PAGE_SHIFT);
 441         return 0;
 442 }
 443
 444 static void radeon_bo_clear_surface_reg(struct radeon_bo *bo)
 445 {
 446         struct radeon_device *rdev = bo->rdev;
 447         struct radeon_surface_reg *reg;
 448
 449         if (bo->surface_reg == -1)
 450                 return;
 451
 452         reg = &rdev->surface_regs[bo->surface_reg];
 453         radeon_clear_surface_reg(rdev, bo->surface_reg);
 454
 455         reg->bo = NULL;
 456         bo->surface_reg = -1;
 457 }
 458
 459 int radeon_bo_set_tiling_flags(struct radeon_bo *bo,
 460                                 uint32_t tiling_flags, uint32_t pitch)
 461 {
 462         int r;
 463
 464         r = radeon_bo_reserve(bo, false);
 465         if (unlikely(r != 0))
 466                 return r;
 467         bo->tiling_flags = tiling_flags;
 468         bo->pitch = pitch;
 469         radeon_bo_unreserve(bo);
 470         return 0;
 471 }
 472
 473 void radeon_bo_get_tiling_flags(struct radeon_bo *bo,
 474                                 uint32_t *tiling_flags,
 475                                 uint32_t *pitch)
 476 {
 477         BUG_ON(!atomic_read(&bo->tbo.reserved));
 478         if (tiling_flags)
 479                 *tiling_flags = bo->tiling_flags;
 480         if (pitch)
 481                 *pitch = bo->pitch;
 482 }
 483
 484 int radeon_bo_check_tiling(struct radeon_bo *bo, bool has_moved,
 485                                 bool force_drop)
 486 {
 487         BUG_ON(!atomic_read(&bo->tbo.reserved));
 488
 489         if (!(bo->tiling_flags & RADEON_TILING_SURFACE))
 490                 return 0;
 491
 492         if (force_drop) {
 493                 radeon_bo_clear_surface_reg(bo);
 494                 return 0;
 495         }
 496
 497         if (bo->tbo.mem.mem_type != TTM_PL_VRAM) {
 498                 if (!has_moved)
 499                         return 0;
 500
 501                 if (bo->surface_reg >= 0)
 502                         radeon_bo_clear_surface_reg(bo);
 503                 return 0;
 504         }
 505
 506         if ((bo->surface_reg >= 0) && !has_moved)
 507                 return 0;
 508
 509         return radeon_bo_get_surface_reg(bo);
 510 }
 511
 512 void radeon_bo_move_notify(struct ttm_buffer_object *bo,
 513                            struct ttm_mem_reg *mem)
 514 {
 515         struct radeon_bo *rbo;
 516         if (!radeon_ttm_bo_is_radeon_bo(bo))
 517                 return;
 518         rbo = container_of(bo, struct radeon_bo, tbo);
 519         radeon_bo_check_tiling(rbo, 0, 1);
 520 }
 521
 522 int radeon_bo_fault_reserve_notify(struct ttm_buffer_object *bo)
 523 {
 524         struct radeon_device *rdev;
 525         struct radeon_bo *rbo;
 526         unsigned long offset, size;
 527         int r;
 528
 529         if (!radeon_ttm_bo_is_radeon_bo(bo))
 530                 return 0;
 531         rbo = container_of(bo, struct radeon_bo, tbo);
 532         radeon_bo_check_tiling(rbo, 0, 0);
 533         rdev = rbo->rdev;
 534         if (bo->mem.mem_type == TTM_PL_VRAM) {
 535                 size = bo->mem.num_pages << PAGE_SHIFT;
 536                 offset = bo->mem.start << PAGE_SHIFT;
 537                 if ((offset + size) > rdev->mc.visible_vram_size) {
 538                         /* hurrah the memory is not visible ! */
 539                         radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_VRAM);
 540                         rbo->placement.lpfn = rdev->mc.visible_vram_size >> PAGE_SHIFT;
 541                         r = ttm_bo_validate(bo, &rbo->placement, false, true, false);
 542                         if (unlikely(r != 0))
 543                                 return r;
 544                         offset = bo->mem.start << PAGE_SHIFT;
 545                         /* this should not happen */
 546                         if ((offset + size) > rdev->mc.visible_vram_size)
 547                                 return -EINVAL;
 548                 }
 549         }
 550         return 0;
 551 }