drivers/net/cnic.c

   1 /* cnic.c: Broadcom CNIC core network driver.
   2  *
   3  * Copyright (c) 2006-2010 Broadcom Corporation
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License as published by
   7  * the Free Software Foundation.
   8  *
   9  * Original skeleton written by: John(Zongxi) Chen (zongxi@broadcom.com)
  10  * Modified and maintained by: Michael Chan <mchan@broadcom.com>
  11  */
  12
  13 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  14
  15 #include <linux/module.h>
  16
  17 #include <linux/kernel.h>
  18 #include <linux/errno.h>
  19 #include <linux/list.h>
  20 #include <linux/slab.h>
  21 #include <linux/pci.h>
  22 #include <linux/init.h>
  23 #include <linux/netdevice.h>
  24 #include <linux/uio_driver.h>
  25 #include <linux/in.h>
  26 #include <linux/dma-mapping.h>
  27 #include <linux/delay.h>
  28 #include <linux/ethtool.h>
  29 #include <linux/if_vlan.h>
  30 #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
  31 #define BCM_VLAN 1
  32 #endif
  33 #include <net/ip.h>
  34 #include <net/tcp.h>
  35 #include <net/route.h>
  36 #include <net/ipv6.h>
  37 #include <net/ip6_route.h>
  38 #include <net/ip6_checksum.h>
  39 #include <scsi/iscsi_if.h>
  40
  41 #include "cnic_if.h"
  42 #include "bnx2.h"
  43 #include "bnx2x/bnx2x_reg.h"
  44 #include "bnx2x/bnx2x_fw_defs.h"
  45 #include "bnx2x/bnx2x_hsi.h"
  46 #include "../scsi/bnx2i/57xx_iscsi_constants.h"
  47 #include "../scsi/bnx2i/57xx_iscsi_hsi.h"
  48 #include "cnic.h"
  49 #include "cnic_defs.h"
  50
  51 #define DRV_MODULE_NAME         "cnic"
  52
  53 static char version[] __devinitdata =
  54         "Broadcom NetXtreme II CNIC Driver " DRV_MODULE_NAME " v" CNIC_MODULE_VERSION " (" CNIC_MODULE_RELDATE ")\n";
  55
  56 MODULE_AUTHOR("Michael Chan <mchan@broadcom.com> and John(Zongxi) "
  57               "Chen (zongxi@broadcom.com");
  58 MODULE_DESCRIPTION("Broadcom NetXtreme II CNIC Driver");
  59 MODULE_LICENSE("GPL");
  60 MODULE_VERSION(CNIC_MODULE_VERSION);
  61
  62 static LIST_HEAD(cnic_dev_list);
  63 static LIST_HEAD(cnic_udev_list);
  64 static DEFINE_RWLOCK(cnic_dev_lock);
  65 static DEFINE_MUTEX(cnic_lock);
  66
  67 static struct cnic_ulp_ops *cnic_ulp_tbl[MAX_CNIC_ULP_TYPE];
  68
  69 static int cnic_service_bnx2(void *, void *);
  70 static int cnic_service_bnx2x(void *, void *);
  71 static int cnic_ctl(void *, struct cnic_ctl_info *);
  72
  73 static struct cnic_ops cnic_bnx2_ops = {
  74         .cnic_owner     = THIS_MODULE,
  75         .cnic_handler   = cnic_service_bnx2,
  76         .cnic_ctl       = cnic_ctl,
  77 };
  78
  79 static struct cnic_ops cnic_bnx2x_ops = {
  80         .cnic_owner     = THIS_MODULE,
  81         .cnic_handler   = cnic_service_bnx2x,
  82         .cnic_ctl       = cnic_ctl,
  83 };
  84
  85 static struct workqueue_struct *cnic_wq;
  86
  87 static void cnic_shutdown_rings(struct cnic_dev *);
  88 static void cnic_init_rings(struct cnic_dev *);
  89 static int cnic_cm_set_pg(struct cnic_sock *);
  90
  91 static int cnic_uio_open(struct uio_info *uinfo, struct inode *inode)
  92 {
  93         struct cnic_uio_dev *udev = uinfo->priv;
  94         struct cnic_dev *dev;
  95
  96         if (!capable(CAP_NET_ADMIN))
  97                 return -EPERM;
  98
  99         if (udev->uio_dev != -1)
 100                 return -EBUSY;
 101
 102         rtnl_lock();
 103         dev = udev->dev;
 104
 105         if (!dev || !test_bit(CNIC_F_CNIC_UP, &dev->flags)) {
 106                 rtnl_unlock();
 107                 return -ENODEV;
 108         }
 109
 110         udev->uio_dev = iminor(inode);
 111
 112         cnic_shutdown_rings(dev);
 113         cnic_init_rings(dev);
 114         rtnl_unlock();
 115
 116         return 0;
 117 }
 118
 119 static int cnic_uio_close(struct uio_info *uinfo, struct inode *inode)
 120 {
 121         struct cnic_uio_dev *udev = uinfo->priv;
 122
 123         udev->uio_dev = -1;
 124         return 0;
 125 }
 126
 127 static inline void cnic_hold(struct cnic_dev *dev)
 128 {
 129         atomic_inc(&dev->ref_count);
 130 }
 131
 132 static inline void cnic_put(struct cnic_dev *dev)
 133 {
 134         atomic_dec(&dev->ref_count);
 135 }
 136
 137 static inline void csk_hold(struct cnic_sock *csk)
 138 {
 139         atomic_inc(&csk->ref_count);
 140 }
 141
 142 static inline void csk_put(struct cnic_sock *csk)
 143 {
 144         atomic_dec(&csk->ref_count);
 145 }
 146
 147 static struct cnic_dev *cnic_from_netdev(struct net_device *netdev)
 148 {
 149         struct cnic_dev *cdev;
 150
 151         read_lock(&cnic_dev_lock);
 152         list_for_each_entry(cdev, &cnic_dev_list, list) {
 153                 if (netdev == cdev->netdev) {
 154                         cnic_hold(cdev);
 155                         read_unlock(&cnic_dev_lock);
 156                         return cdev;
 157                 }
 158         }
 159         read_unlock(&cnic_dev_lock);
 160         return NULL;
 161 }
 162
 163 static inline void ulp_get(struct cnic_ulp_ops *ulp_ops)
 164 {
 165         atomic_inc(&ulp_ops->ref_count);
 166 }
 167
 168 static inline void ulp_put(struct cnic_ulp_ops *ulp_ops)
 169 {
 170         atomic_dec(&ulp_ops->ref_count);
 171 }
 172
 173 static void cnic_ctx_wr(struct cnic_dev *dev, u32 cid_addr, u32 off, u32 val)
 174 {
 175         struct cnic_local *cp = dev->cnic_priv;
 176         struct cnic_eth_dev *ethdev = cp->ethdev;
 177         struct drv_ctl_info info;
 178         struct drv_ctl_io *io = &info.data.io;
 179
 180         info.cmd = DRV_CTL_CTX_WR_CMD;
 181         io->cid_addr = cid_addr;
 182         io->offset = off;
 183         io->data = val;
 184         ethdev->drv_ctl(dev->netdev, &info);
 185 }
 186
 187 static void cnic_ctx_tbl_wr(struct cnic_dev *dev, u32 off, dma_addr_t addr)
 188 {
 189         struct cnic_local *cp = dev->cnic_priv;
 190         struct cnic_eth_dev *ethdev = cp->ethdev;
 191         struct drv_ctl_info info;
 192         struct drv_ctl_io *io = &info.data.io;
 193
 194         info.cmd = DRV_CTL_CTXTBL_WR_CMD;
 195         io->offset = off;
 196         io->dma_addr = addr;
 197         ethdev->drv_ctl(dev->netdev, &info);
 198 }
 199
 200 static void cnic_ring_ctl(struct cnic_dev *dev, u32 cid, u32 cl_id, int start)
 201 {
 202         struct cnic_local *cp = dev->cnic_priv;
 203         struct cnic_eth_dev *ethdev = cp->ethdev;
 204         struct drv_ctl_info info;
 205         struct drv_ctl_l2_ring *ring = &info.data.ring;
 206
 207         if (start)
 208                 info.cmd = DRV_CTL_START_L2_CMD;
 209         else
 210                 info.cmd = DRV_CTL_STOP_L2_CMD;
 211
 212         ring->cid = cid;
 213         ring->client_id = cl_id;
 214         ethdev->drv_ctl(dev->netdev, &info);
 215 }
 216
 217 static void cnic_reg_wr_ind(struct cnic_dev *dev, u32 off, u32 val)
 218 {
 219         struct cnic_local *cp = dev->cnic_priv;
 220         struct cnic_eth_dev *ethdev = cp->ethdev;
 221         struct drv_ctl_info info;
 222         struct drv_ctl_io *io = &info.data.io;
 223
 224         info.cmd = DRV_CTL_IO_WR_CMD;
 225         io->offset = off;
 226         io->data = val;
 227         ethdev->drv_ctl(dev->netdev, &info);
 228 }
 229
 230 static u32 cnic_reg_rd_ind(struct cnic_dev *dev, u32 off)
 231 {
 232         struct cnic_local *cp = dev->cnic_priv;
 233         struct cnic_eth_dev *ethdev = cp->ethdev;
 234         struct drv_ctl_info info;
 235         struct drv_ctl_io *io = &info.data.io;
 236
 237         info.cmd = DRV_CTL_IO_RD_CMD;
 238         io->offset = off;
 239         ethdev->drv_ctl(dev->netdev, &info);
 240         return io->data;
 241 }
 242
 243 static int cnic_in_use(struct cnic_sock *csk)
 244 {
 245         return test_bit(SK_F_INUSE, &csk->flags);
 246 }
 247
 248 static void cnic_spq_completion(struct cnic_dev *dev, int cmd, u32 count)
 249 {
 250         struct cnic_local *cp = dev->cnic_priv;
 251         struct cnic_eth_dev *ethdev = cp->ethdev;
 252         struct drv_ctl_info info;
 253
 254         info.cmd = cmd;
 255         info.data.credit.credit_count = count;
 256         ethdev->drv_ctl(dev->netdev, &info);
 257 }
 258
 259 static int cnic_get_l5_cid(struct cnic_local *cp, u32 cid, u32 *l5_cid)
 260 {
 261         u32 i;
 262
 263         for (i = 0; i < cp->max_cid_space; i++) {
 264                 if (cp->ctx_tbl[i].cid == cid) {
 265                         *l5_cid = i;
 266                         return 0;
 267                 }
 268         }
 269         return -EINVAL;
 270 }
 271
 272 static int cnic_send_nlmsg(struct cnic_local *cp, u32 type,
 273                            struct cnic_sock *csk)
 274 {
 275         struct iscsi_path path_req;
 276         char *buf = NULL;
 277         u16 len = 0;
 278         u32 msg_type = ISCSI_KEVENT_IF_DOWN;
 279         struct cnic_ulp_ops *ulp_ops;
 280         struct cnic_uio_dev *udev = cp->udev;
 281
 282         if (!udev || udev->uio_dev == -1)
 283                 return -ENODEV;
 284
 285         if (csk) {
 286                 len = sizeof(path_req);
 287                 buf = (char *) &path_req;
 288                 memset(&path_req, 0, len);
 289
 290                 msg_type = ISCSI_KEVENT_PATH_REQ;
 291                 path_req.handle = (u64) csk->l5_cid;
 292                 if (test_bit(SK_F_IPV6, &csk->flags)) {
 293                         memcpy(&path_req.dst.v6_addr, &csk->dst_ip[0],
 294                                sizeof(struct in6_addr));
 295                         path_req.ip_addr_len = 16;
 296                 } else {
 297                         memcpy(&path_req.dst.v4_addr, &csk->dst_ip[0],
 298                                sizeof(struct in_addr));
 299                         path_req.ip_addr_len = 4;
 300                 }
 301                 path_req.vlan_id = csk->vlan_id;
 302                 path_req.pmtu = csk->mtu;
 303         }
 304
 305         rcu_read_lock();
 306         ulp_ops = rcu_dereference(cnic_ulp_tbl[CNIC_ULP_ISCSI]);
 307         if (ulp_ops)
 308                 ulp_ops->iscsi_nl_send_msg(cp->dev, msg_type, buf, len);
 309         rcu_read_unlock();
 310         return 0;
 311 }
 312
 313 static int cnic_iscsi_nl_msg_recv(struct cnic_dev *dev, u32 msg_type,
 314                                   char *buf, u16 len)
 315 {
 316         int rc = -EINVAL;
 317
 318         switch (msg_type) {
 319         case ISCSI_UEVENT_PATH_UPDATE: {
 320                 struct cnic_local *cp;
 321                 u32 l5_cid;
 322                 struct cnic_sock *csk;
 323                 struct iscsi_path *path_resp;
 324
 325                 if (len < sizeof(*path_resp))
 326                         break;
 327
 328                 path_resp = (struct iscsi_path *) buf;
 329                 cp = dev->cnic_priv;
 330                 l5_cid = (u32) path_resp->handle;
 331                 if (l5_cid >= MAX_CM_SK_TBL_SZ)
 332                         break;
 333
 334                 rcu_read_lock();
 335                 if (!rcu_dereference(cp->ulp_ops[CNIC_ULP_L4])) {
 336                         rc = -ENODEV;
 337                         rcu_read_unlock();
 338                         break;
 339                 }
 340                 csk = &cp->csk_tbl[l5_cid];
 341                 csk_hold(csk);
 342                 if (cnic_in_use(csk)) {
 343                         memcpy(csk->ha, path_resp->mac_addr, 6);
 344                         if (test_bit(SK_F_IPV6, &csk->flags))
 345                                 memcpy(&csk->src_ip[0], &path_resp->src.v6_addr,
 346                                        sizeof(struct in6_addr));
 347                         else
 348                                 memcpy(&csk->src_ip[0], &path_resp->src.v4_addr,
 349                                        sizeof(struct in_addr));
 350                         if (is_valid_ether_addr(csk->ha))
 351                                 cnic_cm_set_pg(csk);
 352                 }
 353                 csk_put(csk);
 354                 rcu_read_unlock();
 355                 rc = 0;
 356         }
 357         }
 358
 359         return rc;
 360 }
 361
 362 static int cnic_offld_prep(struct cnic_sock *csk)
 363 {
 364         if (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
 365                 return 0;
 366
 367         if (!test_bit(SK_F_CONNECT_START, &csk->flags)) {
 368                 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
 369                 return 0;
 370         }
 371
 372         return 1;
 373 }
 374
 375 static int cnic_close_prep(struct cnic_sock *csk)
 376 {
 377         clear_bit(SK_F_CONNECT_START, &csk->flags);
 378         smp_mb__after_clear_bit();
 379
 380         if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
 381                 while (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
 382                         msleep(1);
 383
 384                 return 1;
 385         }
 386         return 0;
 387 }
 388
 389 static int cnic_abort_prep(struct cnic_sock *csk)
 390 {
 391         clear_bit(SK_F_CONNECT_START, &csk->flags);
 392         smp_mb__after_clear_bit();
 393
 394         while (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
 395                 msleep(1);
 396
 397         if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
 398                 csk->state = L4_KCQE_OPCODE_VALUE_RESET_COMP;
 399                 return 1;
 400         }
 401
 402         return 0;
 403 }
 404
 405 static void cnic_uio_stop(void)
 406 {
 407         struct cnic_dev *dev;
 408
 409         read_lock(&cnic_dev_lock);
 410         list_for_each_entry(dev, &cnic_dev_list, list) {
 411                 struct cnic_local *cp = dev->cnic_priv;
 412
 413                 cnic_send_nlmsg(cp, ISCSI_KEVENT_IF_DOWN, NULL);
 414         }
 415         read_unlock(&cnic_dev_lock);
 416 }
 417
 418 int cnic_register_driver(int ulp_type, struct cnic_ulp_ops *ulp_ops)
 419 {
 420         struct cnic_dev *dev;
 421
 422         if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) {
 423                 pr_err("%s: Bad type %d\n", __func__, ulp_type);
 424                 return -EINVAL;
 425         }
 426         mutex_lock(&cnic_lock);
 427         if (cnic_ulp_tbl[ulp_type]) {
 428                 pr_err("%s: Type %d has already been registered\n",
 429                        __func__, ulp_type);
 430                 mutex_unlock(&cnic_lock);
 431                 return -EBUSY;
 432         }
 433
 434         read_lock(&cnic_dev_lock);
 435         list_for_each_entry(dev, &cnic_dev_list, list) {
 436                 struct cnic_local *cp = dev->cnic_priv;
 437
 438                 clear_bit(ULP_F_INIT, &cp->ulp_flags[ulp_type]);
 439         }
 440         read_unlock(&cnic_dev_lock);
 441
 442         atomic_set(&ulp_ops->ref_count, 0);
 443         rcu_assign_pointer(cnic_ulp_tbl[ulp_type], ulp_ops);
 444         mutex_unlock(&cnic_lock);
 445
 446         /* Prevent race conditions with netdev_event */
 447         rtnl_lock();
 448         read_lock(&cnic_dev_lock);
 449         list_for_each_entry(dev, &cnic_dev_list, list) {
 450                 struct cnic_local *cp = dev->cnic_priv;
 451
 452                 if (!test_and_set_bit(ULP_F_INIT, &cp->ulp_flags[ulp_type]))
 453                         ulp_ops->cnic_init(dev);
 454         }
 455         read_unlock(&cnic_dev_lock);
 456         rtnl_unlock();
 457
 458         return 0;
 459 }
 460
 461 int cnic_unregister_driver(int ulp_type)
 462 {
 463         struct cnic_dev *dev;
 464         struct cnic_ulp_ops *ulp_ops;
 465         int i = 0;
 466
 467         if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) {
 468                 pr_err("%s: Bad type %d\n", __func__, ulp_type);
 469                 return -EINVAL;
 470         }
 471         mutex_lock(&cnic_lock);
 472         ulp_ops = cnic_ulp_tbl[ulp_type];
 473         if (!ulp_ops) {
 474                 pr_err("%s: Type %d has not been registered\n",
 475                        __func__, ulp_type);
 476                 goto out_unlock;
 477         }
 478         read_lock(&cnic_dev_lock);
 479         list_for_each_entry(dev, &cnic_dev_list, list) {
 480                 struct cnic_local *cp = dev->cnic_priv;
 481
 482                 if (rcu_dereference(cp->ulp_ops[ulp_type])) {
 483                         pr_err("%s: Type %d still has devices registered\n",
 484                                __func__, ulp_type);
 485                         read_unlock(&cnic_dev_lock);
 486                         goto out_unlock;
 487                 }
 488         }
 489         read_unlock(&cnic_dev_lock);
 490
 491         if (ulp_type == CNIC_ULP_ISCSI)
 492                 cnic_uio_stop();
 493
 494         rcu_assign_pointer(cnic_ulp_tbl[ulp_type], NULL);
 495
 496         mutex_unlock(&cnic_lock);
 497         synchronize_rcu();
 498         while ((atomic_read(&ulp_ops->ref_count) != 0) && (i < 20)) {
 499                 msleep(100);
 500                 i++;
 501         }
 502
 503         if (atomic_read(&ulp_ops->ref_count) != 0)
 504                 netdev_warn(dev->netdev, "Failed waiting for ref count to go to zero\n");
 505         return 0;
 506
 507 out_unlock:
 508         mutex_unlock(&cnic_lock);
 509         return -EINVAL;
 510 }
 511
 512 static int cnic_start_hw(struct cnic_dev *);
 513 static void cnic_stop_hw(struct cnic_dev *);
 514
 515 static int cnic_register_device(struct cnic_dev *dev, int ulp_type,
 516                                 void *ulp_ctx)
 517 {
 518         struct cnic_local *cp = dev->cnic_priv;
 519         struct cnic_ulp_ops *ulp_ops;
 520
 521         if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) {
 522                 pr_err("%s: Bad type %d\n", __func__, ulp_type);
 523                 return -EINVAL;
 524         }
 525         mutex_lock(&cnic_lock);
 526         if (cnic_ulp_tbl[ulp_type] == NULL) {
 527                 pr_err("%s: Driver with type %d has not been registered\n",
 528                        __func__, ulp_type);
 529                 mutex_unlock(&cnic_lock);
 530                 return -EAGAIN;
 531         }
 532         if (rcu_dereference(cp->ulp_ops[ulp_type])) {
 533                 pr_err("%s: Type %d has already been registered to this device\n",
 534                        __func__, ulp_type);
 535                 mutex_unlock(&cnic_lock);
 536                 return -EBUSY;
 537         }
 538
 539         clear_bit(ULP_F_START, &cp->ulp_flags[ulp_type]);
 540         cp->ulp_handle[ulp_type] = ulp_ctx;
 541         ulp_ops = cnic_ulp_tbl[ulp_type];
 542         rcu_assign_pointer(cp->ulp_ops[ulp_type], ulp_ops);
 543         cnic_hold(dev);
 544
 545         if (test_bit(CNIC_F_CNIC_UP, &dev->flags))
 546                 if (!test_and_set_bit(ULP_F_START, &cp->ulp_flags[ulp_type]))
 547                         ulp_ops->cnic_start(cp->ulp_handle[ulp_type]);
 548
 549         mutex_unlock(&cnic_lock);
 550
 551         return 0;
 552
 553 }
 554 EXPORT_SYMBOL(cnic_register_driver);
 555
 556 static int cnic_unregister_device(struct cnic_dev *dev, int ulp_type)
 557 {
 558         struct cnic_local *cp = dev->cnic_priv;
 559         int i = 0;
 560
 561         if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) {
 562                 pr_err("%s: Bad type %d\n", __func__, ulp_type);
 563                 return -EINVAL;
 564         }
 565         mutex_lock(&cnic_lock);
 566         if (rcu_dereference(cp->ulp_ops[ulp_type])) {
 567                 rcu_assign_pointer(cp->ulp_ops[ulp_type], NULL);
 568                 cnic_put(dev);
 569         } else {
 570                 pr_err("%s: device not registered to this ulp type %d\n",
 571                        __func__, ulp_type);
 572                 mutex_unlock(&cnic_lock);
 573                 return -EINVAL;
 574         }
 575         mutex_unlock(&cnic_lock);
 576
 577         synchronize_rcu();
 578
 579         while (test_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[ulp_type]) &&
 580                i < 20) {
 581                 msleep(100);
 582                 i++;
 583         }
 584         if (test_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[ulp_type]))
 585                 netdev_warn(dev->netdev, "Failed waiting for ULP up call to complete\n");
 586
 587         return 0;
 588 }
 589 EXPORT_SYMBOL(cnic_unregister_driver);
 590
 591 static int cnic_init_id_tbl(struct cnic_id_tbl *id_tbl, u32 size, u32 start_id)
 592 {
 593         id_tbl->start = start_id;
 594         id_tbl->max = size;
 595         id_tbl->next = 0;
 596         spin_lock_init(&id_tbl->lock);
 597         id_tbl->table = kzalloc(DIV_ROUND_UP(size, 32) * 4, GFP_KERNEL);
 598         if (!id_tbl->table)
 599                 return -ENOMEM;
 600
 601         return 0;
 602 }
 603
 604 static void cnic_free_id_tbl(struct cnic_id_tbl *id_tbl)
 605 {
 606         kfree(id_tbl->table);
 607         id_tbl->table = NULL;
 608 }
 609
 610 static int cnic_alloc_id(struct cnic_id_tbl *id_tbl, u32 id)
 611 {
 612         int ret = -1;
 613
 614         id -= id_tbl->start;
 615         if (id >= id_tbl->max)
 616                 return ret;
 617
 618         spin_lock(&id_tbl->lock);
 619         if (!test_bit(id, id_tbl->table)) {
 620                 set_bit(id, id_tbl->table);
 621                 ret = 0;
 622         }
 623         spin_unlock(&id_tbl->lock);
 624         return ret;
 625 }
 626
 627 /* Returns -1 if not successful */
 628 static u32 cnic_alloc_new_id(struct cnic_id_tbl *id_tbl)
 629 {
 630         u32 id;
 631
 632         spin_lock(&id_tbl->lock);
 633         id = find_next_zero_bit(id_tbl->table, id_tbl->max, id_tbl->next);
 634         if (id >= id_tbl->max) {
 635                 id = -1;
 636                 if (id_tbl->next != 0) {
 637                         id = find_first_zero_bit(id_tbl->table, id_tbl->next);
 638                         if (id >= id_tbl->next)
 639                                 id = -1;
 640                 }
 641         }
 642
 643         if (id < id_tbl->max) {
 644                 set_bit(id, id_tbl->table);
 645                 id_tbl->next = (id + 1) & (id_tbl->max - 1);
 646                 id += id_tbl->start;
 647         }
 648
 649         spin_unlock(&id_tbl->lock);
 650
 651         return id;
 652 }
 653
 654 static void cnic_free_id(struct cnic_id_tbl *id_tbl, u32 id)
 655 {
 656         if (id == -1)
 657                 return;
 658
 659         id -= id_tbl->start;
 660         if (id >= id_tbl->max)
 661                 return;
 662
 663         clear_bit(id, id_tbl->table);
 664 }
 665
 666 static void cnic_free_dma(struct cnic_dev *dev, struct cnic_dma *dma)
 667 {
 668         int i;
 669
 670         if (!dma->pg_arr)
 671                 return;
 672
 673         for (i = 0; i < dma->num_pages; i++) {
 674                 if (dma->pg_arr[i]) {
 675                         dma_free_coherent(&dev->pcidev->dev, BCM_PAGE_SIZE,
 676                                           dma->pg_arr[i], dma->pg_map_arr[i]);
 677                         dma->pg_arr[i] = NULL;
 678                 }
 679         }
 680         if (dma->pgtbl) {
 681                 dma_free_coherent(&dev->pcidev->dev, dma->pgtbl_size,
 682                                   dma->pgtbl, dma->pgtbl_map);
 683                 dma->pgtbl = NULL;
 684         }
 685         kfree(dma->pg_arr);
 686         dma->pg_arr = NULL;
 687         dma->num_pages = 0;
 688 }
 689
 690 static void cnic_setup_page_tbl(struct cnic_dev *dev, struct cnic_dma *dma)
 691 {
 692         int i;
 693         u32 *page_table = dma->pgtbl;
 694
 695         for (i = 0; i < dma->num_pages; i++) {
 696                 /* Each entry needs to be in big endian format. */
 697                 *page_table = (u32) ((u64) dma->pg_map_arr[i] >> 32);
 698                 page_table++;
 699                 *page_table = (u32) dma->pg_map_arr[i];
 700                 page_table++;
 701         }
 702 }
 703
 704 static void cnic_setup_page_tbl_le(struct cnic_dev *dev, struct cnic_dma *dma)
 705 {
 706         int i;
 707         u32 *page_table = dma->pgtbl;
 708
 709         for (i = 0; i < dma->num_pages; i++) {
 710                 /* Each entry needs to be in little endian format. */
 711                 *page_table = dma->pg_map_arr[i] & 0xffffffff;
 712                 page_table++;
 713                 *page_table = (u32) ((u64) dma->pg_map_arr[i] >> 32);
 714                 page_table++;
 715         }
 716 }
 717
 718 static int cnic_alloc_dma(struct cnic_dev *dev, struct cnic_dma *dma,
 719                           int pages, int use_pg_tbl)
 720 {
 721         int i, size;
 722         struct cnic_local *cp = dev->cnic_priv;
 723
 724         size = pages * (sizeof(void *) + sizeof(dma_addr_t));
 725         dma->pg_arr = kzalloc(size, GFP_ATOMIC);
 726         if (dma->pg_arr == NULL)
 727                 return -ENOMEM;
 728
 729         dma->pg_map_arr = (dma_addr_t *) (dma->pg_arr + pages);
 730         dma->num_pages = pages;
 731
 732         for (i = 0; i < pages; i++) {
 733                 dma->pg_arr[i] = dma_alloc_coherent(&dev->pcidev->dev,
 734                                                     BCM_PAGE_SIZE,
 735                                                     &dma->pg_map_arr[i],
 736                                                     GFP_ATOMIC);
 737                 if (dma->pg_arr[i] == NULL)
 738                         goto error;
 739         }
 740         if (!use_pg_tbl)
 741                 return 0;
 742
 743         dma->pgtbl_size = ((pages * 8) + BCM_PAGE_SIZE - 1) &
 744                           ~(BCM_PAGE_SIZE - 1);
 745         dma->pgtbl = dma_alloc_coherent(&dev->pcidev->dev, dma->pgtbl_size,
 746                                         &dma->pgtbl_map, GFP_ATOMIC);
 747         if (dma->pgtbl == NULL)
 748                 goto error;
 749
 750         cp->setup_pgtbl(dev, dma);
 751
 752         return 0;
 753
 754 error:
 755         cnic_free_dma(dev, dma);
 756         return -ENOMEM;
 757 }
 758
 759 static void cnic_free_context(struct cnic_dev *dev)
 760 {
 761         struct cnic_local *cp = dev->cnic_priv;
 762         int i;
 763
 764         for (i = 0; i < cp->ctx_blks; i++) {
 765                 if (cp->ctx_arr[i].ctx) {
 766                         dma_free_coherent(&dev->pcidev->dev, cp->ctx_blk_size,
 767                                           cp->ctx_arr[i].ctx,
 768                                           cp->ctx_arr[i].mapping);
 769                         cp->ctx_arr[i].ctx = NULL;
 770                 }
 771         }
 772 }
 773
 774 static void __cnic_free_uio(struct cnic_uio_dev *udev)
 775 {
 776         uio_unregister_device(&udev->cnic_uinfo);
 777
 778         if (udev->l2_buf) {
 779                 dma_free_coherent(&udev->pdev->dev, udev->l2_buf_size,
 780                                   udev->l2_buf, udev->l2_buf_map);
 781                 udev->l2_buf = NULL;
 782         }
 783
 784         if (udev->l2_ring) {
 785                 dma_free_coherent(&udev->pdev->dev, udev->l2_ring_size,
 786                                   udev->l2_ring, udev->l2_ring_map);
 787                 udev->l2_ring = NULL;
 788         }
 789
 790         pci_dev_put(udev->pdev);
 791         kfree(udev);
 792 }
 793
 794 static void cnic_free_uio(struct cnic_uio_dev *udev)
 795 {
 796         if (!udev)
 797                 return;
 798
 799         write_lock(&cnic_dev_lock);
 800         list_del_init(&udev->list);
 801         write_unlock(&cnic_dev_lock);
 802         __cnic_free_uio(udev);
 803 }
 804
 805 static void cnic_free_resc(struct cnic_dev *dev)
 806 {
 807         struct cnic_local *cp = dev->cnic_priv;
 808         struct cnic_uio_dev *udev = cp->udev;
 809
 810         if (udev) {
 811                 udev->dev = NULL;
 812                 cp->udev = NULL;
 813         }
 814
 815         cnic_free_context(dev);
 816         kfree(cp->ctx_arr);
 817         cp->ctx_arr = NULL;
 818         cp->ctx_blks = 0;
 819
 820         cnic_free_dma(dev, &cp->gbl_buf_info);
 821         cnic_free_dma(dev, &cp->conn_buf_info);
 822         cnic_free_dma(dev, &cp->kwq_info);
 823         cnic_free_dma(dev, &cp->kwq_16_data_info);
 824         cnic_free_dma(dev, &cp->kcq1.dma);
 825         kfree(cp->iscsi_tbl);
 826         cp->iscsi_tbl = NULL;
 827         kfree(cp->ctx_tbl);
 828         cp->ctx_tbl = NULL;
 829
 830         cnic_free_id_tbl(&cp->cid_tbl);
 831 }
 832
 833 static int cnic_alloc_context(struct cnic_dev *dev)
 834 {
 835         struct cnic_local *cp = dev->cnic_priv;
 836
 837         if (CHIP_NUM(cp) == CHIP_NUM_5709) {
 838                 int i, k, arr_size;
 839
 840                 cp->ctx_blk_size = BCM_PAGE_SIZE;
 841                 cp->cids_per_blk = BCM_PAGE_SIZE / 128;
 842                 arr_size = BNX2_MAX_CID / cp->cids_per_blk *
 843                            sizeof(struct cnic_ctx);
 844                 cp->ctx_arr = kzalloc(arr_size, GFP_KERNEL);
 845                 if (cp->ctx_arr == NULL)
 846                         return -ENOMEM;
 847
 848                 k = 0;
 849                 for (i = 0; i < 2; i++) {
 850                         u32 j, reg, off, lo, hi;
 851
 852                         if (i == 0)
 853                                 off = BNX2_PG_CTX_MAP;
 854                         else
 855                                 off = BNX2_ISCSI_CTX_MAP;
 856
 857                         reg = cnic_reg_rd_ind(dev, off);
 858                         lo = reg >> 16;
 859                         hi = reg & 0xffff;
 860                         for (j = lo; j < hi; j += cp->cids_per_blk, k++)
 861                                 cp->ctx_arr[k].cid = j;
 862                 }
 863
 864                 cp->ctx_blks = k;
 865                 if (cp->ctx_blks >= (BNX2_MAX_CID / cp->cids_per_blk)) {
 866                         cp->ctx_blks = 0;
 867                         return -ENOMEM;
 868                 }
 869
 870                 for (i = 0; i < cp->ctx_blks; i++) {
 871                         cp->ctx_arr[i].ctx =
 872                                 dma_alloc_coherent(&dev->pcidev->dev,
 873                                                    BCM_PAGE_SIZE,
 874                                                    &cp->ctx_arr[i].mapping,
 875                                                    GFP_KERNEL);
 876                         if (cp->ctx_arr[i].ctx == NULL)
 877                                 return -ENOMEM;
 878                 }
 879         }
 880         return 0;
 881 }
 882
 883 static int cnic_alloc_kcq(struct cnic_dev *dev, struct kcq_info *info)
 884 {
 885         int err, i, is_bnx2 = 0;
 886         struct kcqe **kcq;
 887
 888         if (test_bit(CNIC_F_BNX2_CLASS, &dev->flags))
 889                 is_bnx2 = 1;
 890
 891         err = cnic_alloc_dma(dev, &info->dma, KCQ_PAGE_CNT, is_bnx2);
 892         if (err)
 893                 return err;
 894
 895         kcq = (struct kcqe **) info->dma.pg_arr;
 896         info->kcq = kcq;
 897
 898         if (is_bnx2)
 899                 return 0;
 900
 901         for (i = 0; i < KCQ_PAGE_CNT; i++) {
 902                 struct bnx2x_bd_chain_next *next =
 903                         (struct bnx2x_bd_chain_next *) &kcq[i][MAX_KCQE_CNT];
 904                 int j = i + 1;
 905
 906                 if (j >= KCQ_PAGE_CNT)
 907                         j = 0;
 908                 next->addr_hi = (u64) info->dma.pg_map_arr[j] >> 32;
 909                 next->addr_lo = info->dma.pg_map_arr[j] & 0xffffffff;
 910         }
 911         return 0;
 912 }
 913
 914 static int cnic_alloc_uio_rings(struct cnic_dev *dev, int pages)
 915 {
 916         struct cnic_local *cp = dev->cnic_priv;
 917         struct cnic_uio_dev *udev;
 918
 919         read_lock(&cnic_dev_lock);
 920         list_for_each_entry(udev, &cnic_udev_list, list) {
 921                 if (udev->pdev == dev->pcidev) {
 922                         udev->dev = dev;
 923                         cp->udev = udev;
 924                         read_unlock(&cnic_dev_lock);
 925                         return 0;
 926                 }
 927         }
 928         read_unlock(&cnic_dev_lock);
 929
 930         udev = kzalloc(sizeof(struct cnic_uio_dev), GFP_ATOMIC);
 931         if (!udev)
 932                 return -ENOMEM;
 933
 934         udev->uio_dev = -1;
 935
 936         udev->dev = dev;
 937         udev->pdev = dev->pcidev;
 938         udev->l2_ring_size = pages * BCM_PAGE_SIZE;
 939         udev->l2_ring = dma_alloc_coherent(&udev->pdev->dev, udev->l2_ring_size,
 940                                            &udev->l2_ring_map,
 941                                            GFP_KERNEL | __GFP_COMP);
 942         if (!udev->l2_ring)
 943                 goto err_udev;
 944
 945         udev->l2_buf_size = (cp->l2_rx_ring_size + 1) * cp->l2_single_buf_size;
 946         udev->l2_buf_size = PAGE_ALIGN(udev->l2_buf_size);
 947         udev->l2_buf = dma_alloc_coherent(&udev->pdev->dev, udev->l2_buf_size,
 948                                           &udev->l2_buf_map,
 949                                           GFP_KERNEL | __GFP_COMP);
 950         if (!udev->l2_buf)
 951                 goto err_dma;
 952
 953         write_lock(&cnic_dev_lock);
 954         list_add(&udev->list, &cnic_udev_list);
 955         write_unlock(&cnic_dev_lock);
 956
 957         pci_dev_get(udev->pdev);
 958
 959         cp->udev = udev;
 960
 961         return 0;
 962  err_dma:
 963         dma_free_coherent(&udev->pdev->dev, udev->l2_ring_size,
 964                           udev->l2_ring, udev->l2_ring_map);
 965  err_udev:
 966         kfree(udev);
 967         return -ENOMEM;
 968 }
 969
 970 static int cnic_init_uio(struct cnic_dev *dev)
 971 {
 972         struct cnic_local *cp = dev->cnic_priv;
 973         struct cnic_uio_dev *udev = cp->udev;
 974         struct uio_info *uinfo;
 975         int ret = 0;
 976
 977         if (!udev)
 978                 return -ENOMEM;
 979
 980         uinfo = &udev->cnic_uinfo;
 981
 982         uinfo->mem[0].addr = dev->netdev->base_addr;
 983         uinfo->mem[0].internal_addr = dev->regview;
 984         uinfo->mem[0].size = dev->netdev->mem_end - dev->netdev->mem_start;
 985         uinfo->mem[0].memtype = UIO_MEM_PHYS;
 986
 987         if (test_bit(CNIC_F_BNX2_CLASS, &dev->flags)) {
 988                 uinfo->mem[1].addr = (unsigned long) cp->status_blk.gen &
 989                                         PAGE_MASK;
 990                 if (cp->ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX)
 991                         uinfo->mem[1].size = BNX2_SBLK_MSIX_ALIGN_SIZE * 9;
 992                 else
 993                         uinfo->mem[1].size = BNX2_SBLK_MSIX_ALIGN_SIZE;
 994
 995                 uinfo->name = "bnx2_cnic";
 996         } else if (test_bit(CNIC_F_BNX2X_CLASS, &dev->flags)) {
 997                 uinfo->mem[1].addr = (unsigned long) cp->bnx2x_def_status_blk &
 998                         PAGE_MASK;
 999                 uinfo->mem[1].size = sizeof(*cp->bnx2x_def_status_blk);
1000
1001                 uinfo->name = "bnx2x_cnic";
1002         }
1003
1004         uinfo->mem[1].memtype = UIO_MEM_LOGICAL;
1005
1006         uinfo->mem[2].addr = (unsigned long) udev->l2_ring;
1007         uinfo->mem[2].size = udev->l2_ring_size;
1008         uinfo->mem[2].memtype = UIO_MEM_LOGICAL;
1009
1010         uinfo->mem[3].addr = (unsigned long) udev->l2_buf;
1011         uinfo->mem[3].size = udev->l2_buf_size;
1012         uinfo->mem[3].memtype = UIO_MEM_LOGICAL;
1013
1014         uinfo->version = CNIC_MODULE_VERSION;
1015         uinfo->irq = UIO_IRQ_CUSTOM;
1016
1017         uinfo->open = cnic_uio_open;
1018         uinfo->release = cnic_uio_close;
1019
1020         if (udev->uio_dev == -1) {
1021                 if (!uinfo->priv) {
1022                         uinfo->priv = udev;
1023
1024                         ret = uio_register_device(&udev->pdev->dev, uinfo);
1025                 }
1026         } else {
1027                 cnic_init_rings(dev);
1028         }
1029
1030         return ret;
1031 }
1032
1033 static int cnic_alloc_bnx2_resc(struct cnic_dev *dev)
1034 {
1035         struct cnic_local *cp = dev->cnic_priv;
1036         int ret;
1037
1038         ret = cnic_alloc_dma(dev, &cp->kwq_info, KWQ_PAGE_CNT, 1);
1039         if (ret)
1040                 goto error;
1041         cp->kwq = (struct kwqe **) cp->kwq_info.pg_arr;
1042
1043         ret = cnic_alloc_kcq(dev, &cp->kcq1);
1044         if (ret)
1045                 goto error;
1046
1047         ret = cnic_alloc_context(dev);
1048         if (ret)
1049                 goto error;
1050
1051         ret = cnic_alloc_uio_rings(dev, 2);
1052         if (ret)
1053                 goto error;
1054
1055         ret = cnic_init_uio(dev);
1056         if (ret)
1057                 goto error;
1058
1059         return 0;
1060
1061 error:
1062         cnic_free_resc(dev);
1063         return ret;
1064 }
1065
1066 static int cnic_alloc_bnx2x_context(struct cnic_dev *dev)
1067 {
1068         struct cnic_local *cp = dev->cnic_priv;
1069         int ctx_blk_size = cp->ethdev->ctx_blk_size;
1070         int total_mem, blks, i;
1071
1072         total_mem = BNX2X_CONTEXT_MEM_SIZE * cp->max_cid_space;
1073         blks = total_mem / ctx_blk_size;
1074         if (total_mem % ctx_blk_size)
1075                 blks++;
1076
1077         if (blks > cp->ethdev->ctx_tbl_len)
1078                 return -ENOMEM;
1079
1080         cp->ctx_arr = kcalloc(blks, sizeof(struct cnic_ctx), GFP_KERNEL);
1081         if (cp->ctx_arr == NULL)
1082                 return -ENOMEM;
1083
1084         cp->ctx_blks = blks;
1085         cp->ctx_blk_size = ctx_blk_size;
1086         if (!BNX2X_CHIP_IS_57710(cp->chip_id))
1087                 cp->ctx_align = 0;
1088         else
1089                 cp->ctx_align = ctx_blk_size;
1090
1091         cp->cids_per_blk = ctx_blk_size / BNX2X_CONTEXT_MEM_SIZE;
1092
1093         for (i = 0; i < blks; i++) {
1094                 cp->ctx_arr[i].ctx =
1095                         dma_alloc_coherent(&dev->pcidev->dev, cp->ctx_blk_size,
1096                                            &cp->ctx_arr[i].mapping,
1097                                            GFP_KERNEL);
1098                 if (cp->ctx_arr[i].ctx == NULL)
1099                         return -ENOMEM;
1100
1101                 if (cp->ctx_align && cp->ctx_blk_size == ctx_blk_size) {
1102                         if (cp->ctx_arr[i].mapping & (cp->ctx_align - 1)) {
1103                                 cnic_free_context(dev);
1104                                 cp->ctx_blk_size += cp->ctx_align;
1105                                 i = -1;
1106                                 continue;
1107                         }
1108                 }
1109         }
1110         return 0;
1111 }
1112
1113 static int cnic_alloc_bnx2x_resc(struct cnic_dev *dev)
1114 {
1115         struct cnic_local *cp = dev->cnic_priv;
1116         struct cnic_eth_dev *ethdev = cp->ethdev;
1117         u32 start_cid = ethdev->starting_cid;
1118         int i, j, n, ret, pages;
1119         struct cnic_dma *kwq_16_dma = &cp->kwq_16_data_info;
1120
1121         cp->iro_arr = ethdev->iro_arr;
1122
1123         cp->max_cid_space = MAX_ISCSI_TBL_SZ;
1124         cp->iscsi_start_cid = start_cid;
1125         if (start_cid < BNX2X_ISCSI_START_CID) {
1126                 u32 delta = BNX2X_ISCSI_START_CID - start_cid;
1127
1128                 cp->iscsi_start_cid = BNX2X_ISCSI_START_CID;
1129                 cp->max_cid_space += delta;
1130         }
1131
1132         cp->iscsi_tbl = kzalloc(sizeof(struct cnic_iscsi) * MAX_ISCSI_TBL_SZ,
1133                                 GFP_KERNEL);
1134         if (!cp->iscsi_tbl)
1135                 goto error;
1136
1137         cp->ctx_tbl = kzalloc(sizeof(struct cnic_context) *
1138                                 cp->max_cid_space, GFP_KERNEL);
1139         if (!cp->ctx_tbl)
1140                 goto error;
1141
1142         for (i = 0; i < MAX_ISCSI_TBL_SZ; i++) {
1143                 cp->ctx_tbl[i].proto.iscsi = &cp->iscsi_tbl[i];
1144                 cp->ctx_tbl[i].ulp_proto_id = CNIC_ULP_ISCSI;
1145         }
1146
1147         pages = PAGE_ALIGN(cp->max_cid_space * CNIC_KWQ16_DATA_SIZE) /
1148                 PAGE_SIZE;
1149
1150         ret = cnic_alloc_dma(dev, kwq_16_dma, pages, 0);
1151         if (ret)
1152                 return -ENOMEM;
1153
1154         n = PAGE_SIZE / CNIC_KWQ16_DATA_SIZE;
1155         for (i = 0, j = 0; i < cp->max_cid_space; i++) {
1156                 long off = CNIC_KWQ16_DATA_SIZE * (i % n);
1157
1158                 cp->ctx_tbl[i].kwqe_data = kwq_16_dma->pg_arr[j] + off;
1159                 cp->ctx_tbl[i].kwqe_data_mapping = kwq_16_dma->pg_map_arr[j] +
1160                                                    off;
1161
1162                 if ((i % n) == (n - 1))
1163                         j++;
1164         }
1165
1166         ret = cnic_alloc_kcq(dev, &cp->kcq1);
1167         if (ret)
1168                 goto error;
1169
1170         pages = PAGE_ALIGN(BNX2X_ISCSI_NUM_CONNECTIONS *
1171                            BNX2X_ISCSI_CONN_BUF_SIZE) / PAGE_SIZE;
1172         ret = cnic_alloc_dma(dev, &cp->conn_buf_info, pages, 1);
1173         if (ret)
1174                 goto error;
1175
1176         pages = PAGE_ALIGN(BNX2X_ISCSI_GLB_BUF_SIZE) / PAGE_SIZE;
1177         ret = cnic_alloc_dma(dev, &cp->gbl_buf_info, pages, 0);
1178         if (ret)
1179                 goto error;
1180
1181         ret = cnic_alloc_bnx2x_context(dev);
1182         if (ret)
1183                 goto error;
1184
1185         cp->bnx2x_def_status_blk = cp->ethdev->irq_arr[1].status_blk;
1186
1187         cp->l2_rx_ring_size = 15;
1188
1189         ret = cnic_alloc_uio_rings(dev, 4);
1190         if (ret)
1191                 goto error;
1192
1193         ret = cnic_init_uio(dev);
1194         if (ret)
1195                 goto error;
1196
1197         return 0;
1198
1199 error:
1200         cnic_free_resc(dev);
1201         return -ENOMEM;
1202 }
1203
1204 static inline u32 cnic_kwq_avail(struct cnic_local *cp)
1205 {
1206         return cp->max_kwq_idx -
1207                 ((cp->kwq_prod_idx - cp->kwq_con_idx) & cp->max_kwq_idx);
1208 }
1209
1210 static int cnic_submit_bnx2_kwqes(struct cnic_dev *dev, struct kwqe *wqes[],
1211                                   u32 num_wqes)
1212 {
1213         struct cnic_local *cp = dev->cnic_priv;
1214         struct kwqe *prod_qe;
1215         u16 prod, sw_prod, i;
1216
1217         if (!test_bit(CNIC_F_CNIC_UP, &dev->flags))
1218                 return -EAGAIN;         /* bnx2 is down */
1219
1220         spin_lock_bh(&cp->cnic_ulp_lock);
1221         if (num_wqes > cnic_kwq_avail(cp) &&
1222             !test_bit(CNIC_LCL_FL_KWQ_INIT, &cp->cnic_local_flags)) {
1223                 spin_unlock_bh(&cp->cnic_ulp_lock);
1224                 return -EAGAIN;
1225         }
1226
1227         clear_bit(CNIC_LCL_FL_KWQ_INIT, &cp->cnic_local_flags);
1228
1229         prod = cp->kwq_prod_idx;
1230         sw_prod = prod & MAX_KWQ_IDX;
1231         for (i = 0; i < num_wqes; i++) {
1232                 prod_qe = &cp->kwq[KWQ_PG(sw_prod)][KWQ_IDX(sw_prod)];
1233                 memcpy(prod_qe, wqes[i], sizeof(struct kwqe));
1234                 prod++;
1235                 sw_prod = prod & MAX_KWQ_IDX;
1236         }
1237         cp->kwq_prod_idx = prod;
1238
1239         CNIC_WR16(dev, cp->kwq_io_addr, cp->kwq_prod_idx);
1240
1241         spin_unlock_bh(&cp->cnic_ulp_lock);
1242         return 0;
1243 }
1244
1245 static void *cnic_get_kwqe_16_data(struct cnic_local *cp, u32 l5_cid,
1246                                    union l5cm_specific_data *l5_data)
1247 {
1248         struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1249         dma_addr_t map;
1250
1251         map = ctx->kwqe_data_mapping;
1252         l5_data->phy_address.lo = (u64) map & 0xffffffff;
1253         l5_data->phy_address.hi = (u64) map >> 32;
1254         return ctx->kwqe_data;
1255 }
1256
1257 static int cnic_submit_kwqe_16(struct cnic_dev *dev, u32 cmd, u32 cid,
1258                                 u32 type, union l5cm_specific_data *l5_data)
1259 {
1260         struct cnic_local *cp = dev->cnic_priv;
1261         struct l5cm_spe kwqe;
1262         struct kwqe_16 *kwq[1];
1263         int ret;
1264
1265         kwqe.hdr.conn_and_cmd_data =
1266                 cpu_to_le32(((cmd << SPE_HDR_CMD_ID_SHIFT) |
1267                              BNX2X_HW_CID(cp, cid)));
1268         kwqe.hdr.type = cpu_to_le16(type);
1269         kwqe.hdr.reserved1 = 0;
1270         kwqe.data.phy_address.lo = cpu_to_le32(l5_data->phy_address.lo);
1271         kwqe.data.phy_address.hi = cpu_to_le32(l5_data->phy_address.hi);
1272
1273         kwq[0] = (struct kwqe_16 *) &kwqe;
1274
1275         spin_lock_bh(&cp->cnic_ulp_lock);
1276         ret = cp->ethdev->drv_submit_kwqes_16(dev->netdev, kwq, 1);
1277         spin_unlock_bh(&cp->cnic_ulp_lock);
1278
1279         if (ret == 1)
1280                 return 0;
1281
1282         return -EBUSY;
1283 }
1284
1285 static void cnic_reply_bnx2x_kcqes(struct cnic_dev *dev, int ulp_type,
1286                                    struct kcqe *cqes[], u32 num_cqes)
1287 {
1288         struct cnic_local *cp = dev->cnic_priv;
1289         struct cnic_ulp_ops *ulp_ops;
1290
1291         rcu_read_lock();
1292         ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]);
1293         if (likely(ulp_ops)) {
1294                 ulp_ops->indicate_kcqes(cp->ulp_handle[ulp_type],
1295                                           cqes, num_cqes);
1296         }
1297         rcu_read_unlock();
1298 }
1299
1300 static int cnic_bnx2x_iscsi_init1(struct cnic_dev *dev, struct kwqe *kwqe)
1301 {
1302         struct cnic_local *cp = dev->cnic_priv;
1303         struct iscsi_kwqe_init1 *req1 = (struct iscsi_kwqe_init1 *) kwqe;
1304         int hq_bds, pages;
1305         u32 pfid = cp->pfid;
1306
1307         cp->num_iscsi_tasks = req1->num_tasks_per_conn;
1308         cp->num_ccells = req1->num_ccells_per_conn;
1309         cp->task_array_size = BNX2X_ISCSI_TASK_CONTEXT_SIZE *
1310                               cp->num_iscsi_tasks;
1311         cp->r2tq_size = cp->num_iscsi_tasks * BNX2X_ISCSI_MAX_PENDING_R2TS *
1312                         BNX2X_ISCSI_R2TQE_SIZE;
1313         cp->hq_size = cp->num_ccells * BNX2X_ISCSI_HQ_BD_SIZE;
1314         pages = PAGE_ALIGN(cp->hq_size) / PAGE_SIZE;
1315         hq_bds = pages * (PAGE_SIZE / BNX2X_ISCSI_HQ_BD_SIZE);
1316         cp->num_cqs = req1->num_cqs;
1317
1318         if (!dev->max_iscsi_conn)
1319                 return 0;
1320
1321         /* init Tstorm RAM */
1322         CNIC_WR16(dev, BAR_TSTRORM_INTMEM + TSTORM_ISCSI_RQ_SIZE_OFFSET(pfid),
1323                   req1->rq_num_wqes);
1324         CNIC_WR16(dev, BAR_TSTRORM_INTMEM + TSTORM_ISCSI_PAGE_SIZE_OFFSET(pfid),
1325                   PAGE_SIZE);
1326         CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1327                  TSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfid), PAGE_SHIFT);
1328         CNIC_WR16(dev, BAR_TSTRORM_INTMEM +
1329                   TSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfid),
1330                   req1->num_tasks_per_conn);
1331
1332         /* init Ustorm RAM */
1333         CNIC_WR16(dev, BAR_USTRORM_INTMEM +
1334                   USTORM_ISCSI_RQ_BUFFER_SIZE_OFFSET(pfid),
1335                   req1->rq_buffer_size);
1336         CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_PAGE_SIZE_OFFSET(pfid),
1337                   PAGE_SIZE);
1338         CNIC_WR8(dev, BAR_USTRORM_INTMEM +
1339                  USTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfid), PAGE_SHIFT);
1340         CNIC_WR16(dev, BAR_USTRORM_INTMEM +
1341                   USTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfid),
1342                   req1->num_tasks_per_conn);
1343         CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_RQ_SIZE_OFFSET(pfid),
1344                   req1->rq_num_wqes);
1345         CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_CQ_SIZE_OFFSET(pfid),
1346                   req1->cq_num_wqes);
1347         CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_R2TQ_SIZE_OFFSET(pfid),
1348                   cp->num_iscsi_tasks * BNX2X_ISCSI_MAX_PENDING_R2TS);
1349
1350         /* init Xstorm RAM */
1351         CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_PAGE_SIZE_OFFSET(pfid),
1352                   PAGE_SIZE);
1353         CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1354                  XSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfid), PAGE_SHIFT);
1355         CNIC_WR16(dev, BAR_XSTRORM_INTMEM +
1356                   XSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfid),
1357                   req1->num_tasks_per_conn);
1358         CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_HQ_SIZE_OFFSET(pfid),
1359                   hq_bds);
1360         CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_SQ_SIZE_OFFSET(pfid),
1361                   req1->num_tasks_per_conn);
1362         CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_R2TQ_SIZE_OFFSET(pfid),
1363                   cp->num_iscsi_tasks * BNX2X_ISCSI_MAX_PENDING_R2TS);
1364
1365         /* init Cstorm RAM */
1366         CNIC_WR16(dev, BAR_CSTRORM_INTMEM + CSTORM_ISCSI_PAGE_SIZE_OFFSET(pfid),
1367                   PAGE_SIZE);
1368         CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
1369                  CSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfid), PAGE_SHIFT);
1370         CNIC_WR16(dev, BAR_CSTRORM_INTMEM +
1371                   CSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfid),
1372                   req1->num_tasks_per_conn);
1373         CNIC_WR16(dev, BAR_CSTRORM_INTMEM + CSTORM_ISCSI_CQ_SIZE_OFFSET(pfid),
1374                   req1->cq_num_wqes);
1375         CNIC_WR16(dev, BAR_CSTRORM_INTMEM + CSTORM_ISCSI_HQ_SIZE_OFFSET(pfid),
1376                   hq_bds);
1377
1378         return 0;
1379 }
1380
1381 static int cnic_bnx2x_iscsi_init2(struct cnic_dev *dev, struct kwqe *kwqe)
1382 {
1383         struct iscsi_kwqe_init2 *req2 = (struct iscsi_kwqe_init2 *) kwqe;
1384         struct cnic_local *cp = dev->cnic_priv;
1385         u32 pfid = cp->pfid;
1386         struct iscsi_kcqe kcqe;
1387         struct kcqe *cqes[1];
1388
1389         memset(&kcqe, 0, sizeof(kcqe));
1390         if (!dev->max_iscsi_conn) {
1391                 kcqe.completion_status =
1392                         ISCSI_KCQE_COMPLETION_STATUS_ISCSI_NOT_SUPPORTED;
1393                 goto done;
1394         }
1395
1396         CNIC_WR(dev, BAR_TSTRORM_INTMEM +
1397                 TSTORM_ISCSI_ERROR_BITMAP_OFFSET(pfid), req2->error_bit_map[0]);
1398         CNIC_WR(dev, BAR_TSTRORM_INTMEM +
1399                 TSTORM_ISCSI_ERROR_BITMAP_OFFSET(pfid) + 4,
1400                 req2->error_bit_map[1]);
1401
1402         CNIC_WR16(dev, BAR_USTRORM_INTMEM +
1403                   USTORM_ISCSI_CQ_SQN_SIZE_OFFSET(pfid), req2->max_cq_sqn);
1404         CNIC_WR(dev, BAR_USTRORM_INTMEM +
1405                 USTORM_ISCSI_ERROR_BITMAP_OFFSET(pfid), req2->error_bit_map[0]);
1406         CNIC_WR(dev, BAR_USTRORM_INTMEM +
1407                 USTORM_ISCSI_ERROR_BITMAP_OFFSET(pfid) + 4,
1408                 req2->error_bit_map[1]);
1409
1410         CNIC_WR16(dev, BAR_CSTRORM_INTMEM +
1411                   CSTORM_ISCSI_CQ_SQN_SIZE_OFFSET(pfid), req2->max_cq_sqn);
1412
1413         kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_SUCCESS;
1414
1415 done:
1416         kcqe.op_code = ISCSI_KCQE_OPCODE_INIT;
1417         cqes[0] = (struct kcqe *) &kcqe;
1418         cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_ISCSI, cqes, 1);
1419
1420         return 0;
1421 }
1422
1423 static void cnic_free_bnx2x_conn_resc(struct cnic_dev *dev, u32 l5_cid)
1424 {
1425         struct cnic_local *cp = dev->cnic_priv;
1426         struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1427
1428         if (ctx->ulp_proto_id == CNIC_ULP_ISCSI) {
1429                 struct cnic_iscsi *iscsi = ctx->proto.iscsi;
1430
1431                 cnic_free_dma(dev, &iscsi->hq_info);
1432                 cnic_free_dma(dev, &iscsi->r2tq_info);
1433                 cnic_free_dma(dev, &iscsi->task_array_info);
1434         }
1435         cnic_free_id(&cp->cid_tbl, ctx->cid);
1436         ctx->cid = 0;
1437 }
1438
1439 static int cnic_alloc_bnx2x_conn_resc(struct cnic_dev *dev, u32 l5_cid)
1440 {
1441         u32 cid;
1442         int ret, pages;
1443         struct cnic_local *cp = dev->cnic_priv;
1444         struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1445         struct cnic_iscsi *iscsi = ctx->proto.iscsi;
1446
1447         cid = cnic_alloc_new_id(&cp->cid_tbl);
1448         if (cid == -1) {
1449                 ret = -ENOMEM;
1450                 goto error;
1451         }
1452
1453         ctx->cid = cid;
1454         pages = PAGE_ALIGN(cp->task_array_size) / PAGE_SIZE;
1455
1456         ret = cnic_alloc_dma(dev, &iscsi->task_array_info, pages, 1);
1457         if (ret)
1458                 goto error;
1459
1460         pages = PAGE_ALIGN(cp->r2tq_size) / PAGE_SIZE;
1461         ret = cnic_alloc_dma(dev, &iscsi->r2tq_info, pages, 1);
1462         if (ret)
1463                 goto error;
1464
1465         pages = PAGE_ALIGN(cp->hq_size) / PAGE_SIZE;
1466         ret = cnic_alloc_dma(dev, &iscsi->hq_info, pages, 1);
1467         if (ret)
1468                 goto error;
1469
1470         return 0;
1471
1472 error:
1473         cnic_free_bnx2x_conn_resc(dev, l5_cid);
1474         return ret;
1475 }
1476
1477 static void *cnic_get_bnx2x_ctx(struct cnic_dev *dev, u32 cid, int init,
1478                                 struct regpair *ctx_addr)
1479 {
1480         struct cnic_local *cp = dev->cnic_priv;
1481         struct cnic_eth_dev *ethdev = cp->ethdev;
1482         int blk = (cid - ethdev->starting_cid) / cp->cids_per_blk;
1483         int off = (cid - ethdev->starting_cid) % cp->cids_per_blk;
1484         unsigned long align_off = 0;
1485         dma_addr_t ctx_map;
1486         void *ctx;
1487
1488         if (cp->ctx_align) {
1489                 unsigned long mask = cp->ctx_align - 1;
1490
1491                 if (cp->ctx_arr[blk].mapping & mask)
1492                         align_off = cp->ctx_align -
1493                                     (cp->ctx_arr[blk].mapping & mask);
1494         }
1495         ctx_map = cp->ctx_arr[blk].mapping + align_off +
1496                 (off * BNX2X_CONTEXT_MEM_SIZE);
1497         ctx = cp->ctx_arr[blk].ctx + align_off +
1498               (off * BNX2X_CONTEXT_MEM_SIZE);
1499         if (init)
1500                 memset(ctx, 0, BNX2X_CONTEXT_MEM_SIZE);
1501
1502         ctx_addr->lo = ctx_map & 0xffffffff;
1503         ctx_addr->hi = (u64) ctx_map >> 32;
1504         return ctx;
1505 }
1506
1507 static int cnic_setup_bnx2x_ctx(struct cnic_dev *dev, struct kwqe *wqes[],
1508                                 u32 num)
1509 {
1510         struct cnic_local *cp = dev->cnic_priv;
1511         struct iscsi_kwqe_conn_offload1 *req1 =
1512                         (struct iscsi_kwqe_conn_offload1 *) wqes[0];
1513         struct iscsi_kwqe_conn_offload2 *req2 =
1514                         (struct iscsi_kwqe_conn_offload2 *) wqes[1];
1515         struct iscsi_kwqe_conn_offload3 *req3;
1516         struct cnic_context *ctx = &cp->ctx_tbl[req1->iscsi_conn_id];
1517         struct cnic_iscsi *iscsi = ctx->proto.iscsi;
1518         u32 cid = ctx->cid;
1519         u32 hw_cid = BNX2X_HW_CID(cp, cid);
1520         struct iscsi_context *ictx;
1521         struct regpair context_addr;
1522         int i, j, n = 2, n_max;
1523
1524         ctx->ctx_flags = 0;
1525         if (!req2->num_additional_wqes)
1526                 return -EINVAL;
1527
1528         n_max = req2->num_additional_wqes + 2;
1529
1530         ictx = cnic_get_bnx2x_ctx(dev, cid, 1, &context_addr);
1531         if (ictx == NULL)
1532                 return -ENOMEM;
1533
1534         req3 = (struct iscsi_kwqe_conn_offload3 *) wqes[n++];
1535
1536         ictx->xstorm_ag_context.hq_prod = 1;
1537
1538         ictx->xstorm_st_context.iscsi.first_burst_length =
1539                 ISCSI_DEF_FIRST_BURST_LEN;
1540         ictx->xstorm_st_context.iscsi.max_send_pdu_length =
1541                 ISCSI_DEF_MAX_RECV_SEG_LEN;
1542         ictx->xstorm_st_context.iscsi.sq_pbl_base.lo =
1543                 req1->sq_page_table_addr_lo;
1544         ictx->xstorm_st_context.iscsi.sq_pbl_base.hi =
1545                 req1->sq_page_table_addr_hi;
1546         ictx->xstorm_st_context.iscsi.sq_curr_pbe.lo = req2->sq_first_pte.hi;
1547         ictx->xstorm_st_context.iscsi.sq_curr_pbe.hi = req2->sq_first_pte.lo;
1548         ictx->xstorm_st_context.iscsi.hq_pbl_base.lo =
1549                 iscsi->hq_info.pgtbl_map & 0xffffffff;
1550         ictx->xstorm_st_context.iscsi.hq_pbl_base.hi =
1551                 (u64) iscsi->hq_info.pgtbl_map >> 32;
1552         ictx->xstorm_st_context.iscsi.hq_curr_pbe_base.lo =
1553                 iscsi->hq_info.pgtbl[0];
1554         ictx->xstorm_st_context.iscsi.hq_curr_pbe_base.hi =
1555                 iscsi->hq_info.pgtbl[1];
1556         ictx->xstorm_st_context.iscsi.r2tq_pbl_base.lo =
1557                 iscsi->r2tq_info.pgtbl_map & 0xffffffff;
1558         ictx->xstorm_st_context.iscsi.r2tq_pbl_base.hi =
1559                 (u64) iscsi->r2tq_info.pgtbl_map >> 32;
1560         ictx->xstorm_st_context.iscsi.r2tq_curr_pbe_base.lo =
1561                 iscsi->r2tq_info.pgtbl[0];
1562         ictx->xstorm_st_context.iscsi.r2tq_curr_pbe_base.hi =
1563                 iscsi->r2tq_info.pgtbl[1];
1564         ictx->xstorm_st_context.iscsi.task_pbl_base.lo =
1565                 iscsi->task_array_info.pgtbl_map & 0xffffffff;
1566         ictx->xstorm_st_context.iscsi.task_pbl_base.hi =
1567                 (u64) iscsi->task_array_info.pgtbl_map >> 32;
1568         ictx->xstorm_st_context.iscsi.task_pbl_cache_idx =
1569                 BNX2X_ISCSI_PBL_NOT_CACHED;
1570         ictx->xstorm_st_context.iscsi.flags.flags |=
1571                 XSTORM_ISCSI_CONTEXT_FLAGS_B_IMMEDIATE_DATA;
1572         ictx->xstorm_st_context.iscsi.flags.flags |=
1573                 XSTORM_ISCSI_CONTEXT_FLAGS_B_INITIAL_R2T;
1574
1575         ictx->tstorm_st_context.iscsi.hdr_bytes_2_fetch = ISCSI_HEADER_SIZE;
1576         /* TSTORM requires the base address of RQ DB & not PTE */
1577         ictx->tstorm_st_context.iscsi.rq_db_phy_addr.lo =
1578                 req2->rq_page_table_addr_lo & PAGE_MASK;
1579         ictx->tstorm_st_context.iscsi.rq_db_phy_addr.hi =
1580                 req2->rq_page_table_addr_hi;
1581         ictx->tstorm_st_context.iscsi.iscsi_conn_id = req1->iscsi_conn_id;
1582         ictx->tstorm_st_context.tcp.cwnd = 0x5A8;
1583         ictx->tstorm_st_context.tcp.flags2 |=
1584                 TSTORM_TCP_ST_CONTEXT_SECTION_DA_EN;
1585         ictx->tstorm_st_context.tcp.ooo_support_mode =
1586                 TCP_TSTORM_OOO_DROP_AND_PROC_ACK;
1587
1588         ictx->timers_context.flags |= TIMERS_BLOCK_CONTEXT_CONN_VALID_FLG;
1589
1590         ictx->ustorm_st_context.ring.rq.pbl_base.lo =
1591                 req2->rq_page_table_addr_lo;
1592         ictx->ustorm_st_context.ring.rq.pbl_base.hi =
1593                 req2->rq_page_table_addr_hi;
1594         ictx->ustorm_st_context.ring.rq.curr_pbe.lo = req3->qp_first_pte[0].hi;
1595         ictx->ustorm_st_context.ring.rq.curr_pbe.hi = req3->qp_first_pte[0].lo;
1596         ictx->ustorm_st_context.ring.r2tq.pbl_base.lo =
1597                 iscsi->r2tq_info.pgtbl_map & 0xffffffff;
1598         ictx->ustorm_st_context.ring.r2tq.pbl_base.hi =
1599                 (u64) iscsi->r2tq_info.pgtbl_map >> 32;
1600         ictx->ustorm_st_context.ring.r2tq.curr_pbe.lo =
1601                 iscsi->r2tq_info.pgtbl[0];
1602         ictx->ustorm_st_context.ring.r2tq.curr_pbe.hi =
1603                 iscsi->r2tq_info.pgtbl[1];
1604         ictx->ustorm_st_context.ring.cq_pbl_base.lo =
1605                 req1->cq_page_table_addr_lo;
1606         ictx->ustorm_st_context.ring.cq_pbl_base.hi =
1607                 req1->cq_page_table_addr_hi;
1608         ictx->ustorm_st_context.ring.cq[0].cq_sn = ISCSI_INITIAL_SN;
1609         ictx->ustorm_st_context.ring.cq[0].curr_pbe.lo = req2->cq_first_pte.hi;
1610         ictx->ustorm_st_context.ring.cq[0].curr_pbe.hi = req2->cq_first_pte.lo;
1611         ictx->ustorm_st_context.task_pbe_cache_index =
1612                 BNX2X_ISCSI_PBL_NOT_CACHED;
1613         ictx->ustorm_st_context.task_pdu_cache_index =
1614                 BNX2X_ISCSI_PDU_HEADER_NOT_CACHED;
1615
1616         for (i = 1, j = 1; i < cp->num_cqs; i++, j++) {
1617                 if (j == 3) {
1618                         if (n >= n_max)
1619                                 break;
1620                         req3 = (struct iscsi_kwqe_conn_offload3 *) wqes[n++];
1621                         j = 0;
1622                 }
1623                 ictx->ustorm_st_context.ring.cq[i].cq_sn = ISCSI_INITIAL_SN;
1624                 ictx->ustorm_st_context.ring.cq[i].curr_pbe.lo =
1625                         req3->qp_first_pte[j].hi;
1626                 ictx->ustorm_st_context.ring.cq[i].curr_pbe.hi =
1627                         req3->qp_first_pte[j].lo;
1628         }
1629
1630         ictx->ustorm_st_context.task_pbl_base.lo =
1631                 iscsi->task_array_info.pgtbl_map & 0xffffffff;
1632         ictx->ustorm_st_context.task_pbl_base.hi =
1633                 (u64) iscsi->task_array_info.pgtbl_map >> 32;
1634         ictx->ustorm_st_context.tce_phy_addr.lo =
1635                 iscsi->task_array_info.pgtbl[0];
1636         ictx->ustorm_st_context.tce_phy_addr.hi =
1637                 iscsi->task_array_info.pgtbl[1];
1638         ictx->ustorm_st_context.iscsi_conn_id = req1->iscsi_conn_id;
1639         ictx->ustorm_st_context.num_cqs = cp->num_cqs;
1640         ictx->ustorm_st_context.negotiated_rx |= ISCSI_DEF_MAX_RECV_SEG_LEN;
1641         ictx->ustorm_st_context.negotiated_rx_and_flags |=
1642                 ISCSI_DEF_MAX_BURST_LEN;
1643         ictx->ustorm_st_context.negotiated_rx |=
1644                 ISCSI_DEFAULT_MAX_OUTSTANDING_R2T <<
1645                 USTORM_ISCSI_ST_CONTEXT_MAX_OUTSTANDING_R2TS_SHIFT;
1646
1647         ictx->cstorm_st_context.hq_pbl_base.lo =
1648                 iscsi->hq_info.pgtbl_map & 0xffffffff;
1649         ictx->cstorm_st_context.hq_pbl_base.hi =
1650                 (u64) iscsi->hq_info.pgtbl_map >> 32;
1651         ictx->cstorm_st_context.hq_curr_pbe.lo = iscsi->hq_info.pgtbl[0];
1652         ictx->cstorm_st_context.hq_curr_pbe.hi = iscsi->hq_info.pgtbl[1];
1653         ictx->cstorm_st_context.task_pbl_base.lo =
1654                 iscsi->task_array_info.pgtbl_map & 0xffffffff;
1655         ictx->cstorm_st_context.task_pbl_base.hi =
1656                 (u64) iscsi->task_array_info.pgtbl_map >> 32;
1657         /* CSTORM and USTORM initialization is different, CSTORM requires
1658          * CQ DB base & not PTE addr */
1659         ictx->cstorm_st_context.cq_db_base.lo =
1660                 req1->cq_page_table_addr_lo & PAGE_MASK;
1661         ictx->cstorm_st_context.cq_db_base.hi = req1->cq_page_table_addr_hi;
1662         ictx->cstorm_st_context.iscsi_conn_id = req1->iscsi_conn_id;
1663         ictx->cstorm_st_context.cq_proc_en_bit_map = (1 << cp->num_cqs) - 1;
1664         for (i = 0; i < cp->num_cqs; i++) {
1665                 ictx->cstorm_st_context.cq_c_prod_sqn_arr.sqn[i] =
1666                         ISCSI_INITIAL_SN;
1667                 ictx->cstorm_st_context.cq_c_sqn_2_notify_arr.sqn[i] =
1668                         ISCSI_INITIAL_SN;
1669         }
1670
1671         ictx->xstorm_ag_context.cdu_reserved =
1672                 CDU_RSRVD_VALUE_TYPE_A(hw_cid, CDU_REGION_NUMBER_XCM_AG,
1673                                        ISCSI_CONNECTION_TYPE);
1674         ictx->ustorm_ag_context.cdu_usage =
1675                 CDU_RSRVD_VALUE_TYPE_A(hw_cid, CDU_REGION_NUMBER_UCM_AG,
1676                                        ISCSI_CONNECTION_TYPE);
1677         return 0;
1678
1679 }
1680
1681 static int cnic_bnx2x_iscsi_ofld1(struct cnic_dev *dev, struct kwqe *wqes[],
1682                                    u32 num, int *work)
1683 {
1684         struct iscsi_kwqe_conn_offload1 *req1;
1685         struct iscsi_kwqe_conn_offload2 *req2;
1686         struct cnic_local *cp = dev->cnic_priv;
1687         struct cnic_context *ctx;
1688         struct iscsi_kcqe kcqe;
1689         struct kcqe *cqes[1];
1690         u32 l5_cid;
1691         int ret = 0;
1692
1693         if (num < 2) {
1694                 *work = num;
1695                 return -EINVAL;
1696         }
1697
1698         req1 = (struct iscsi_kwqe_conn_offload1 *) wqes[0];
1699         req2 = (struct iscsi_kwqe_conn_offload2 *) wqes[1];
1700         if ((num - 2) < req2->num_additional_wqes) {
1701                 *work = num;
1702                 return -EINVAL;
1703         }
1704         *work = 2 + req2->num_additional_wqes;;
1705
1706         l5_cid = req1->iscsi_conn_id;
1707         if (l5_cid >= MAX_ISCSI_TBL_SZ)
1708                 return -EINVAL;
1709
1710         memset(&kcqe, 0, sizeof(kcqe));
1711         kcqe.op_code = ISCSI_KCQE_OPCODE_OFFLOAD_CONN;
1712         kcqe.iscsi_conn_id = l5_cid;
1713         kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_CTX_ALLOC_FAILURE;
1714
1715         ctx = &cp->ctx_tbl[l5_cid];
1716         if (test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags)) {
1717                 kcqe.completion_status =
1718                         ISCSI_KCQE_COMPLETION_STATUS_CID_BUSY;
1719                 goto done;
1720         }
1721
1722         if (atomic_inc_return(&cp->iscsi_conn) > dev->max_iscsi_conn) {
1723                 atomic_dec(&cp->iscsi_conn);
1724                 goto done;
1725         }
1726         ret = cnic_alloc_bnx2x_conn_resc(dev, l5_cid);
1727         if (ret) {
1728                 atomic_dec(&cp->iscsi_conn);
1729                 ret = 0;
1730                 goto done;
1731         }
1732         ret = cnic_setup_bnx2x_ctx(dev, wqes, num);
1733         if (ret < 0) {
1734                 cnic_free_bnx2x_conn_resc(dev, l5_cid);
1735                 atomic_dec(&cp->iscsi_conn);
1736                 goto done;
1737         }
1738
1739         kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_SUCCESS;
1740         kcqe.iscsi_conn_context_id = BNX2X_HW_CID(cp, cp->ctx_tbl[l5_cid].cid);
1741
1742 done:
1743         cqes[0] = (struct kcqe *) &kcqe;
1744         cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_ISCSI, cqes, 1);
1745         return ret;
1746 }
1747
1748
1749 static int cnic_bnx2x_iscsi_update(struct cnic_dev *dev, struct kwqe *kwqe)
1750 {
1751         struct cnic_local *cp = dev->cnic_priv;
1752         struct iscsi_kwqe_conn_update *req =
1753                 (struct iscsi_kwqe_conn_update *) kwqe;
1754         void *data;
1755         union l5cm_specific_data l5_data;
1756         u32 l5_cid, cid = BNX2X_SW_CID(req->context_id);
1757         int ret;
1758
1759         if (cnic_get_l5_cid(cp, cid, &l5_cid) != 0)
1760                 return -EINVAL;
1761
1762         data = cnic_get_kwqe_16_data(cp, l5_cid, &l5_data);
1763         if (!data)
1764                 return -ENOMEM;
1765
1766         memcpy(data, kwqe, sizeof(struct kwqe));
1767
1768         ret = cnic_submit_kwqe_16(dev, ISCSI_RAMROD_CMD_ID_UPDATE_CONN,
1769                         req->context_id, ISCSI_CONNECTION_TYPE, &l5_data);
1770         return ret;
1771 }
1772
1773 static int cnic_bnx2x_destroy_ramrod(struct cnic_dev *dev, u32 l5_cid)
1774 {
1775         struct cnic_local *cp = dev->cnic_priv;
1776         struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1777         union l5cm_specific_data l5_data;
1778         int ret;
1779         u32 hw_cid, type;
1780
1781         init_waitqueue_head(&ctx->waitq);
1782         ctx->wait_cond = 0;
1783         memset(&l5_data, 0, sizeof(l5_data));
1784         hw_cid = BNX2X_HW_CID(cp, ctx->cid);
1785         type = (NONE_CONNECTION_TYPE << SPE_HDR_CONN_TYPE_SHIFT)
1786                 & SPE_HDR_CONN_TYPE;
1787         type |= ((cp->pfid << SPE_HDR_FUNCTION_ID_SHIFT) &
1788                  SPE_HDR_FUNCTION_ID);
1789
1790         ret = cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_COMMON_CFC_DEL,
1791                                   hw_cid, type, &l5_data);
1792
1793         if (ret == 0)
1794                 wait_event(ctx->waitq, ctx->wait_cond);
1795
1796         return ret;
1797 }
1798
1799 static int cnic_bnx2x_iscsi_destroy(struct cnic_dev *dev, struct kwqe *kwqe)
1800 {
1801         struct cnic_local *cp = dev->cnic_priv;
1802         struct iscsi_kwqe_conn_destroy *req =
1803                 (struct iscsi_kwqe_conn_destroy *) kwqe;
1804         u32 l5_cid = req->reserved0;
1805         struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1806         int ret = 0;
1807         struct iscsi_kcqe kcqe;
1808         struct kcqe *cqes[1];
1809
1810         if (!test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags))
1811                 goto skip_cfc_delete;
1812
1813         if (!time_after(jiffies, ctx->timestamp + (2 * HZ))) {
1814                 unsigned long delta = ctx->timestamp + (2 * HZ) - jiffies;
1815
1816                 if (delta > (2 * HZ))
1817                         delta = 0;
1818
1819                 set_bit(CTX_FL_DELETE_WAIT, &ctx->ctx_flags);
1820                 queue_delayed_work(cnic_wq, &cp->delete_task, delta);
1821                 goto destroy_reply;
1822         }
1823
1824         ret = cnic_bnx2x_destroy_ramrod(dev, l5_cid);
1825
1826 skip_cfc_delete:
1827         cnic_free_bnx2x_conn_resc(dev, l5_cid);
1828
1829         atomic_dec(&cp->iscsi_conn);
1830         clear_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags);
1831
1832 destroy_reply:
1833         memset(&kcqe, 0, sizeof(kcqe));
1834         kcqe.op_code = ISCSI_KCQE_OPCODE_DESTROY_CONN;
1835         kcqe.iscsi_conn_id = l5_cid;
1836         kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_SUCCESS;
1837         kcqe.iscsi_conn_context_id = req->context_id;
1838
1839         cqes[0] = (struct kcqe *) &kcqe;
1840         cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_ISCSI, cqes, 1);
1841
1842         return ret;
1843 }
1844
1845 static void cnic_init_storm_conn_bufs(struct cnic_dev *dev,
1846                                       struct l4_kwq_connect_req1 *kwqe1,
1847                                       struct l4_kwq_connect_req3 *kwqe3,
1848                                       struct l5cm_active_conn_buffer *conn_buf)
1849 {
1850         struct l5cm_conn_addr_params *conn_addr = &conn_buf->conn_addr_buf;
1851         struct l5cm_xstorm_conn_buffer *xstorm_buf =
1852                 &conn_buf->xstorm_conn_buffer;
1853         struct l5cm_tstorm_conn_buffer *tstorm_buf =
1854                 &conn_buf->tstorm_conn_buffer;
1855         struct regpair context_addr;
1856         u32 cid = BNX2X_SW_CID(kwqe1->cid);
1857         struct in6_addr src_ip, dst_ip;
1858         int i;
1859         u32 *addrp;
1860
1861         addrp = (u32 *) &conn_addr->local_ip_addr;
1862         for (i = 0; i < 4; i++, addrp++)
1863                 src_ip.in6_u.u6_addr32[i] = cpu_to_be32(*addrp);
1864
1865         addrp = (u32 *) &conn_addr->remote_ip_addr;
1866         for (i = 0; i < 4; i++, addrp++)
1867                 dst_ip.in6_u.u6_addr32[i] = cpu_to_be32(*addrp);
1868
1869         cnic_get_bnx2x_ctx(dev, cid, 0, &context_addr);
1870
1871         xstorm_buf->context_addr.hi = context_addr.hi;
1872         xstorm_buf->context_addr.lo = context_addr.lo;
1873         xstorm_buf->mss = 0xffff;
1874         xstorm_buf->rcv_buf = kwqe3->rcv_buf;
1875         if (kwqe1->tcp_flags & L4_KWQ_CONNECT_REQ1_NAGLE_ENABLE)
1876                 xstorm_buf->params |= L5CM_XSTORM_CONN_BUFFER_NAGLE_ENABLE;
1877         xstorm_buf->pseudo_header_checksum =
1878                 swab16(~csum_ipv6_magic(&src_ip, &dst_ip, 0, IPPROTO_TCP, 0));
1879
1880         if (!(kwqe1->tcp_flags & L4_KWQ_CONNECT_REQ1_NO_DELAY_ACK))
1881                 tstorm_buf->params |=
1882                         L5CM_TSTORM_CONN_BUFFER_DELAYED_ACK_ENABLE;
1883         if (kwqe3->ka_timeout) {
1884                 tstorm_buf->ka_enable = 1;
1885                 tstorm_buf->ka_timeout = kwqe3->ka_timeout;
1886                 tstorm_buf->ka_interval = kwqe3->ka_interval;
1887                 tstorm_buf->ka_max_probe_count = kwqe3->ka_max_probe_count;
1888         }
1889         tstorm_buf->rcv_buf = kwqe3->rcv_buf;
1890         tstorm_buf->snd_buf = kwqe3->snd_buf;
1891         tstorm_buf->max_rt_time = 0xffffffff;
1892 }
1893
1894 static void cnic_init_bnx2x_mac(struct cnic_dev *dev)
1895 {
1896         struct cnic_local *cp = dev->cnic_priv;
1897         u32 pfid = cp->pfid;
1898         u8 *mac = dev->mac_addr;
1899
1900         CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1901                  XSTORM_ISCSI_LOCAL_MAC_ADDR0_OFFSET(pfid), mac[0]);
1902         CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1903                  XSTORM_ISCSI_LOCAL_MAC_ADDR1_OFFSET(pfid), mac[1]);
1904         CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1905                  XSTORM_ISCSI_LOCAL_MAC_ADDR2_OFFSET(pfid), mac[2]);
1906         CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1907                  XSTORM_ISCSI_LOCAL_MAC_ADDR3_OFFSET(pfid), mac[3]);
1908         CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1909                  XSTORM_ISCSI_LOCAL_MAC_ADDR4_OFFSET(pfid), mac[4]);
1910         CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1911                  XSTORM_ISCSI_LOCAL_MAC_ADDR5_OFFSET(pfid), mac[5]);
1912
1913         CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1914                  TSTORM_ISCSI_TCP_VARS_LSB_LOCAL_MAC_ADDR_OFFSET(pfid), mac[5]);
1915         CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1916                  TSTORM_ISCSI_TCP_VARS_LSB_LOCAL_MAC_ADDR_OFFSET(pfid) + 1,
1917                  mac[4]);
1918         CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1919                  TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(pfid), mac[3]);
1920         CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1921                  TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(pfid) + 1,
1922                  mac[2]);
1923         CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1924                  TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(pfid) + 2,
1925                  mac[1]);
1926         CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1927                  TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(pfid) + 3,
1928                  mac[0]);
1929 }
1930
1931 static void cnic_bnx2x_set_tcp_timestamp(struct cnic_dev *dev, int tcp_ts)
1932 {
1933         struct cnic_local *cp = dev->cnic_priv;
1934         u8 xstorm_flags = XSTORM_L5CM_TCP_FLAGS_WND_SCL_EN;
1935         u16 tstorm_flags = 0;
1936
1937         if (tcp_ts) {
1938                 xstorm_flags |= XSTORM_L5CM_TCP_FLAGS_TS_ENABLED;
1939                 tstorm_flags |= TSTORM_L5CM_TCP_FLAGS_TS_ENABLED;
1940         }
1941
1942         CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1943                  XSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(cp->pfid), xstorm_flags);
1944
1945         CNIC_WR16(dev, BAR_TSTRORM_INTMEM +
1946                   TSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(cp->pfid), tstorm_flags);
1947 }
1948
1949 static int cnic_bnx2x_connect(struct cnic_dev *dev, struct kwqe *wqes[],
1950                               u32 num, int *work)
1951 {
1952         struct cnic_local *cp = dev->cnic_priv;
1953         struct l4_kwq_connect_req1 *kwqe1 =
1954                 (struct l4_kwq_connect_req1 *) wqes[0];
1955         struct l4_kwq_connect_req3 *kwqe3;
1956         struct l5cm_active_conn_buffer *conn_buf;
1957         struct l5cm_conn_addr_params *conn_addr;
1958         union l5cm_specific_data l5_data;
1959         u32 l5_cid = kwqe1->pg_cid;
1960         struct cnic_sock *csk = &cp->csk_tbl[l5_cid];
1961         struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1962         int ret;
1963
1964         if (num < 2) {
1965                 *work = num;
1966                 return -EINVAL;
1967         }
1968
1969         if (kwqe1->conn_flags & L4_KWQ_CONNECT_REQ1_IP_V6)
1970                 *work = 3;
1971         else
1972                 *work = 2;
1973
1974         if (num < *work) {
1975                 *work = num;
1976                 return -EINVAL;
1977         }
1978
1979         if (sizeof(*conn_buf) > CNIC_KWQ16_DATA_SIZE) {
1980                 netdev_err(dev->netdev, "conn_buf size too big\n");
1981                 return -ENOMEM;
1982         }
1983         conn_buf = cnic_get_kwqe_16_data(cp, l5_cid, &l5_data);
1984         if (!conn_buf)
1985                 return -ENOMEM;
1986
1987         memset(conn_buf, 0, sizeof(*conn_buf));
1988
1989         conn_addr = &conn_buf->conn_addr_buf;
1990         conn_addr->remote_addr_0 = csk->ha[0];
1991         conn_addr->remote_addr_1 = csk->ha[1];
1992         conn_addr->remote_addr_2 = csk->ha[2];
1993         conn_addr->remote_addr_3 = csk->ha[3];
1994         conn_addr->remote_addr_4 = csk->ha[4];
1995         conn_addr->remote_addr_5 = csk->ha[5];
1996
1997         if (kwqe1->conn_flags & L4_KWQ_CONNECT_REQ1_IP_V6) {
1998                 struct l4_kwq_connect_req2 *kwqe2 =
1999                         (struct l4_kwq_connect_req2 *) wqes[1];
2000
2001                 conn_addr->local_ip_addr.ip_addr_hi_hi = kwqe2->src_ip_v6_4;
2002                 conn_addr->local_ip_addr.ip_addr_hi_lo = kwqe2->src_ip_v6_3;
2003                 conn_addr->local_ip_addr.ip_addr_lo_hi = kwqe2->src_ip_v6_2;
2004
2005                 conn_addr->remote_ip_addr.ip_addr_hi_hi = kwqe2->dst_ip_v6_4;
2006                 conn_addr->remote_ip_addr.ip_addr_hi_lo = kwqe2->dst_ip_v6_3;
2007                 conn_addr->remote_ip_addr.ip_addr_lo_hi = kwqe2->dst_ip_v6_2;
2008                 conn_addr->params |= L5CM_CONN_ADDR_PARAMS_IP_VERSION;
2009         }
2010         kwqe3 = (struct l4_kwq_connect_req3 *) wqes[*work - 1];
2011
2012         conn_addr->local_ip_addr.ip_addr_lo_lo = kwqe1->src_ip;
2013         conn_addr->remote_ip_addr.ip_addr_lo_lo = kwqe1->dst_ip;
2014         conn_addr->local_tcp_port = kwqe1->src_port;
2015         conn_addr->remote_tcp_port = kwqe1->dst_port;
2016
2017         conn_addr->pmtu = kwqe3->pmtu;
2018         cnic_init_storm_conn_bufs(dev, kwqe1, kwqe3, conn_buf);
2019
2020         CNIC_WR16(dev, BAR_XSTRORM_INTMEM +
2021                   XSTORM_ISCSI_LOCAL_VLAN_OFFSET(cp->pfid), csk->vlan_id);
2022
2023         cnic_bnx2x_set_tcp_timestamp(dev,
2024                 kwqe1->tcp_flags & L4_KWQ_CONNECT_REQ1_TIME_STAMP);
2025
2026         ret = cnic_submit_kwqe_16(dev, L5CM_RAMROD_CMD_ID_TCP_CONNECT,
2027                         kwqe1->cid, ISCSI_CONNECTION_TYPE, &l5_data);
2028         if (!ret)
2029                 set_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags);
2030
2031         return ret;
2032 }
2033
2034 static int cnic_bnx2x_close(struct cnic_dev *dev, struct kwqe *kwqe)
2035 {
2036         struct l4_kwq_close_req *req = (struct l4_kwq_close_req *) kwqe;
2037         union l5cm_specific_data l5_data;
2038         int ret;
2039
2040         memset(&l5_data, 0, sizeof(l5_data));
2041         ret = cnic_submit_kwqe_16(dev, L5CM_RAMROD_CMD_ID_CLOSE,
2042                         req->cid, ISCSI_CONNECTION_TYPE, &l5_data);
2043         return ret;
2044 }
2045
2046 static int cnic_bnx2x_reset(struct cnic_dev *dev, struct kwqe *kwqe)
2047 {
2048         struct l4_kwq_reset_req *req = (struct l4_kwq_reset_req *) kwqe;
2049         union l5cm_specific_data l5_data;
2050         int ret;
2051
2052         memset(&l5_data, 0, sizeof(l5_data));
2053         ret = cnic_submit_kwqe_16(dev, L5CM_RAMROD_CMD_ID_ABORT,
2054                         req->cid, ISCSI_CONNECTION_TYPE, &l5_data);
2055         return ret;
2056 }
2057 static int cnic_bnx2x_offload_pg(struct cnic_dev *dev, struct kwqe *kwqe)
2058 {
2059         struct l4_kwq_offload_pg *req = (struct l4_kwq_offload_pg *) kwqe;
2060         struct l4_kcq kcqe;
2061         struct kcqe *cqes[1];
2062
2063         memset(&kcqe, 0, sizeof(kcqe));
2064         kcqe.pg_host_opaque = req->host_opaque;
2065         kcqe.pg_cid = req->host_opaque;
2066         kcqe.op_code = L4_KCQE_OPCODE_VALUE_OFFLOAD_PG;
2067         cqes[0] = (struct kcqe *) &kcqe;
2068         cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_L4, cqes, 1);
2069         return 0;
2070 }
2071
2072 static int cnic_bnx2x_update_pg(struct cnic_dev *dev, struct kwqe *kwqe)
2073 {
2074         struct l4_kwq_update_pg *req = (struct l4_kwq_update_pg *) kwqe;
2075         struct l4_kcq kcqe;
2076         struct kcqe *cqes[1];
2077
2078         memset(&kcqe, 0, sizeof(kcqe));
2079         kcqe.pg_host_opaque = req->pg_host_opaque;
2080         kcqe.pg_cid = req->pg_cid;
2081         kcqe.op_code = L4_KCQE_OPCODE_VALUE_UPDATE_PG;
2082         cqes[0] = (struct kcqe *) &kcqe;
2083         cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_L4, cqes, 1);
2084         return 0;
2085 }
2086
2087 static int cnic_submit_bnx2x_kwqes(struct cnic_dev *dev, struct kwqe *wqes[],
2088                                    u32 num_wqes)
2089 {
2090         int i, work, ret;
2091         u32 opcode;
2092         struct kwqe *kwqe;
2093
2094         if (!test_bit(CNIC_F_CNIC_UP, &dev->flags))
2095                 return -EAGAIN;         /* bnx2 is down */
2096
2097         for (i = 0; i < num_wqes; ) {
2098                 kwqe = wqes[i];
2099                 opcode = KWQE_OPCODE(kwqe->kwqe_op_flag);
2100                 work = 1;
2101
2102                 switch (opcode) {
2103                 case ISCSI_KWQE_OPCODE_INIT1:
2104                         ret = cnic_bnx2x_iscsi_init1(dev, kwqe);
2105                         break;
2106                 case ISCSI_KWQE_OPCODE_INIT2:
2107                         ret = cnic_bnx2x_iscsi_init2(dev, kwqe);
2108                         break;
2109                 case ISCSI_KWQE_OPCODE_OFFLOAD_CONN1:
2110                         ret = cnic_bnx2x_iscsi_ofld1(dev, &wqes[i],
2111                                                      num_wqes - i, &work);
2112                         break;
2113                 case ISCSI_KWQE_OPCODE_UPDATE_CONN:
2114                         ret = cnic_bnx2x_iscsi_update(dev, kwqe);
2115                         break;
2116                 case ISCSI_KWQE_OPCODE_DESTROY_CONN:
2117                         ret = cnic_bnx2x_iscsi_destroy(dev, kwqe);
2118                         break;
2119                 case L4_KWQE_OPCODE_VALUE_CONNECT1:
2120                         ret = cnic_bnx2x_connect(dev, &wqes[i], num_wqes - i,
2121                                                  &work);
2122                         break;
2123                 case L4_KWQE_OPCODE_VALUE_CLOSE:
2124                         ret = cnic_bnx2x_close(dev, kwqe);
2125                         break;
2126                 case L4_KWQE_OPCODE_VALUE_RESET:
2127                         ret = cnic_bnx2x_reset(dev, kwqe);
2128                         break;
2129                 case L4_KWQE_OPCODE_VALUE_OFFLOAD_PG:
2130                         ret = cnic_bnx2x_offload_pg(dev, kwqe);
2131                         break;
2132                 case L4_KWQE_OPCODE_VALUE_UPDATE_PG:
2133                         ret = cnic_bnx2x_update_pg(dev, kwqe);
2134                         break;
2135                 case L4_KWQE_OPCODE_VALUE_UPLOAD_PG:
2136                         ret = 0;
2137                         break;
2138                 default:
2139                         ret = 0;
2140                         netdev_err(dev->netdev, "Unknown type of KWQE(0x%x)\n",
2141                                    opcode);
2142                         break;
2143                 }
2144                 if (ret < 0)
2145                         netdev_err(dev->netdev, "KWQE(0x%x) failed\n",
2146                                    opcode);
2147                 i += work;
2148         }
2149         return 0;
2150 }
2151
2152 static void service_kcqes(struct cnic_dev *dev, int num_cqes)
2153 {
2154         struct cnic_local *cp = dev->cnic_priv;
2155         int i, j, comp = 0;
2156
2157         i = 0;
2158         j = 1;
2159         while (num_cqes) {
2160                 struct cnic_ulp_ops *ulp_ops;
2161                 int ulp_type;
2162                 u32 kcqe_op_flag = cp->completed_kcq[i]->kcqe_op_flag;
2163                 u32 kcqe_layer = kcqe_op_flag & KCQE_FLAGS_LAYER_MASK;
2164
2165                 if (unlikely(kcqe_op_flag & KCQE_RAMROD_COMPLETION))
2166                         comp++;
2167
2168                 while (j < num_cqes) {
2169                         u32 next_op = cp->completed_kcq[i + j]->kcqe_op_flag;
2170
2171                         if ((next_op & KCQE_FLAGS_LAYER_MASK) != kcqe_layer)
2172                                 break;
2173
2174                         if (unlikely(next_op & KCQE_RAMROD_COMPLETION))
2175                                 comp++;
2176                         j++;
2177                 }
2178
2179                 if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L5_RDMA)
2180                         ulp_type = CNIC_ULP_RDMA;
2181                 else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L5_ISCSI)
2182                         ulp_type = CNIC_ULP_ISCSI;
2183                 else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L4)
2184                         ulp_type = CNIC_ULP_L4;
2185                 else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L2)
2186                         goto end;
2187                 else {
2188                         netdev_err(dev->netdev, "Unknown type of KCQE(0x%x)\n",
2189                                    kcqe_op_flag);
2190                         goto end;
2191                 }
2192
2193                 rcu_read_lock();
2194                 ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]);
2195                 if (likely(ulp_ops)) {
2196                         ulp_ops->indicate_kcqes(cp->ulp_handle[ulp_type],
2197                                                   cp->completed_kcq + i, j);
2198                 }
2199                 rcu_read_unlock();
2200 end:
2201                 num_cqes -= j;
2202                 i += j;
2203                 j = 1;
2204         }
2205         if (unlikely(comp))
2206                 cnic_spq_completion(dev, DRV_CTL_RET_L5_SPQ_CREDIT_CMD, comp);
2207 }
2208
2209 static u16 cnic_bnx2_next_idx(u16 idx)
2210 {
2211         return idx + 1;
2212 }
2213
2214 static u16 cnic_bnx2_hw_idx(u16 idx)
2215 {
2216         return idx;
2217 }
2218
2219 static u16 cnic_bnx2x_next_idx(u16 idx)
2220 {
2221         idx++;
2222         if ((idx & MAX_KCQE_CNT) == MAX_KCQE_CNT)
2223                 idx++;
2224
2225         return idx;
2226 }
2227
2228 static u16 cnic_bnx2x_hw_idx(u16 idx)
2229 {
2230         if ((idx & MAX_KCQE_CNT) == MAX_KCQE_CNT)
2231                 idx++;
2232         return idx;
2233 }
2234
2235 static int cnic_get_kcqes(struct cnic_dev *dev, struct kcq_info *info)
2236 {
2237         struct cnic_local *cp = dev->cnic_priv;
2238         u16 i, ri, hw_prod, last;
2239         struct kcqe *kcqe;
2240         int kcqe_cnt = 0, last_cnt = 0;
2241
2242         i = ri = last = info->sw_prod_idx;
2243         ri &= MAX_KCQ_IDX;
2244         hw_prod = *info->hw_prod_idx_ptr;
2245         hw_prod = cp->hw_idx(hw_prod);
2246
2247         while ((i != hw_prod) && (kcqe_cnt < MAX_COMPLETED_KCQE)) {
2248                 kcqe = &info->kcq[KCQ_PG(ri)][KCQ_IDX(ri)];
2249                 cp->completed_kcq[kcqe_cnt++] = kcqe;
2250                 i = cp->next_idx(i);
2251                 ri = i & MAX_KCQ_IDX;
2252                 if (likely(!(kcqe->kcqe_op_flag & KCQE_FLAGS_NEXT))) {
2253                         last_cnt = kcqe_cnt;
2254                         last = i;
2255                 }
2256         }
2257
2258         info->sw_prod_idx = last;
2259         return last_cnt;
2260 }
2261
2262 static int cnic_l2_completion(struct cnic_local *cp)
2263 {
2264         u16 hw_cons, sw_cons;
2265         struct cnic_uio_dev *udev = cp->udev;
2266         union eth_rx_cqe *cqe, *cqe_ring = (union eth_rx_cqe *)
2267                                         (udev->l2_ring + (2 * BCM_PAGE_SIZE));
2268         u32 cmd;
2269         int comp = 0;
2270
2271         if (!test_bit(CNIC_F_BNX2X_CLASS, &cp->dev->flags))
2272                 return 0;
2273
2274         hw_cons = *cp->rx_cons_ptr;
2275         if ((hw_cons & BNX2X_MAX_RCQ_DESC_CNT) == BNX2X_MAX_RCQ_DESC_CNT)
2276                 hw_cons++;
2277
2278         sw_cons = cp->rx_cons;
2279         while (sw_cons != hw_cons) {
2280                 u8 cqe_fp_flags;
2281
2282                 cqe = &cqe_ring[sw_cons & BNX2X_MAX_RCQ_DESC_CNT];
2283                 cqe_fp_flags = cqe->fast_path_cqe.type_error_flags;
2284                 if (cqe_fp_flags & ETH_FAST_PATH_RX_CQE_TYPE) {
2285                         cmd = le32_to_cpu(cqe->ramrod_cqe.conn_and_cmd_data);
2286                         cmd >>= COMMON_RAMROD_ETH_RX_CQE_CMD_ID_SHIFT;
2287                         if (cmd == RAMROD_CMD_ID_ETH_CLIENT_SETUP ||
2288                             cmd == RAMROD_CMD_ID_ETH_HALT)
2289                                 comp++;
2290                 }
2291                 sw_cons = BNX2X_NEXT_RCQE(sw_cons);
2292         }
2293         return comp;
2294 }
2295
2296 static void cnic_chk_pkt_rings(struct cnic_local *cp)
2297 {
2298         u16 rx_cons, tx_cons;
2299         int comp = 0;
2300
2301         if (!test_bit(CNIC_LCL_FL_RINGS_INITED, &cp->cnic_local_flags))
2302                 return;
2303
2304         rx_cons = *cp->rx_cons_ptr;
2305         tx_cons = *cp->tx_cons_ptr;
2306         if (cp->tx_cons != tx_cons || cp->rx_cons != rx_cons) {
2307                 if (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags))
2308                         comp = cnic_l2_completion(cp);
2309
2310                 cp->tx_cons = tx_cons;
2311                 cp->rx_cons = rx_cons;
2312
2313                 if (cp->udev)
2314                         uio_event_notify(&cp->udev->cnic_uinfo);
2315         }
2316         if (comp)
2317                 clear_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags);
2318 }
2319
2320 static u32 cnic_service_bnx2_queues(struct cnic_dev *dev)
2321 {
2322         struct cnic_local *cp = dev->cnic_priv;
2323         u32 status_idx = (u16) *cp->kcq1.status_idx_ptr;
2324         int kcqe_cnt;
2325
2326         cp->kwq_con_idx = *cp->kwq_con_idx_ptr;
2327
2328         while ((kcqe_cnt = cnic_get_kcqes(dev, &cp->kcq1))) {
2329
2330                 service_kcqes(dev, kcqe_cnt);
2331
2332                 /* Tell compiler that status_blk fields can change. */
2333                 barrier();
2334                 if (status_idx != *cp->kcq1.status_idx_ptr) {
2335                         status_idx = (u16) *cp->kcq1.status_idx_ptr;
2336                         cp->kwq_con_idx = *cp->kwq_con_idx_ptr;
2337                 } else
2338                         break;
2339         }
2340
2341         CNIC_WR16(dev, cp->kcq1.io_addr, cp->kcq1.sw_prod_idx);
2342
2343         cnic_chk_pkt_rings(cp);
2344
2345         return status_idx;
2346 }
2347
2348 static int cnic_service_bnx2(void *data, void *status_blk)
2349 {
2350         struct cnic_dev *dev = data;
2351         struct cnic_local *cp = dev->cnic_priv;
2352         u32 status_idx = *cp->kcq1.status_idx_ptr;
2353
2354         if (unlikely(!test_bit(CNIC_F_CNIC_UP, &dev->flags)))
2355                 return status_idx;
2356
2357         return cnic_service_bnx2_queues(dev);
2358 }
2359
2360 static void cnic_service_bnx2_msix(unsigned long data)
2361 {
2362         struct cnic_dev *dev = (struct cnic_dev *) data;
2363         struct cnic_local *cp = dev->cnic_priv;
2364
2365         cp->last_status_idx = cnic_service_bnx2_queues(dev);
2366
2367         CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
2368                 BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID | cp->last_status_idx);
2369 }
2370
2371 static void cnic_doirq(struct cnic_dev *dev)
2372 {
2373         struct cnic_local *cp = dev->cnic_priv;
2374         u16 prod = cp->kcq1.sw_prod_idx & MAX_KCQ_IDX;
2375
2376         if (likely(test_bit(CNIC_F_CNIC_UP, &dev->flags))) {
2377                 prefetch(cp->status_blk.gen);
2378                 prefetch(&cp->kcq1.kcq[KCQ_PG(prod)][KCQ_IDX(prod)]);
2379
2380                 tasklet_schedule(&cp->cnic_irq_task);
2381         }
2382 }
2383
2384 static irqreturn_t cnic_irq(int irq, void *dev_instance)
2385 {
2386         struct cnic_dev *dev = dev_instance;
2387         struct cnic_local *cp = dev->cnic_priv;
2388
2389         if (cp->ack_int)
2390                 cp->ack_int(dev);
2391
2392         cnic_doirq(dev);
2393
2394         return IRQ_HANDLED;
2395 }
2396
2397 static inline void cnic_ack_bnx2x_int(struct cnic_dev *dev, u8 id, u8 storm,
2398                                       u16 index, u8 op, u8 update)
2399 {
2400         struct cnic_local *cp = dev->cnic_priv;
2401         u32 hc_addr = (HC_REG_COMMAND_REG + CNIC_PORT(cp) * 32 +
2402                        COMMAND_REG_INT_ACK);
2403         struct igu_ack_register igu_ack;
2404
2405         igu_ack.status_block_index = index;
2406         igu_ack.sb_id_and_flags =
2407                         ((id << IGU_ACK_REGISTER_STATUS_BLOCK_ID_SHIFT) |
2408                          (storm << IGU_ACK_REGISTER_STORM_ID_SHIFT) |
2409                          (update << IGU_ACK_REGISTER_UPDATE_INDEX_SHIFT) |
2410                          (op << IGU_ACK_REGISTER_INTERRUPT_MODE_SHIFT));
2411
2412         CNIC_WR(dev, hc_addr, (*(u32 *)&igu_ack));
2413 }
2414
2415 static void cnic_ack_igu_sb(struct cnic_dev *dev, u8 igu_sb_id, u8 segment,
2416                             u16 index, u8 op, u8 update)
2417 {
2418         struct igu_regular cmd_data;
2419         u32 igu_addr = BAR_IGU_INTMEM + (IGU_CMD_INT_ACK_BASE + igu_sb_id) * 8;
2420
2421         cmd_data.sb_id_and_flags =
2422                 (index << IGU_REGULAR_SB_INDEX_SHIFT) |
2423                 (segment << IGU_REGULAR_SEGMENT_ACCESS_SHIFT) |
2424                 (update << IGU_REGULAR_BUPDATE_SHIFT) |
2425                 (op << IGU_REGULAR_ENABLE_INT_SHIFT);
2426
2427
2428         CNIC_WR(dev, igu_addr, cmd_data.sb_id_and_flags);
2429 }
2430
2431 static void cnic_ack_bnx2x_msix(struct cnic_dev *dev)
2432 {
2433         struct cnic_local *cp = dev->cnic_priv;
2434
2435         cnic_ack_bnx2x_int(dev, cp->bnx2x_igu_sb_id, CSTORM_ID, 0,
2436                            IGU_INT_DISABLE, 0);
2437 }
2438
2439 static void cnic_ack_bnx2x_e2_msix(struct cnic_dev *dev)
2440 {
2441         struct cnic_local *cp = dev->cnic_priv;
2442
2443         cnic_ack_igu_sb(dev, cp->bnx2x_igu_sb_id, IGU_SEG_ACCESS_DEF, 0,
2444                         IGU_INT_DISABLE, 0);
2445 }
2446
2447 static u32 cnic_service_bnx2x_kcq(struct cnic_dev *dev, struct kcq_info *info)
2448 {
2449         u32 last_status = *info->status_idx_ptr;
2450         int kcqe_cnt;
2451
2452         while ((kcqe_cnt = cnic_get_kcqes(dev, info))) {
2453
2454                 service_kcqes(dev, kcqe_cnt);
2455
2456                 /* Tell compiler that sblk fields can change. */
2457                 barrier();
2458                 if (last_status == *info->status_idx_ptr)
2459                         break;
2460
2461                 last_status = *info->status_idx_ptr;
2462         }
2463         return last_status;
2464 }
2465
2466 static void cnic_service_bnx2x_bh(unsigned long data)
2467 {
2468         struct cnic_dev *dev = (struct cnic_dev *) data;
2469         struct cnic_local *cp = dev->cnic_priv;
2470         u32 status_idx;
2471
2472         if (unlikely(!test_bit(CNIC_F_CNIC_UP, &dev->flags)))
2473                 return;
2474
2475         status_idx = cnic_service_bnx2x_kcq(dev, &cp->kcq1);
2476
2477         CNIC_WR16(dev, cp->kcq1.io_addr, cp->kcq1.sw_prod_idx + MAX_KCQ_IDX);
2478         if (BNX2X_CHIP_IS_E2(cp->chip_id))
2479                 cnic_ack_igu_sb(dev, cp->bnx2x_igu_sb_id, IGU_SEG_ACCESS_DEF,
2480                                 status_idx, IGU_INT_ENABLE, 1);
2481         else
2482                 cnic_ack_bnx2x_int(dev, cp->bnx2x_igu_sb_id, USTORM_ID,
2483                                    status_idx, IGU_INT_ENABLE, 1);
2484 }
2485
2486 static int cnic_service_bnx2x(void *data, void *status_blk)
2487 {
2488         struct cnic_dev *dev = data;
2489         struct cnic_local *cp = dev->cnic_priv;
2490
2491         if (!(cp->ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX))
2492                 cnic_doirq(dev);
2493
2494         cnic_chk_pkt_rings(cp);
2495
2496         return 0;
2497 }
2498
2499 static void cnic_ulp_stop(struct cnic_dev *dev)
2500 {
2501         struct cnic_local *cp = dev->cnic_priv;
2502         int if_type;
2503
2504         cnic_send_nlmsg(cp, ISCSI_KEVENT_IF_DOWN, NULL);
2505
2506         for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) {
2507                 struct cnic_ulp_ops *ulp_ops;
2508
2509                 mutex_lock(&cnic_lock);
2510                 ulp_ops = cp->ulp_ops[if_type];
2511                 if (!ulp_ops) {
2512                         mutex_unlock(&cnic_lock);
2513                         continue;
2514                 }
2515                 set_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
2516                 mutex_unlock(&cnic_lock);
2517
2518                 if (test_and_clear_bit(ULP_F_START, &cp->ulp_flags[if_type]))
2519                         ulp_ops->cnic_stop(cp->ulp_handle[if_type]);
2520
2521                 clear_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
2522         }
2523 }
2524
2525 static void cnic_ulp_start(struct cnic_dev *dev)
2526 {
2527         struct cnic_local *cp = dev->cnic_priv;
2528         int if_type;
2529
2530         for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) {
2531                 struct cnic_ulp_ops *ulp_ops;
2532
2533                 mutex_lock(&cnic_lock);
2534                 ulp_ops = cp->ulp_ops[if_type];
2535                 if (!ulp_ops || !ulp_ops->cnic_start) {
2536                         mutex_unlock(&cnic_lock);
2537                         continue;
2538                 }
2539                 set_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
2540                 mutex_unlock(&cnic_lock);
2541
2542                 if (!test_and_set_bit(ULP_F_START, &cp->ulp_flags[if_type]))
2543                         ulp_ops->cnic_start(cp->ulp_handle[if_type]);
2544
2545                 clear_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
2546         }
2547 }
2548
2549 static int cnic_ctl(void *data, struct cnic_ctl_info *info)
2550 {
2551         struct cnic_dev *dev = data;
2552
2553         switch (info->cmd) {
2554         case CNIC_CTL_STOP_CMD:
2555                 cnic_hold(dev);
2556
2557                 cnic_ulp_stop(dev);
2558                 cnic_stop_hw(dev);
2559
2560                 cnic_put(dev);
2561                 break;
2562         case CNIC_CTL_START_CMD:
2563                 cnic_hold(dev);
2564
2565                 if (!cnic_start_hw(dev))
2566                         cnic_ulp_start(dev);
2567
2568                 cnic_put(dev);
2569                 break;
2570         case CNIC_CTL_COMPLETION_CMD: {
2571                 u32 cid = BNX2X_SW_CID(info->data.comp.cid);
2572                 u32 l5_cid;
2573                 struct cnic_local *cp = dev->cnic_priv;
2574
2575                 if (cnic_get_l5_cid(cp, cid, &l5_cid) == 0) {
2576                         struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
2577
2578                         ctx->wait_cond = 1;
2579                         wake_up(&ctx->waitq);
2580                 }
2581                 break;
2582         }
2583         default:
2584                 return -EINVAL;
2585         }
2586         return 0;
2587 }
2588
2589 static void cnic_ulp_init(struct cnic_dev *dev)
2590 {
2591         int i;
2592         struct cnic_local *cp = dev->cnic_priv;
2593
2594         for (i = 0; i < MAX_CNIC_ULP_TYPE_EXT; i++) {
2595                 struct cnic_ulp_ops *ulp_ops;
2596
2597                 mutex_lock(&cnic_lock);
2598                 ulp_ops = cnic_ulp_tbl[i];
2599                 if (!ulp_ops || !ulp_ops->cnic_init) {
2600                         mutex_unlock(&cnic_lock);
2601                         continue;
2602                 }
2603                 ulp_get(ulp_ops);
2604                 mutex_unlock(&cnic_lock);
2605
2606                 if (!test_and_set_bit(ULP_F_INIT, &cp->ulp_flags[i]))
2607                         ulp_ops->cnic_init(dev);
2608
2609                 ulp_put(ulp_ops);
2610         }
2611 }
2612
2613 static void cnic_ulp_exit(struct cnic_dev *dev)
2614 {
2615         int i;
2616         struct cnic_local *cp = dev->cnic_priv;
2617
2618         for (i = 0; i < MAX_CNIC_ULP_TYPE_EXT; i++) {
2619                 struct cnic_ulp_ops *ulp_ops;
2620
2621                 mutex_lock(&cnic_lock);
2622                 ulp_ops = cnic_ulp_tbl[i];
2623                 if (!ulp_ops || !ulp_ops->cnic_exit) {
2624                         mutex_unlock(&cnic_lock);
2625                         continue;
2626                 }
2627                 ulp_get(ulp_ops);
2628                 mutex_unlock(&cnic_lock);
2629
2630                 if (test_and_clear_bit(ULP_F_INIT, &cp->ulp_flags[i]))
2631                         ulp_ops->cnic_exit(dev);
2632
2633                 ulp_put(ulp_ops);
2634         }
2635 }
2636
2637 static int cnic_cm_offload_pg(struct cnic_sock *csk)
2638 {
2639         struct cnic_dev *dev = csk->dev;
2640         struct l4_kwq_offload_pg *l4kwqe;
2641         struct kwqe *wqes[1];
2642
2643         l4kwqe = (struct l4_kwq_offload_pg *) &csk->kwqe1;
2644         memset(l4kwqe, 0, sizeof(*l4kwqe));
2645         wqes[0] = (struct kwqe *) l4kwqe;
2646
2647         l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_OFFLOAD_PG;
2648         l4kwqe->flags =
2649                 L4_LAYER_CODE << L4_KWQ_OFFLOAD_PG_LAYER_CODE_SHIFT;
2650         l4kwqe->l2hdr_nbytes = ETH_HLEN;
2651
2652         l4kwqe->da0 = csk->ha[0];
2653         l4kwqe->da1 = csk->ha[1];
2654         l4kwqe->da2 = csk->ha[2];
2655         l4kwqe->da3 = csk->ha[3];
2656         l4kwqe->da4 = csk->ha[4];
2657         l4kwqe->da5 = csk->ha[5];
2658
2659         l4kwqe->sa0 = dev->mac_addr[0];
2660         l4kwqe->sa1 = dev->mac_addr[1];
2661         l4kwqe->sa2 = dev->mac_addr[2];
2662         l4kwqe->sa3 = dev->mac_addr[3];
2663         l4kwqe->sa4 = dev->mac_addr[4];
2664         l4kwqe->sa5 = dev->mac_addr[5];
2665
2666         l4kwqe->etype = ETH_P_IP;
2667         l4kwqe->ipid_start = DEF_IPID_START;
2668         l4kwqe->host_opaque = csk->l5_cid;
2669
2670         if (csk->vlan_id) {
2671                 l4kwqe->pg_flags |= L4_KWQ_OFFLOAD_PG_VLAN_TAGGING;
2672                 l4kwqe->vlan_tag = csk->vlan_id;
2673                 l4kwqe->l2hdr_nbytes += 4;
2674         }
2675
2676         return dev->submit_kwqes(dev, wqes, 1);
2677 }
2678
2679 static int cnic_cm_update_pg(struct cnic_sock *csk)
2680 {
2681         struct cnic_dev *dev = csk->dev;
2682         struct l4_kwq_update_pg *l4kwqe;
2683         struct kwqe *wqes[1];
2684
2685         l4kwqe = (struct l4_kwq_update_pg *) &csk->kwqe1;
2686         memset(l4kwqe, 0, sizeof(*l4kwqe));
2687         wqes[0] = (struct kwqe *) l4kwqe;
2688
2689         l4kwqe->opcode = L4_KWQE_OPCODE_VALUE_UPDATE_PG;
2690         l4kwqe->flags =
2691                 L4_LAYER_CODE << L4_KWQ_UPDATE_PG_LAYER_CODE_SHIFT;
2692         l4kwqe->pg_cid = csk->pg_cid;
2693
2694         l4kwqe->da0 = csk->ha[0];
2695         l4kwqe->da1 = csk->ha[1];
2696         l4kwqe->da2 = csk->ha[2];
2697         l4kwqe->da3 = csk->ha[3];
2698         l4kwqe->da4 = csk->ha[4];
2699         l4kwqe->da5 = csk->ha[5];
2700
2701         l4kwqe->pg_host_opaque = csk->l5_cid;
2702         l4kwqe->pg_valids = L4_KWQ_UPDATE_PG_VALIDS_DA;
2703
2704         return dev->submit_kwqes(dev, wqes, 1);
2705 }
2706
2707 static int cnic_cm_upload_pg(struct cnic_sock *csk)
2708 {
2709         struct cnic_dev *dev = csk->dev;
2710         struct l4_kwq_upload *l4kwqe;
2711         struct kwqe *wqes[1];
2712
2713         l4kwqe = (struct l4_kwq_upload *) &csk->kwqe1;
2714         memset(l4kwqe, 0, sizeof(*l4kwqe));
2715         wqes[0] = (struct kwqe *) l4kwqe;
2716
2717         l4kwqe->opcode = L4_KWQE_OPCODE_VALUE_UPLOAD_PG;
2718         l4kwqe->flags =
2719                 L4_LAYER_CODE << L4_KWQ_UPLOAD_LAYER_CODE_SHIFT;
2720         l4kwqe->cid = csk->pg_cid;
2721
2722         return dev->submit_kwqes(dev, wqes, 1);
2723 }
2724
2725 static int cnic_cm_conn_req(struct cnic_sock *csk)
2726 {
2727         struct cnic_dev *dev = csk->dev;
2728         struct l4_kwq_connect_req1 *l4kwqe1;
2729         struct l4_kwq_connect_req2 *l4kwqe2;
2730         struct l4_kwq_connect_req3 *l4kwqe3;
2731         struct kwqe *wqes[3];
2732         u8 tcp_flags = 0;
2733         int num_wqes = 2;
2734
2735         l4kwqe1 = (struct l4_kwq_connect_req1 *) &csk->kwqe1;
2736         l4kwqe2 = (struct l4_kwq_connect_req2 *) &csk->kwqe2;
2737         l4kwqe3 = (struct l4_kwq_connect_req3 *) &csk->kwqe3;
2738         memset(l4kwqe1, 0, sizeof(*l4kwqe1));
2739         memset(l4kwqe2, 0, sizeof(*l4kwqe2));
2740         memset(l4kwqe3, 0, sizeof(*l4kwqe3));
2741
2742         l4kwqe3->op_code = L4_KWQE_OPCODE_VALUE_CONNECT3;
2743         l4kwqe3->flags =
2744                 L4_LAYER_CODE << L4_KWQ_CONNECT_REQ3_LAYER_CODE_SHIFT;
2745         l4kwqe3->ka_timeout = csk->ka_timeout;
2746         l4kwqe3->ka_interval = csk->ka_interval;
2747         l4kwqe3->ka_max_probe_count = csk->ka_max_probe_count;
2748         l4kwqe3->tos = csk->tos;
2749         l4kwqe3->ttl = csk->ttl;
2750         l4kwqe3->snd_seq_scale = csk->snd_seq_scale;
2751         l4kwqe3->pmtu = csk->mtu;
2752         l4kwqe3->rcv_buf = csk->rcv_buf;
2753         l4kwqe3->snd_buf = csk->snd_buf;
2754         l4kwqe3->seed = csk->seed;
2755
2756         wqes[0] = (struct kwqe *) l4kwqe1;
2757         if (test_bit(SK_F_IPV6, &csk->flags)) {
2758                 wqes[1] = (struct kwqe *) l4kwqe2;
2759                 wqes[2] = (struct kwqe *) l4kwqe3;
2760                 num_wqes = 3;
2761
2762                 l4kwqe1->conn_flags = L4_KWQ_CONNECT_REQ1_IP_V6;
2763                 l4kwqe2->op_code = L4_KWQE_OPCODE_VALUE_CONNECT2;
2764                 l4kwqe2->flags =
2765                         L4_KWQ_CONNECT_REQ2_LINKED_WITH_NEXT |
2766                         L4_LAYER_CODE << L4_KWQ_CONNECT_REQ2_LAYER_CODE_SHIFT;
2767                 l4kwqe2->src_ip_v6_2 = be32_to_cpu(csk->src_ip[1]);
2768                 l4kwqe2->src_ip_v6_3 = be32_to_cpu(csk->src_ip[2]);
2769                 l4kwqe2->src_ip_v6_4 = be32_to_cpu(csk->src_ip[3]);
2770                 l4kwqe2->dst_ip_v6_2 = be32_to_cpu(csk->dst_ip[1]);
2771                 l4kwqe2->dst_ip_v6_3 = be32_to_cpu(csk->dst_ip[2]);
2772                 l4kwqe2->dst_ip_v6_4 = be32_to_cpu(csk->dst_ip[3]);
2773                 l4kwqe3->mss = l4kwqe3->pmtu - sizeof(struct ipv6hdr) -
2774                                sizeof(struct tcphdr);
2775         } else {
2776                 wqes[1] = (struct kwqe *) l4kwqe3;
2777                 l4kwqe3->mss = l4kwqe3->pmtu - sizeof(struct iphdr) -
2778                                sizeof(struct tcphdr);
2779         }
2780
2781         l4kwqe1->op_code = L4_KWQE_OPCODE_VALUE_CONNECT1;
2782         l4kwqe1->flags =
2783                 (L4_LAYER_CODE << L4_KWQ_CONNECT_REQ1_LAYER_CODE_SHIFT) |
2784                  L4_KWQ_CONNECT_REQ3_LINKED_WITH_NEXT;
2785         l4kwqe1->cid = csk->cid;
2786         l4kwqe1->pg_cid = csk->pg_cid;
2787         l4kwqe1->src_ip = be32_to_cpu(csk->src_ip[0]);
2788         l4kwqe1->dst_ip = be32_to_cpu(csk->dst_ip[0]);
2789         l4kwqe1->src_port = be16_to_cpu(csk->src_port);
2790         l4kwqe1->dst_port = be16_to_cpu(csk->dst_port);
2791         if (csk->tcp_flags & SK_TCP_NO_DELAY_ACK)
2792                 tcp_flags |= L4_KWQ_CONNECT_REQ1_NO_DELAY_ACK;
2793         if (csk->tcp_flags & SK_TCP_KEEP_ALIVE)
2794                 tcp_flags |= L4_KWQ_CONNECT_REQ1_KEEP_ALIVE;
2795         if (csk->tcp_flags & SK_TCP_NAGLE)
2796                 tcp_flags |= L4_KWQ_CONNECT_REQ1_NAGLE_ENABLE;
2797         if (csk->tcp_flags & SK_TCP_TIMESTAMP)
2798                 tcp_flags |= L4_KWQ_CONNECT_REQ1_TIME_STAMP;
2799         if (csk->tcp_flags & SK_TCP_SACK)
2800                 tcp_flags |= L4_KWQ_CONNECT_REQ1_SACK;
2801         if (csk->tcp_flags & SK_TCP_SEG_SCALING)
2802                 tcp_flags |= L4_KWQ_CONNECT_REQ1_SEG_SCALING;
2803
2804         l4kwqe1->tcp_flags = tcp_flags;
2805
2806         return dev->submit_kwqes(dev, wqes, num_wqes);
2807 }
2808
2809 static int cnic_cm_close_req(struct cnic_sock *csk)
2810 {
2811         struct cnic_dev *dev = csk->dev;
2812         struct l4_kwq_close_req *l4kwqe;
2813         struct kwqe *wqes[1];
2814
2815         l4kwqe = (struct l4_kwq_close_req *) &csk->kwqe2;
2816         memset(l4kwqe, 0, sizeof(*l4kwqe));
2817         wqes[0] = (struct kwqe *) l4kwqe;
2818
2819         l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_CLOSE;
2820         l4kwqe->flags = L4_LAYER_CODE << L4_KWQ_CLOSE_REQ_LAYER_CODE_SHIFT;
2821         l4kwqe->cid = csk->cid;
2822
2823         return dev->submit_kwqes(dev, wqes, 1);
2824 }
2825
2826 static int cnic_cm_abort_req(struct cnic_sock *csk)
2827 {
2828         struct cnic_dev *dev = csk->dev;
2829         struct l4_kwq_reset_req *l4kwqe;
2830         struct kwqe *wqes[1];
2831
2832         l4kwqe = (struct l4_kwq_reset_req *) &csk->kwqe2;
2833         memset(l4kwqe, 0, sizeof(*l4kwqe));
2834         wqes[0] = (struct kwqe *) l4kwqe;
2835
2836         l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_RESET;
2837         l4kwqe->flags = L4_LAYER_CODE << L4_KWQ_RESET_REQ_LAYER_CODE_SHIFT;
2838         l4kwqe->cid = csk->cid;
2839
2840         return dev->submit_kwqes(dev, wqes, 1);
2841 }
2842
2843 static int cnic_cm_create(struct cnic_dev *dev, int ulp_type, u32 cid,
2844                           u32 l5_cid, struct cnic_sock **csk, void *context)
2845 {
2846         struct cnic_local *cp = dev->cnic_priv;
2847         struct cnic_sock *csk1;
2848
2849         if (l5_cid >= MAX_CM_SK_TBL_SZ)
2850                 return -EINVAL;
2851
2852         if (cp->ctx_tbl) {
2853                 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
2854
2855                 if (test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags))
2856                         return -EAGAIN;
2857         }
2858
2859         csk1 = &cp->csk_tbl[l5_cid];
2860         if (atomic_read(&csk1->ref_count))
2861                 return -EAGAIN;
2862
2863         if (test_and_set_bit(SK_F_INUSE, &csk1->flags))
2864                 return -EBUSY;
2865
2866         csk1->dev = dev;
2867         csk1->cid = cid;
2868         csk1->l5_cid = l5_cid;
2869         csk1->ulp_type = ulp_type;
2870         csk1->context = context;
2871
2872         csk1->ka_timeout = DEF_KA_TIMEOUT;
2873         csk1->ka_interval = DEF_KA_INTERVAL;
2874         csk1->ka_max_probe_count = DEF_KA_MAX_PROBE_COUNT;
2875         csk1->tos = DEF_TOS;
2876         csk1->ttl = DEF_TTL;
2877         csk1->snd_seq_scale = DEF_SND_SEQ_SCALE;
2878         csk1->rcv_buf = DEF_RCV_BUF;
2879         csk1->snd_buf = DEF_SND_BUF;
2880         csk1->seed = DEF_SEED;
2881
2882         *csk = csk1;
2883         return 0;
2884 }
2885
2886 static void cnic_cm_cleanup(struct cnic_sock *csk)
2887 {
2888         if (csk->src_port) {
2889                 struct cnic_dev *dev = csk->dev;
2890                 struct cnic_local *cp = dev->cnic_priv;
2891
2892                 cnic_free_id(&cp->csk_port_tbl, csk->src_port);
2893                 csk->src_port = 0;
2894         }
2895 }
2896
2897 static void cnic_close_conn(struct cnic_sock *csk)
2898 {
2899         if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags)) {
2900                 cnic_cm_upload_pg(csk);
2901                 clear_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags);
2902         }
2903         cnic_cm_cleanup(csk);
2904 }
2905
2906 static int cnic_cm_destroy(struct cnic_sock *csk)
2907 {
2908         if (!cnic_in_use(csk))
2909                 return -EINVAL;
2910
2911         csk_hold(csk);
2912         clear_bit(SK_F_INUSE, &csk->flags);
2913         smp_mb__after_clear_bit();
2914         while (atomic_read(&csk->ref_count) != 1)
2915                 msleep(1);
2916         cnic_cm_cleanup(csk);
2917
2918         csk->flags = 0;
2919         csk_put(csk);
2920         return 0;
2921 }
2922
2923 static inline u16 cnic_get_vlan(struct net_device *dev,
2924                                 struct net_device **vlan_dev)
2925 {
2926         if (dev->priv_flags & IFF_802_1Q_VLAN) {
2927                 *vlan_dev = vlan_dev_real_dev(dev);
2928                 return vlan_dev_vlan_id(dev);
2929         }
2930         *vlan_dev = dev;
2931         return 0;
2932 }
2933
2934 static int cnic_get_v4_route(struct sockaddr_in *dst_addr,
2935                              struct dst_entry **dst)
2936 {
2937 #if defined(CONFIG_INET)
2938         struct flowi fl;
2939         int err;
2940         struct rtable *rt;
2941
2942         memset(&fl, 0, sizeof(fl));
2943         fl.nl_u.ip4_u.daddr = dst_addr->sin_addr.s_addr;
2944
2945         err = ip_route_output_key(&init_net, &rt, &fl);
2946         if (!err)
2947                 *dst = &rt->dst;
2948         return err;
2949 #else
2950         return -ENETUNREACH;
2951 #endif
2952 }
2953
2954 static int cnic_get_v6_route(struct sockaddr_in6 *dst_addr,
2955                              struct dst_entry **dst)
2956 {
2957 #if defined(CONFIG_IPV6) || (defined(CONFIG_IPV6_MODULE) && defined(MODULE))
2958         struct flowi fl;
2959
2960         memset(&fl, 0, sizeof(fl));
2961         ipv6_addr_copy(&fl.fl6_dst, &dst_addr->sin6_addr);
2962         if (ipv6_addr_type(&fl.fl6_dst) & IPV6_ADDR_LINKLOCAL)
2963                 fl.oif = dst_addr->sin6_scope_id;
2964
2965         *dst = ip6_route_output(&init_net, NULL, &fl);
2966         if (*dst)
2967                 return 0;
2968 #endif
2969
2970         return -ENETUNREACH;
2971 }
2972
2973 static struct cnic_dev *cnic_cm_select_dev(struct sockaddr_in *dst_addr,
2974                                            int ulp_type)
2975 {
2976         struct cnic_dev *dev = NULL;
2977         struct dst_entry *dst;
2978         struct net_device *netdev = NULL;
2979         int err = -ENETUNREACH;
2980
2981         if (dst_addr->sin_family == AF_INET)
2982                 err = cnic_get_v4_route(dst_addr, &dst);
2983         else if (dst_addr->sin_family == AF_INET6) {
2984                 struct sockaddr_in6 *dst_addr6 =
2985                         (struct sockaddr_in6 *) dst_addr;
2986
2987                 err = cnic_get_v6_route(dst_addr6, &dst);
2988         } else
2989                 return NULL;
2990
2991         if (err)
2992                 return NULL;
2993
2994         if (!dst->dev)
2995                 goto done;
2996
2997         cnic_get_vlan(dst->dev, &netdev);
2998
2999         dev = cnic_from_netdev(netdev);
3000
3001 done:
3002         dst_release(dst);
3003         if (dev)
3004                 cnic_put(dev);
3005         return dev;
3006 }
3007
3008 static int cnic_resolve_addr(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
3009 {
3010         struct cnic_dev *dev = csk->dev;
3011         struct cnic_local *cp = dev->cnic_priv;
3012
3013         return cnic_send_nlmsg(cp, ISCSI_KEVENT_PATH_REQ, csk);
3014 }
3015
3016 static int cnic_get_route(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
3017 {
3018         struct cnic_dev *dev = csk->dev;
3019         struct cnic_local *cp = dev->cnic_priv;
3020         int is_v6, rc = 0;
3021         struct dst_entry *dst = NULL;
3022         struct net_device *realdev;
3023         u32 local_port;
3024
3025         if (saddr->local.v6.sin6_family == AF_INET6 &&
3026             saddr->remote.v6.sin6_family == AF_INET6)
3027                 is_v6 = 1;
3028         else if (saddr->local.v4.sin_family == AF_INET &&
3029                  saddr->remote.v4.sin_family == AF_INET)
3030                 is_v6 = 0;
3031         else
3032                 return -EINVAL;
3033
3034         clear_bit(SK_F_IPV6, &csk->flags);
3035
3036         if (is_v6) {
3037                 set_bit(SK_F_IPV6, &csk->flags);
3038                 cnic_get_v6_route(&saddr->remote.v6, &dst);
3039
3040                 memcpy(&csk->dst_ip[0], &saddr->remote.v6.sin6_addr,
3041                        sizeof(struct in6_addr));
3042                 csk->dst_port = saddr->remote.v6.sin6_port;
3043                 local_port = saddr->local.v6.sin6_port;
3044
3045         } else {
3046                 cnic_get_v4_route(&saddr->remote.v4, &dst);
3047
3048                 csk->dst_ip[0] = saddr->remote.v4.sin_addr.s_addr;
3049                 csk->dst_port = saddr->remote.v4.sin_port;
3050                 local_port = saddr->local.v4.sin_port;
3051         }
3052
3053         csk->vlan_id = 0;
3054         csk->mtu = dev->netdev->mtu;
3055         if (dst && dst->dev) {
3056                 u16 vlan = cnic_get_vlan(dst->dev, &realdev);
3057                 if (realdev == dev->netdev) {
3058                         csk->vlan_id = vlan;
3059                         csk->mtu = dst_mtu(dst);
3060                 }
3061         }
3062
3063         if (local_port >= CNIC_LOCAL_PORT_MIN &&
3064             local_port < CNIC_LOCAL_PORT_MAX) {
3065                 if (cnic_alloc_id(&cp->csk_port_tbl, local_port))
3066                         local_port = 0;
3067         } else
3068                 local_port = 0;
3069
3070         if (!local_port) {
3071                 local_port = cnic_alloc_new_id(&cp->csk_port_tbl);
3072                 if (local_port == -1) {
3073                         rc = -ENOMEM;
3074                         goto err_out;
3075                 }
3076         }
3077         csk->src_port = local_port;
3078
3079 err_out:
3080         dst_release(dst);
3081         return rc;
3082 }
3083
3084 static void cnic_init_csk_state(struct cnic_sock *csk)
3085 {
3086         csk->state = 0;
3087         clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
3088         clear_bit(SK_F_CLOSING, &csk->flags);
3089 }
3090
3091 static int cnic_cm_connect(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
3092 {
3093         int err = 0;
3094
3095         if (!cnic_in_use(csk))
3096                 return -EINVAL;
3097
3098         if (test_and_set_bit(SK_F_CONNECT_START, &csk->flags))
3099                 return -EINVAL;
3100
3101         cnic_init_csk_state(csk);
3102
3103         err = cnic_get_route(csk, saddr);
3104         if (err)
3105                 goto err_out;
3106
3107         err = cnic_resolve_addr(csk, saddr);
3108         if (!err)
3109                 return 0;
3110
3111 err_out:
3112         clear_bit(SK_F_CONNECT_START, &csk->flags);
3113         return err;
3114 }
3115
3116 static int cnic_cm_abort(struct cnic_sock *csk)
3117 {
3118         struct cnic_local *cp = csk->dev->cnic_priv;
3119         u32 opcode = L4_KCQE_OPCODE_VALUE_RESET_COMP;
3120
3121         if (!cnic_in_use(csk))
3122                 return -EINVAL;
3123
3124         if (cnic_abort_prep(csk))
3125                 return cnic_cm_abort_req(csk);
3126
3127         /* Getting here means that we haven't started connect, or
3128          * connect was not successful.
3129          */
3130
3131         cp->close_conn(csk, opcode);
3132         if (csk->state != opcode)
3133                 return -EALREADY;
3134
3135         return 0;
3136 }
3137
3138 static int cnic_cm_close(struct cnic_sock *csk)
3139 {
3140         if (!cnic_in_use(csk))
3141                 return -EINVAL;
3142
3143         if (cnic_close_prep(csk)) {
3144                 csk->state = L4_KCQE_OPCODE_VALUE_CLOSE_COMP;
3145                 return cnic_cm_close_req(csk);
3146         } else {
3147                 return -EALREADY;
3148         }
3149         return 0;
3150 }
3151
3152 static void cnic_cm_upcall(struct cnic_local *cp, struct cnic_sock *csk,
3153                            u8 opcode)
3154 {
3155         struct cnic_ulp_ops *ulp_ops;
3156         int ulp_type = csk->ulp_type;
3157
3158         rcu_read_lock();
3159         ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]);
3160         if (ulp_ops) {
3161                 if (opcode == L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE)
3162                         ulp_ops->cm_connect_complete(csk);
3163                 else if (opcode == L4_KCQE_OPCODE_VALUE_CLOSE_COMP)
3164                         ulp_ops->cm_close_complete(csk);
3165                 else if (opcode == L4_KCQE_OPCODE_VALUE_RESET_RECEIVED)
3166                         ulp_ops->cm_remote_abort(csk);
3167                 else if (opcode == L4_KCQE_OPCODE_VALUE_RESET_COMP)
3168                         ulp_ops->cm_abort_complete(csk);
3169                 else if (opcode == L4_KCQE_OPCODE_VALUE_CLOSE_RECEIVED)
3170                         ulp_ops->cm_remote_close(csk);
3171         }
3172         rcu_read_unlock();
3173 }
3174
3175 static int cnic_cm_set_pg(struct cnic_sock *csk)
3176 {
3177         if (cnic_offld_prep(csk)) {
3178                 if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags))
3179                         cnic_cm_update_pg(csk);
3180                 else
3181                         cnic_cm_offload_pg(csk);
3182         }
3183         return 0;
3184 }
3185
3186 static void cnic_cm_process_offld_pg(struct cnic_dev *dev, struct l4_kcq *kcqe)
3187 {
3188         struct cnic_local *cp = dev->cnic_priv;
3189         u32 l5_cid = kcqe->pg_host_opaque;
3190         u8 opcode = kcqe->op_code;
3191         struct cnic_sock *csk = &cp->csk_tbl[l5_cid];
3192
3193         csk_hold(csk);
3194         if (!cnic_in_use(csk))
3195                 goto done;
3196
3197         if (opcode == L4_KCQE_OPCODE_VALUE_UPDATE_PG) {
3198                 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
3199                 goto done;
3200         }
3201         /* Possible PG kcqe status:  SUCCESS, OFFLOADED_PG, or CTX_ALLOC_FAIL */
3202         if (kcqe->status == L4_KCQE_COMPLETION_STATUS_CTX_ALLOC_FAIL) {
3203                 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
3204                 cnic_cm_upcall(cp, csk,
3205                                L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE);
3206                 goto done;
3207         }
3208
3209         csk->pg_cid = kcqe->pg_cid;
3210         set_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags);
3211         cnic_cm_conn_req(csk);
3212
3213 done:
3214         csk_put(csk);
3215 }
3216
3217 static void cnic_cm_process_kcqe(struct cnic_dev *dev, struct kcqe *kcqe)
3218 {
3219         struct cnic_local *cp = dev->cnic_priv;
3220         struct l4_kcq *l4kcqe = (struct l4_kcq *) kcqe;
3221         u8 opcode = l4kcqe->op_code;
3222         u32 l5_cid;
3223         struct cnic_sock *csk;
3224
3225         if (opcode == L4_KCQE_OPCODE_VALUE_OFFLOAD_PG ||
3226             opcode == L4_KCQE_OPCODE_VALUE_UPDATE_PG) {
3227                 cnic_cm_process_offld_pg(dev, l4kcqe);
3228                 return;
3229         }
3230
3231         l5_cid = l4kcqe->conn_id;
3232         if (opcode & 0x80)
3233                 l5_cid = l4kcqe->cid;
3234         if (l5_cid >= MAX_CM_SK_TBL_SZ)
3235                 return;
3236
3237         csk = &cp->csk_tbl[l5_cid];
3238         csk_hold(csk);
3239
3240         if (!cnic_in_use(csk)) {
3241                 csk_put(csk);
3242                 return;
3243         }
3244
3245         switch (opcode) {
3246         case L5CM_RAMROD_CMD_ID_TCP_CONNECT:
3247                 if (l4kcqe->status != 0) {
3248                         clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
3249                         cnic_cm_upcall(cp, csk,
3250                                        L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE);
3251                 }
3252                 break;
3253         case L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE:
3254                 if (l4kcqe->status == 0)
3255                         set_bit(SK_F_OFFLD_COMPLETE, &csk->flags);
3256
3257                 smp_mb__before_clear_bit();
3258                 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
3259                 cnic_cm_upcall(cp, csk, opcode);
3260                 break;
3261
3262         case L4_KCQE_OPCODE_VALUE_RESET_RECEIVED:
3263         case L4_KCQE_OPCODE_VALUE_CLOSE_COMP:
3264         case L4_KCQE_OPCODE_VALUE_RESET_COMP:
3265         case L5CM_RAMROD_CMD_ID_SEARCHER_DELETE:
3266         case L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD:
3267                 cp->close_conn(csk, opcode);
3268                 break;
3269
3270         case L4_KCQE_OPCODE_VALUE_CLOSE_RECEIVED:
3271                 cnic_cm_upcall(cp, csk, opcode);
3272                 break;
3273         }
3274         csk_put(csk);
3275 }
3276
3277 static void cnic_cm_indicate_kcqe(void *data, struct kcqe *kcqe[], u32 num)
3278 {
3279         struct cnic_dev *dev = data;
3280         int i;
3281
3282         for (i = 0; i < num; i++)
3283                 cnic_cm_process_kcqe(dev, kcqe[i]);
3284 }
3285
3286 static struct cnic_ulp_ops cm_ulp_ops = {
3287         .indicate_kcqes         = cnic_cm_indicate_kcqe,
3288 };
3289
3290 static void cnic_cm_free_mem(struct cnic_dev *dev)
3291 {
3292         struct cnic_local *cp = dev->cnic_priv;
3293
3294         kfree(cp->csk_tbl);
3295         cp->csk_tbl = NULL;
3296         cnic_free_id_tbl(&cp->csk_port_tbl);
3297 }
3298
3299 static int cnic_cm_alloc_mem(struct cnic_dev *dev)
3300 {
3301         struct cnic_local *cp = dev->cnic_priv;
3302
3303         cp->csk_tbl = kzalloc(sizeof(struct cnic_sock) * MAX_CM_SK_TBL_SZ,
3304                               GFP_KERNEL);
3305         if (!cp->csk_tbl)
3306                 return -ENOMEM;
3307
3308         if (cnic_init_id_tbl(&cp->csk_port_tbl, CNIC_LOCAL_PORT_RANGE,
3309                              CNIC_LOCAL_PORT_MIN)) {
3310                 cnic_cm_free_mem(dev);
3311                 return -ENOMEM;
3312         }
3313         return 0;
3314 }
3315
3316 static int cnic_ready_to_close(struct cnic_sock *csk, u32 opcode)
3317 {
3318         if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
3319                 /* Unsolicited RESET_COMP or RESET_RECEIVED */
3320                 opcode = L4_KCQE_OPCODE_VALUE_RESET_RECEIVED;
3321                 csk->state = opcode;
3322         }
3323
3324         /* 1. If event opcode matches the expected event in csk->state
3325          * 2. If the expected event is CLOSE_COMP, we accept any event
3326          * 3. If the expected event is 0, meaning the connection was never
3327          *    never established, we accept the opcode from cm_abort.
3328          */
3329         if (opcode == csk->state || csk->state == 0 ||
3330             csk->state == L4_KCQE_OPCODE_VALUE_CLOSE_COMP) {
3331                 if (!test_and_set_bit(SK_F_CLOSING, &csk->flags)) {
3332                         if (csk->state == 0)
3333                                 csk->state = opcode;
3334                         return 1;
3335                 }
3336         }
3337         return 0;
3338 }
3339
3340 static void cnic_close_bnx2_conn(struct cnic_sock *csk, u32 opcode)
3341 {
3342         struct cnic_dev *dev = csk->dev;
3343         struct cnic_local *cp = dev->cnic_priv;
3344
3345         if (opcode == L4_KCQE_OPCODE_VALUE_RESET_RECEIVED) {
3346                 cnic_cm_upcall(cp, csk, opcode);
3347                 return;
3348         }
3349
3350         clear_bit(SK_F_CONNECT_START, &csk->flags);
3351         cnic_close_conn(csk);
3352         csk->state = opcode;
3353         cnic_cm_upcall(cp, csk, opcode);
3354 }
3355
3356 static void cnic_cm_stop_bnx2_hw(struct cnic_dev *dev)
3357 {
3358 }
3359
3360 static int cnic_cm_init_bnx2_hw(struct cnic_dev *dev)
3361 {
3362         u32 seed;
3363
3364         get_random_bytes(&seed, 4);
3365         cnic_ctx_wr(dev, 45, 0, seed);
3366         return 0;
3367 }
3368
3369 static void cnic_close_bnx2x_conn(struct cnic_sock *csk, u32 opcode)
3370 {
3371         struct cnic_dev *dev = csk->dev;
3372         struct cnic_local *cp = dev->cnic_priv;
3373         struct cnic_context *ctx = &cp->ctx_tbl[csk->l5_cid];
3374         union l5cm_specific_data l5_data;
3375         u32 cmd = 0;
3376         int close_complete = 0;
3377
3378         switch (opcode) {
3379         case L4_KCQE_OPCODE_VALUE_RESET_RECEIVED:
3380         case L4_KCQE_OPCODE_VALUE_CLOSE_COMP:
3381         case L4_KCQE_OPCODE_VALUE_RESET_COMP:
3382                 if (cnic_ready_to_close(csk, opcode)) {
3383                         if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags))
3384                                 cmd = L5CM_RAMROD_CMD_ID_SEARCHER_DELETE;
3385                         else
3386                                 close_complete = 1;
3387                 }
3388                 break;
3389         case L5CM_RAMROD_CMD_ID_SEARCHER_DELETE:
3390                 cmd = L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD;
3391                 break;
3392         case L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD:
3393                 close_complete = 1;
3394                 break;
3395         }
3396         if (cmd) {
3397                 memset(&l5_data, 0, sizeof(l5_data));
3398
3399                 cnic_submit_kwqe_16(dev, cmd, csk->cid, ISCSI_CONNECTION_TYPE,
3400                                     &l5_data);
3401         } else if (close_complete) {
3402                 ctx->timestamp = jiffies;
3403                 cnic_close_conn(csk);
3404                 cnic_cm_upcall(cp, csk, csk->state);
3405         }
3406 }
3407
3408 static void cnic_cm_stop_bnx2x_hw(struct cnic_dev *dev)
3409 {
3410         struct cnic_local *cp = dev->cnic_priv;
3411         int i;
3412
3413         if (!cp->ctx_tbl)
3414                 return;
3415
3416         if (!netif_running(dev->netdev))
3417                 return;
3418
3419         for (i = 0; i < cp->max_cid_space; i++) {
3420                 struct cnic_context *ctx = &cp->ctx_tbl[i];
3421
3422                 while (test_bit(CTX_FL_DELETE_WAIT, &ctx->ctx_flags))
3423                         msleep(10);
3424
3425                 if (test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags))
3426                         netdev_warn(dev->netdev, "CID %x not deleted\n",
3427                                    ctx->cid);
3428         }
3429
3430         cancel_delayed_work(&cp->delete_task);
3431         flush_workqueue(cnic_wq);
3432
3433         if (atomic_read(&cp->iscsi_conn) != 0)
3434                 netdev_warn(dev->netdev, "%d iSCSI connections not destroyed\n",
3435                             atomic_read(&cp->iscsi_conn));
3436 }
3437
3438 static int cnic_cm_init_bnx2x_hw(struct cnic_dev *dev)
3439 {
3440         struct cnic_local *cp = dev->cnic_priv;
3441         u32 pfid = cp->pfid;
3442         u32 port = CNIC_PORT(cp);
3443
3444         cnic_init_bnx2x_mac(dev);
3445         cnic_bnx2x_set_tcp_timestamp(dev, 1);
3446
3447         CNIC_WR16(dev, BAR_XSTRORM_INTMEM +
3448                   XSTORM_ISCSI_LOCAL_VLAN_OFFSET(pfid), 0);
3449
3450         CNIC_WR(dev, BAR_XSTRORM_INTMEM +
3451                 XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_ENABLED_OFFSET(port), 1);
3452         CNIC_WR(dev, BAR_XSTRORM_INTMEM +
3453                 XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_MAX_COUNT_OFFSET(port),
3454                 DEF_MAX_DA_COUNT);
3455
3456         CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
3457                  XSTORM_ISCSI_TCP_VARS_TTL_OFFSET(pfid), DEF_TTL);
3458         CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
3459                  XSTORM_ISCSI_TCP_VARS_TOS_OFFSET(pfid), DEF_TOS);
3460         CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
3461                  XSTORM_ISCSI_TCP_VARS_ADV_WND_SCL_OFFSET(pfid), 2);
3462         CNIC_WR(dev, BAR_XSTRORM_INTMEM +
3463                 XSTORM_TCP_TX_SWS_TIMER_VAL_OFFSET(pfid), DEF_SWS_TIMER);
3464
3465         CNIC_WR(dev, BAR_TSTRORM_INTMEM + TSTORM_TCP_MAX_CWND_OFFSET(pfid),
3466                 DEF_MAX_CWND);
3467         return 0;
3468 }
3469
3470 static void cnic_delete_task(struct work_struct *work)
3471 {
3472         struct cnic_local *cp;
3473         struct cnic_dev *dev;
3474         u32 i;
3475         int need_resched = 0;
3476
3477         cp = container_of(work, struct cnic_local, delete_task.work);
3478         dev = cp->dev;
3479
3480         for (i = 0; i < cp->max_cid_space; i++) {
3481                 struct cnic_context *ctx = &cp->ctx_tbl[i];
3482
3483                 if (!test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags) ||
3484                     !test_bit(CTX_FL_DELETE_WAIT, &ctx->ctx_flags))
3485                         continue;
3486
3487                 if (!time_after(jiffies, ctx->timestamp + (2 * HZ))) {
3488                         need_resched = 1;
3489                         continue;
3490                 }
3491
3492                 if (!test_and_clear_bit(CTX_FL_DELETE_WAIT, &ctx->ctx_flags))
3493                         continue;
3494
3495                 cnic_bnx2x_destroy_ramrod(dev, i);
3496
3497                 cnic_free_bnx2x_conn_resc(dev, i);
3498                 if (ctx->ulp_proto_id == CNIC_ULP_ISCSI)
3499                         atomic_dec(&cp->iscsi_conn);
3500
3501                 clear_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags);
3502         }
3503
3504         if (need_resched)
3505                 queue_delayed_work(cnic_wq, &cp->delete_task,
3506                                    msecs_to_jiffies(10));
3507
3508 }
3509
3510 static int cnic_cm_open(struct cnic_dev *dev)
3511 {
3512         struct cnic_local *cp = dev->cnic_priv;
3513         int err;
3514
3515         err = cnic_cm_alloc_mem(dev);
3516         if (err)
3517                 return err;
3518
3519         err = cp->start_cm(dev);
3520
3521         if (err)
3522                 goto err_out;
3523
3524         INIT_DELAYED_WORK(&cp->delete_task, cnic_delete_task);
3525
3526         dev->cm_create = cnic_cm_create;
3527         dev->cm_destroy = cnic_cm_destroy;
3528         dev->cm_connect = cnic_cm_connect;
3529         dev->cm_abort = cnic_cm_abort;
3530         dev->cm_close = cnic_cm_close;
3531         dev->cm_select_dev = cnic_cm_select_dev;
3532
3533         cp->ulp_handle[CNIC_ULP_L4] = dev;
3534         rcu_assign_pointer(cp->ulp_ops[CNIC_ULP_L4], &cm_ulp_ops);
3535         return 0;
3536
3537 err_out:
3538         cnic_cm_free_mem(dev);
3539         return err;
3540 }
3541
3542 static int cnic_cm_shutdown(struct cnic_dev *dev)
3543 {
3544         struct cnic_local *cp = dev->cnic_priv;
3545         int i;
3546
3547         cp->stop_cm(dev);
3548
3549         if (!cp->csk_tbl)
3550                 return 0;
3551
3552         for (i = 0; i < MAX_CM_SK_TBL_SZ; i++) {
3553                 struct cnic_sock *csk = &cp->csk_tbl[i];
3554
3555                 clear_bit(SK_F_INUSE, &csk->flags);
3556                 cnic_cm_cleanup(csk);
3557         }
3558         cnic_cm_free_mem(dev);
3559
3560         return 0;
3561 }
3562
3563 static void cnic_init_context(struct cnic_dev *dev, u32 cid)
3564 {
3565         u32 cid_addr;
3566         int i;
3567
3568         cid_addr = GET_CID_ADDR(cid);
3569
3570         for (i = 0; i < CTX_SIZE; i += 4)
3571                 cnic_ctx_wr(dev, cid_addr, i, 0);
3572 }
3573
3574 static int cnic_setup_5709_context(struct cnic_dev *dev, int valid)
3575 {
3576         struct cnic_local *cp = dev->cnic_priv;
3577         int ret = 0, i;
3578         u32 valid_bit = valid ? BNX2_CTX_HOST_PAGE_TBL_DATA0_VALID : 0;
3579
3580         if (CHIP_NUM(cp) != CHIP_NUM_5709)
3581                 return 0;
3582
3583         for (i = 0; i < cp->ctx_blks; i++) {
3584                 int j;
3585                 u32 idx = cp->ctx_arr[i].cid / cp->cids_per_blk;
3586                 u32 val;
3587
3588                 memset(cp->ctx_arr[i].ctx, 0, BCM_PAGE_SIZE);
3589
3590                 CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_DATA0,
3591                         (cp->ctx_arr[i].mapping & 0xffffffff) | valid_bit);
3592                 CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_DATA1,
3593                         (u64) cp->ctx_arr[i].mapping >> 32);
3594                 CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_CTRL, idx |
3595                         BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ);
3596                 for (j = 0; j < 10; j++) {
3597
3598                         val = CNIC_RD(dev, BNX2_CTX_HOST_PAGE_TBL_CTRL);
3599                         if (!(val & BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ))
3600                                 break;
3601                         udelay(5);
3602                 }
3603                 if (val & BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ) {
3604                         ret = -EBUSY;
3605                         break;
3606                 }
3607         }
3608         return ret;
3609 }
3610
3611 static void cnic_free_irq(struct cnic_dev *dev)
3612 {
3613         struct cnic_local *cp = dev->cnic_priv;
3614         struct cnic_eth_dev *ethdev = cp->ethdev;
3615
3616         if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
3617                 cp->disable_int_sync(dev);
3618                 tasklet_kill(&cp->cnic_irq_task);
3619                 free_irq(ethdev->irq_arr[0].vector, dev);
3620         }
3621 }
3622
3623 static int cnic_request_irq(struct cnic_dev *dev)
3624 {
3625         struct cnic_local *cp = dev->cnic_priv;
3626         struct cnic_eth_dev *ethdev = cp->ethdev;
3627         int err;
3628
3629         err = request_irq(ethdev->irq_arr[0].vector, cnic_irq, 0, "cnic", dev);
3630         if (err)
3631                 tasklet_disable(&cp->cnic_irq_task);
3632
3633         return err;
3634 }
3635
3636 static int cnic_init_bnx2_irq(struct cnic_dev *dev)
3637 {
3638         struct cnic_local *cp = dev->cnic_priv;
3639         struct cnic_eth_dev *ethdev = cp->ethdev;
3640
3641         if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
3642                 int err, i = 0;
3643                 int sblk_num = cp->status_blk_num;
3644                 u32 base = ((sblk_num - 1) * BNX2_HC_SB_CONFIG_SIZE) +
3645                            BNX2_HC_SB_CONFIG_1;
3646
3647                 CNIC_WR(dev, base, BNX2_HC_SB_CONFIG_1_ONE_SHOT);
3648
3649                 CNIC_WR(dev, base + BNX2_HC_COMP_PROD_TRIP_OFF, (2 << 16) | 8);
3650                 CNIC_WR(dev, base + BNX2_HC_COM_TICKS_OFF, (64 << 16) | 220);
3651                 CNIC_WR(dev, base + BNX2_HC_CMD_TICKS_OFF, (64 << 16) | 220);
3652
3653                 cp->last_status_idx = cp->status_blk.bnx2->status_idx;
3654                 tasklet_init(&cp->cnic_irq_task, cnic_service_bnx2_msix,
3655                              (unsigned long) dev);
3656                 err = cnic_request_irq(dev);
3657                 if (err)
3658                         return err;
3659
3660                 while (cp->status_blk.bnx2->status_completion_producer_index &&
3661                        i < 10) {
3662                         CNIC_WR(dev, BNX2_HC_COALESCE_NOW,
3663                                 1 << (11 + sblk_num));
3664                         udelay(10);
3665                         i++;
3666                         barrier();
3667                 }
3668                 if (cp->status_blk.bnx2->status_completion_producer_index) {
3669                         cnic_free_irq(dev);
3670                         goto failed;
3671                 }
3672
3673         } else {
3674                 struct status_block *sblk = cp->status_blk.gen;
3675                 u32 hc_cmd = CNIC_RD(dev, BNX2_HC_COMMAND);
3676                 int i = 0;
3677
3678                 while (sblk->status_completion_producer_index && i < 10) {
3679                         CNIC_WR(dev, BNX2_HC_COMMAND,
3680                                 hc_cmd | BNX2_HC_COMMAND_COAL_NOW_WO_INT);
3681                         udelay(10);
3682                         i++;
3683                         barrier();
3684                 }
3685                 if (sblk->status_completion_producer_index)
3686                         goto failed;
3687
3688         }
3689         return 0;
3690
3691 failed:
3692         netdev_err(dev->netdev, "KCQ index not resetting to 0\n");
3693         return -EBUSY;
3694 }
3695
3696 static void cnic_enable_bnx2_int(struct cnic_dev *dev)
3697 {
3698         struct cnic_local *cp = dev->cnic_priv;
3699         struct cnic_eth_dev *ethdev = cp->ethdev;
3700
3701         if (!(ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX))
3702                 return;
3703
3704         CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
3705                 BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID | cp->last_status_idx);
3706 }
3707
3708 static void cnic_disable_bnx2_int_sync(struct cnic_dev *dev)
3709 {
3710         struct cnic_local *cp = dev->cnic_priv;
3711         struct cnic_eth_dev *ethdev = cp->ethdev;
3712
3713         if (!(ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX))
3714                 return;
3715
3716         CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
3717                 BNX2_PCICFG_INT_ACK_CMD_MASK_INT);
3718         CNIC_RD(dev, BNX2_PCICFG_INT_ACK_CMD);
3719         synchronize_irq(ethdev->irq_arr[0].vector);
3720 }
3721
3722 static void cnic_init_bnx2_tx_ring(struct cnic_dev *dev)
3723 {
3724         struct cnic_local *cp = dev->cnic_priv;
3725         struct cnic_eth_dev *ethdev = cp->ethdev;
3726         struct cnic_uio_dev *udev = cp->udev;
3727         u32 cid_addr, tx_cid, sb_id;
3728         u32 val, offset0, offset1, offset2, offset3;
3729         int i;
3730         struct tx_bd *txbd;
3731         dma_addr_t buf_map, ring_map = udev->l2_ring_map;
3732         struct status_block *s_blk = cp->status_blk.gen;
3733
3734         sb_id = cp->status_blk_num;
3735         tx_cid = 20;
3736         cp->tx_cons_ptr = &s_blk->status_tx_quick_consumer_index2;
3737         if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
3738                 struct status_block_msix *sblk = cp->status_blk.bnx2;
3739
3740                 tx_cid = TX_TSS_CID + sb_id - 1;
3741                 CNIC_WR(dev, BNX2_TSCH_TSS_CFG, (sb_id << 24) |
3742                         (TX_TSS_CID << 7));
3743                 cp->tx_cons_ptr = &sblk->status_tx_quick_consumer_index;
3744         }
3745         cp->tx_cons = *cp->tx_cons_ptr;
3746
3747         cid_addr = GET_CID_ADDR(tx_cid);
3748         if (CHIP_NUM(cp) == CHIP_NUM_5709) {
3749                 u32 cid_addr2 = GET_CID_ADDR(tx_cid + 4) + 0x40;
3750
3751                 for (i = 0; i < PHY_CTX_SIZE; i += 4)
3752                         cnic_ctx_wr(dev, cid_addr2, i, 0);
3753
3754                 offset0 = BNX2_L2CTX_TYPE_XI;
3755                 offset1 = BNX2_L2CTX_CMD_TYPE_XI;
3756                 offset2 = BNX2_L2CTX_TBDR_BHADDR_HI_XI;
3757                 offset3 = BNX2_L2CTX_TBDR_BHADDR_LO_XI;
3758         } else {
3759                 cnic_init_context(dev, tx_cid);
3760                 cnic_init_context(dev, tx_cid + 1);
3761
3762                 offset0 = BNX2_L2CTX_TYPE;
3763                 offset1 = BNX2_L2CTX_CMD_TYPE;
3764                 offset2 = BNX2_L2CTX_TBDR_BHADDR_HI;
3765                 offset3 = BNX2_L2CTX_TBDR_BHADDR_LO;
3766         }
3767         val = BNX2_L2CTX_TYPE_TYPE_L2 | BNX2_L2CTX_TYPE_SIZE_L2;
3768         cnic_ctx_wr(dev, cid_addr, offset0, val);
3769
3770         val = BNX2_L2CTX_CMD_TYPE_TYPE_L2 | (8 << 16);
3771         cnic_ctx_wr(dev, cid_addr, offset1, val);
3772
3773         txbd = (struct tx_bd *) udev->l2_ring;
3774
3775         buf_map = udev->l2_buf_map;
3776         for (i = 0; i < MAX_TX_DESC_CNT; i++, txbd++) {
3777                 txbd->tx_bd_haddr_hi = (u64) buf_map >> 32;
3778                 txbd->tx_bd_haddr_lo = (u64) buf_map & 0xffffffff;
3779         }
3780         val = (u64) ring_map >> 32;
3781         cnic_ctx_wr(dev, cid_addr, offset2, val);
3782         txbd->tx_bd_haddr_hi = val;
3783
3784         val = (u64) ring_map & 0xffffffff;
3785         cnic_ctx_wr(dev, cid_addr, offset3, val);
3786         txbd->tx_bd_haddr_lo = val;
3787 }
3788
3789 static void cnic_init_bnx2_rx_ring(struct cnic_dev *dev)
3790 {
3791         struct cnic_local *cp = dev->cnic_priv;
3792         struct cnic_eth_dev *ethdev = cp->ethdev;
3793         struct cnic_uio_dev *udev = cp->udev;
3794         u32 cid_addr, sb_id, val, coal_reg, coal_val;
3795         int i;
3796         struct rx_bd *rxbd;
3797         struct status_block *s_blk = cp->status_blk.gen;
3798         dma_addr_t ring_map = udev->l2_ring_map;
3799
3800         sb_id = cp->status_blk_num;
3801         cnic_init_context(dev, 2);
3802         cp->rx_cons_ptr = &s_blk->status_rx_quick_consumer_index2;
3803         coal_reg = BNX2_HC_COMMAND;
3804         coal_val = CNIC_RD(dev, coal_reg);
3805         if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
3806                 struct status_block_msix *sblk = cp->status_blk.bnx2;
3807
3808                 cp->rx_cons_ptr = &sblk->status_rx_quick_consumer_index;
3809                 coal_reg = BNX2_HC_COALESCE_NOW;
3810                 coal_val = 1 << (11 + sb_id);
3811         }
3812         i = 0;
3813         while (!(*cp->rx_cons_ptr != 0) && i < 10) {
3814                 CNIC_WR(dev, coal_reg, coal_val);
3815                 udelay(10);
3816                 i++;
3817                 barrier();
3818         }
3819         cp->rx_cons = *cp->rx_cons_ptr;
3820
3821         cid_addr = GET_CID_ADDR(2);
3822         val = BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE_VALUE |
3823               BNX2_L2CTX_CTX_TYPE_SIZE_L2 | (0x02 << 8);
3824         cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_CTX_TYPE, val);
3825
3826         if (sb_id == 0)
3827                 val = 2 << BNX2_L2CTX_L2_STATUSB_NUM_SHIFT;
3828         else
3829                 val = BNX2_L2CTX_L2_STATUSB_NUM(sb_id);
3830         cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_HOST_BDIDX, val);
3831
3832         rxbd = (struct rx_bd *) (udev->l2_ring + BCM_PAGE_SIZE);
3833         for (i = 0; i < MAX_RX_DESC_CNT; i++, rxbd++) {
3834                 dma_addr_t buf_map;
3835                 int n = (i % cp->l2_rx_ring_size) + 1;
3836
3837                 buf_map = udev->l2_buf_map + (n * cp->l2_single_buf_size);
3838                 rxbd->rx_bd_len = cp->l2_single_buf_size;
3839                 rxbd->rx_bd_flags = RX_BD_FLAGS_START | RX_BD_FLAGS_END;
3840                 rxbd->rx_bd_haddr_hi = (u64) buf_map >> 32;
3841                 rxbd->rx_bd_haddr_lo = (u64) buf_map & 0xffffffff;
3842         }
3843         val = (u64) (ring_map + BCM_PAGE_SIZE) >> 32;
3844         cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_NX_BDHADDR_HI, val);
3845         rxbd->rx_bd_haddr_hi = val;
3846
3847         val = (u64) (ring_map + BCM_PAGE_SIZE) & 0xffffffff;
3848         cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_NX_BDHADDR_LO, val);
3849         rxbd->rx_bd_haddr_lo = val;
3850
3851         val = cnic_reg_rd_ind(dev, BNX2_RXP_SCRATCH_RXP_FLOOD);
3852         cnic_reg_wr_ind(dev, BNX2_RXP_SCRATCH_RXP_FLOOD, val | (1 << 2));
3853 }
3854
3855 static void cnic_shutdown_bnx2_rx_ring(struct cnic_dev *dev)
3856 {
3857         struct kwqe *wqes[1], l2kwqe;
3858
3859         memset(&l2kwqe, 0, sizeof(l2kwqe));
3860         wqes[0] = &l2kwqe;
3861         l2kwqe.kwqe_op_flag = (L2_LAYER_CODE << KWQE_FLAGS_LAYER_SHIFT) |
3862                               (L2_KWQE_OPCODE_VALUE_FLUSH <<
3863                                KWQE_OPCODE_SHIFT) | 2;
3864         dev->submit_kwqes(dev, wqes, 1);
3865 }
3866
3867 static void cnic_set_bnx2_mac(struct cnic_dev *dev)
3868 {
3869         struct cnic_local *cp = dev->cnic_priv;
3870         u32 val;
3871
3872         val = cp->func << 2;
3873
3874         cp->shmem_base = cnic_reg_rd_ind(dev, BNX2_SHM_HDR_ADDR_0 + val);
3875
3876         val = cnic_reg_rd_ind(dev, cp->shmem_base +
3877                               BNX2_PORT_HW_CFG_ISCSI_MAC_UPPER);
3878         dev->mac_addr[0] = (u8) (val >> 8);
3879         dev->mac_addr[1] = (u8) val;
3880
3881         CNIC_WR(dev, BNX2_EMAC_MAC_MATCH4, val);
3882
3883         val = cnic_reg_rd_ind(dev, cp->shmem_base +
3884                               BNX2_PORT_HW_CFG_ISCSI_MAC_LOWER);
3885         dev->mac_addr[2] = (u8) (val >> 24);
3886         dev->mac_addr[3] = (u8) (val >> 16);
3887         dev->mac_addr[4] = (u8) (val >> 8);
3888         dev->mac_addr[5] = (u8) val;
3889
3890         CNIC_WR(dev, BNX2_EMAC_MAC_MATCH5, val);
3891
3892         val = 4 | BNX2_RPM_SORT_USER2_BC_EN;
3893         if (CHIP_NUM(cp) != CHIP_NUM_5709)
3894                 val |= BNX2_RPM_SORT_USER2_PROM_VLAN;
3895
3896         CNIC_WR(dev, BNX2_RPM_SORT_USER2, 0x0);
3897         CNIC_WR(dev, BNX2_RPM_SORT_USER2, val);
3898         CNIC_WR(dev, BNX2_RPM_SORT_USER2, val | BNX2_RPM_SORT_USER2_ENA);
3899 }
3900
3901 static int cnic_start_bnx2_hw(struct cnic_dev *dev)
3902 {
3903         struct cnic_local *cp = dev->cnic_priv;
3904         struct cnic_eth_dev *ethdev = cp->ethdev;
3905         struct status_block *sblk = cp->status_blk.gen;
3906         u32 val, kcq_cid_addr, kwq_cid_addr;
3907         int err;
3908
3909         cnic_set_bnx2_mac(dev);
3910
3911         val = CNIC_RD(dev, BNX2_MQ_CONFIG);
3912         val &= ~BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE;
3913         if (BCM_PAGE_BITS > 12)
3914                 val |= (12 - 8)  << 4;
3915         else
3916                 val |= (BCM_PAGE_BITS - 8)  << 4;
3917
3918         CNIC_WR(dev, BNX2_MQ_CONFIG, val);
3919
3920         CNIC_WR(dev, BNX2_HC_COMP_PROD_TRIP, (2 << 16) | 8);
3921         CNIC_WR(dev, BNX2_HC_COM_TICKS, (64 << 16) | 220);
3922         CNIC_WR(dev, BNX2_HC_CMD_TICKS, (64 << 16) | 220);
3923
3924         err = cnic_setup_5709_context(dev, 1);
3925         if (err)
3926                 return err;
3927
3928         cnic_init_context(dev, KWQ_CID);
3929         cnic_init_context(dev, KCQ_CID);
3930
3931         kwq_cid_addr = GET_CID_ADDR(KWQ_CID);
3932         cp->kwq_io_addr = MB_GET_CID_ADDR(KWQ_CID) + L5_KRNLQ_HOST_QIDX;
3933
3934         cp->max_kwq_idx = MAX_KWQ_IDX;
3935         cp->kwq_prod_idx = 0;
3936         cp->kwq_con_idx = 0;
3937         set_bit(CNIC_LCL_FL_KWQ_INIT, &cp->cnic_local_flags);
3938
3939         if (CHIP_NUM(cp) == CHIP_NUM_5706 || CHIP_NUM(cp) == CHIP_NUM_5708)
3940                 cp->kwq_con_idx_ptr = &sblk->status_rx_quick_consumer_index15;
3941         else
3942                 cp->kwq_con_idx_ptr = &sblk->status_cmd_consumer_index;
3943
3944         /* Initialize the kernel work queue context. */
3945         val = KRNLQ_TYPE_TYPE_KRNLQ | KRNLQ_SIZE_TYPE_SIZE |
3946               (BCM_PAGE_BITS - 8) | KRNLQ_FLAGS_QE_SELF_SEQ;
3947         cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_TYPE, val);
3948
3949         val = (BCM_PAGE_SIZE / sizeof(struct kwqe) - 1) << 16;
3950         cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_QE_SELF_SEQ_MAX, val);
3951
3952         val = ((BCM_PAGE_SIZE / sizeof(struct kwqe)) << 16) | KWQ_PAGE_CNT;
3953         cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_PGTBL_NPAGES, val);
3954
3955         val = (u32) ((u64) cp->kwq_info.pgtbl_map >> 32);
3956         cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_PGTBL_HADDR_HI, val);
3957
3958         val = (u32) cp->kwq_info.pgtbl_map;
3959         cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_PGTBL_HADDR_LO, val);
3960
3961         kcq_cid_addr = GET_CID_ADDR(KCQ_CID);
3962         cp->kcq1.io_addr = MB_GET_CID_ADDR(KCQ_CID) + L5_KRNLQ_HOST_QIDX;
3963
3964         cp->kcq1.sw_prod_idx = 0;
3965         cp->kcq1.hw_prod_idx_ptr =
3966                 (u16 *) &sblk->status_completion_producer_index;
3967
3968         cp->kcq1.status_idx_ptr = (u16 *) &sblk->status_idx;
3969
3970         /* Initialize the kernel complete queue context. */
3971         val = KRNLQ_TYPE_TYPE_KRNLQ | KRNLQ_SIZE_TYPE_SIZE |
3972               (BCM_PAGE_BITS - 8) | KRNLQ_FLAGS_QE_SELF_SEQ;
3973         cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_TYPE, val);
3974
3975         val = (BCM_PAGE_SIZE / sizeof(struct kcqe) - 1) << 16;
3976         cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_QE_SELF_SEQ_MAX, val);
3977
3978         val = ((BCM_PAGE_SIZE / sizeof(struct kcqe)) << 16) | KCQ_PAGE_CNT;
3979         cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_PGTBL_NPAGES, val);
3980
3981         val = (u32) ((u64) cp->kcq1.dma.pgtbl_map >> 32);
3982         cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_PGTBL_HADDR_HI, val);
3983
3984         val = (u32) cp->kcq1.dma.pgtbl_map;
3985         cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_PGTBL_HADDR_LO, val);
3986
3987         cp->int_num = 0;
3988         if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
3989                 struct status_block_msix *msblk = cp->status_blk.bnx2;
3990                 u32 sb_id = cp->status_blk_num;
3991                 u32 sb = BNX2_L2CTX_L5_STATUSB_NUM(sb_id);
3992
3993                 cp->kcq1.hw_prod_idx_ptr =
3994                         (u16 *) &msblk->status_completion_producer_index;
3995                 cp->kcq1.status_idx_ptr = (u16 *) &msblk->status_idx;
3996                 cp->kwq_con_idx_ptr = (u16 *) &msblk->status_cmd_consumer_index;
3997                 cp->int_num = sb_id << BNX2_PCICFG_INT_ACK_CMD_INT_NUM_SHIFT;
3998                 cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_HOST_QIDX, sb);
3999                 cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_HOST_QIDX, sb);
4000         }
4001
4002         /* Enable Commnad Scheduler notification when we write to the
4003          * host producer index of the kernel contexts. */
4004         CNIC_WR(dev, BNX2_MQ_KNL_CMD_MASK1, 2);
4005
4006         /* Enable Command Scheduler notification when we write to either
4007          * the Send Queue or Receive Queue producer indexes of the kernel
4008          * bypass contexts. */
4009         CNIC_WR(dev, BNX2_MQ_KNL_BYP_CMD_MASK1, 7);
4010         CNIC_WR(dev, BNX2_MQ_KNL_BYP_WRITE_MASK1, 7);
4011
4012         /* Notify COM when the driver post an application buffer. */
4013         CNIC_WR(dev, BNX2_MQ_KNL_RX_V2P_MASK2, 0x2000);
4014
4015         /* Set the CP and COM doorbells.  These two processors polls the
4016          * doorbell for a non zero value before running.  This must be done
4017          * after setting up the kernel queue contexts. */
4018         cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 1);
4019         cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 1);
4020
4021         cnic_init_bnx2_tx_ring(dev);
4022         cnic_init_bnx2_rx_ring(dev);
4023
4024         err = cnic_init_bnx2_irq(dev);
4025         if (err) {
4026                 netdev_err(dev->netdev, "cnic_init_irq failed\n");
4027                 cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 0);
4028                 cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 0);
4029                 return err;
4030         }
4031
4032         return 0;
4033 }
4034
4035 static void cnic_setup_bnx2x_context(struct cnic_dev *dev)
4036 {
4037         struct cnic_local *cp = dev->cnic_priv;
4038         struct cnic_eth_dev *ethdev = cp->ethdev;
4039         u32 start_offset = ethdev->ctx_tbl_offset;
4040         int i;
4041
4042         for (i = 0; i < cp->ctx_blks; i++) {
4043                 struct cnic_ctx *ctx = &cp->ctx_arr[i];
4044                 dma_addr_t map = ctx->mapping;
4045
4046                 if (cp->ctx_align) {
4047                         unsigned long mask = cp->ctx_align - 1;
4048
4049                         map = (map + mask) & ~mask;
4050                 }
4051
4052                 cnic_ctx_tbl_wr(dev, start_offset + i, map);
4053         }
4054 }
4055
4056 static int cnic_init_bnx2x_irq(struct cnic_dev *dev)
4057 {
4058         struct cnic_local *cp = dev->cnic_priv;
4059         struct cnic_eth_dev *ethdev = cp->ethdev;
4060         int err = 0;
4061
4062         tasklet_init(&cp->cnic_irq_task, cnic_service_bnx2x_bh,
4063                      (unsigned long) dev);
4064         if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX)
4065                 err = cnic_request_irq(dev);
4066
4067         return err;
4068 }
4069
4070 static inline void cnic_storm_memset_hc_disable(struct cnic_dev *dev,
4071                                                 u16 sb_id, u8 sb_index,
4072                                                 u8 disable)
4073 {
4074
4075         u32 addr = BAR_CSTRORM_INTMEM +
4076                         CSTORM_STATUS_BLOCK_DATA_OFFSET(sb_id) +
4077                         offsetof(struct hc_status_block_data_e1x, index_data) +
4078                         sizeof(struct hc_index_data)*sb_index +
4079                         offsetof(struct hc_index_data, flags);
4080         u16 flags = CNIC_RD16(dev, addr);
4081         /* clear and set */
4082         flags &= ~HC_INDEX_DATA_HC_ENABLED;
4083         flags |= (((~disable) << HC_INDEX_DATA_HC_ENABLED_SHIFT) &
4084                   HC_INDEX_DATA_HC_ENABLED);
4085         CNIC_WR16(dev, addr, flags);
4086 }
4087
4088 static void cnic_enable_bnx2x_int(struct cnic_dev *dev)
4089 {
4090         struct cnic_local *cp = dev->cnic_priv;
4091         u8 sb_id = cp->status_blk_num;
4092
4093         CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
4094                         CSTORM_STATUS_BLOCK_DATA_OFFSET(sb_id) +
4095                         offsetof(struct hc_status_block_data_e1x, index_data) +
4096                         sizeof(struct hc_index_data)*HC_INDEX_ISCSI_EQ_CONS +
4097                         offsetof(struct hc_index_data, timeout), 64 / 12);
4098         cnic_storm_memset_hc_disable(dev, sb_id, HC_INDEX_ISCSI_EQ_CONS, 0);
4099 }
4100
4101 static void cnic_disable_bnx2x_int_sync(struct cnic_dev *dev)
4102 {
4103 }
4104
4105 static void cnic_init_bnx2x_tx_ring(struct cnic_dev *dev,
4106                                     struct client_init_ramrod_data *data)
4107 {
4108         struct cnic_local *cp = dev->cnic_priv;
4109         struct cnic_uio_dev *udev = cp->udev;
4110         union eth_tx_bd_types *txbd = (union eth_tx_bd_types *) udev->l2_ring;
4111         dma_addr_t buf_map, ring_map = udev->l2_ring_map;
4112         struct host_sp_status_block *sb = cp->bnx2x_def_status_blk;
4113         int port = CNIC_PORT(cp);
4114         int i;
4115         int cli = BNX2X_ISCSI_CL_ID(CNIC_E1HVN(cp));
4116         u32 val;
4117
4118         memset(txbd, 0, BCM_PAGE_SIZE);
4119
4120         buf_map = udev->l2_buf_map;
4121         for (i = 0; i < MAX_TX_DESC_CNT; i += 3, txbd += 3) {
4122                 struct eth_tx_start_bd *start_bd = &txbd->start_bd;
4123                 struct eth_tx_bd *reg_bd = &((txbd + 2)->reg_bd);
4124
4125                 start_bd->addr_hi = cpu_to_le32((u64) buf_map >> 32);
4126                 start_bd->addr_lo = cpu_to_le32(buf_map & 0xffffffff);
4127                 reg_bd->addr_hi = start_bd->addr_hi;
4128                 reg_bd->addr_lo = start_bd->addr_lo + 0x10;
4129                 start_bd->nbytes = cpu_to_le16(0x10);
4130                 start_bd->nbd = cpu_to_le16(3);
4131                 start_bd->bd_flags.as_bitfield = ETH_TX_BD_FLAGS_START_BD;
4132                 start_bd->general_data = (UNICAST_ADDRESS <<
4133                         ETH_TX_START_BD_ETH_ADDR_TYPE_SHIFT);
4134                 start_bd->general_data |= (1 << ETH_TX_START_BD_HDR_NBDS_SHIFT);
4135
4136         }
4137
4138         val = (u64) ring_map >> 32;
4139         txbd->next_bd.addr_hi = cpu_to_le32(val);
4140
4141         data->tx.tx_bd_page_base.hi = cpu_to_le32(val);
4142
4143         val = (u64) ring_map & 0xffffffff;
4144         txbd->next_bd.addr_lo = cpu_to_le32(val);
4145
4146         data->tx.tx_bd_page_base.lo = cpu_to_le32(val);
4147
4148         /* Other ramrod params */
4149         data->tx.tx_sb_index_number = HC_SP_INDEX_ETH_ISCSI_CQ_CONS;
4150         data->tx.tx_status_block_id = BNX2X_DEF_SB_ID;
4151
4152         /* reset xstorm per client statistics */
4153         if (cli < MAX_STAT_COUNTER_ID) {
4154                 val = BAR_XSTRORM_INTMEM +
4155                       XSTORM_PER_COUNTER_ID_STATS_OFFSET(port, cli);
4156                 for (i = 0; i < sizeof(struct xstorm_per_client_stats) / 4; i++)
4157                         CNIC_WR(dev, val + i * 4, 0);
4158         }
4159
4160         cp->tx_cons_ptr =
4161                 &sb->sp_sb.index_values[HC_SP_INDEX_ETH_ISCSI_CQ_CONS];
4162 }
4163
4164 static void cnic_init_bnx2x_rx_ring(struct cnic_dev *dev,
4165                                     struct client_init_ramrod_data *data)
4166 {
4167         struct cnic_local *cp = dev->cnic_priv;
4168         struct cnic_uio_dev *udev = cp->udev;
4169         struct eth_rx_bd *rxbd = (struct eth_rx_bd *) (udev->l2_ring +
4170                                 BCM_PAGE_SIZE);
4171         struct eth_rx_cqe_next_page *rxcqe = (struct eth_rx_cqe_next_page *)
4172                                 (udev->l2_ring + (2 * BCM_PAGE_SIZE));
4173         struct host_sp_status_block *sb = cp->bnx2x_def_status_blk;
4174         int i;
4175         int port = CNIC_PORT(cp);
4176         int cli = BNX2X_ISCSI_CL_ID(CNIC_E1HVN(cp));
4177         int cl_qzone_id = BNX2X_CL_QZONE_ID(cp, cli);
4178         u32 val;
4179         dma_addr_t ring_map = udev->l2_ring_map;
4180
4181         /* General data */
4182         data->general.client_id = cli;
4183         data->general.statistics_en_flg = 1;
4184         data->general.statistics_counter_id = cli;
4185         data->general.activate_flg = 1;
4186         data->general.sp_client_id = cli;
4187
4188         for (i = 0; i < BNX2X_MAX_RX_DESC_CNT; i++, rxbd++) {
4189                 dma_addr_t buf_map;
4190                 int n = (i % cp->l2_rx_ring_size) + 1;
4191
4192                 buf_map = udev->l2_buf_map + (n * cp->l2_single_buf_size);
4193                 rxbd->addr_hi = cpu_to_le32((u64) buf_map >> 32);
4194                 rxbd->addr_lo = cpu_to_le32(buf_map & 0xffffffff);
4195         }
4196
4197         val = (u64) (ring_map + BCM_PAGE_SIZE) >> 32;
4198         rxbd->addr_hi = cpu_to_le32(val);
4199         data->rx.bd_page_base.hi = cpu_to_le32(val);
4200
4201         val = (u64) (ring_map + BCM_PAGE_SIZE) & 0xffffffff;
4202         rxbd->addr_lo = cpu_to_le32(val);
4203         data->rx.bd_page_base.lo = cpu_to_le32(val);
4204
4205         rxcqe += BNX2X_MAX_RCQ_DESC_CNT;
4206         val = (u64) (ring_map + (2 * BCM_PAGE_SIZE)) >> 32;
4207         rxcqe->addr_hi = cpu_to_le32(val);
4208         data->rx.cqe_page_base.hi = cpu_to_le32(val);
4209
4210         val = (u64) (ring_map + (2 * BCM_PAGE_SIZE)) & 0xffffffff;
4211         rxcqe->addr_lo = cpu_to_le32(val);
4212         data->rx.cqe_page_base.lo = cpu_to_le32(val);
4213
4214         /* Other ramrod params */
4215         data->rx.client_qzone_id = cl_qzone_id;
4216         data->rx.rx_sb_index_number = HC_SP_INDEX_ETH_ISCSI_RX_CQ_CONS;
4217         data->rx.status_block_id = BNX2X_DEF_SB_ID;
4218
4219         data->rx.cache_line_alignment_log_size = L1_CACHE_SHIFT;
4220         data->rx.bd_buff_size = cpu_to_le16(cp->l2_single_buf_size);
4221
4222         data->rx.mtu = cpu_to_le16(cp->l2_single_buf_size - 14);
4223         data->rx.outer_vlan_removal_enable_flg = 1;
4224
4225         /* reset tstorm and ustorm per client statistics */
4226         if (cli < MAX_STAT_COUNTER_ID) {
4227                 val = BAR_TSTRORM_INTMEM +
4228                       TSTORM_PER_COUNTER_ID_STATS_OFFSET(port, cli);
4229                 for (i = 0; i < sizeof(struct tstorm_per_client_stats) / 4; i++)
4230                         CNIC_WR(dev, val + i * 4, 0);
4231
4232                 val = BAR_USTRORM_INTMEM +
4233                       USTORM_PER_COUNTER_ID_STATS_OFFSET(port, cli);
4234                 for (i = 0; i < sizeof(struct ustorm_per_client_stats) / 4; i++)
4235                         CNIC_WR(dev, val + i * 4, 0);
4236         }
4237
4238         cp->rx_cons_ptr =
4239                 &sb->sp_sb.index_values[HC_SP_INDEX_ETH_ISCSI_RX_CQ_CONS];
4240 }
4241
4242 static void cnic_get_bnx2x_iscsi_info(struct cnic_dev *dev)
4243 {
4244         struct cnic_local *cp = dev->cnic_priv;
4245         u32 base, base2, addr, val;
4246         int port = CNIC_PORT(cp);
4247
4248         dev->max_iscsi_conn = 0;
4249         base = CNIC_RD(dev, MISC_REG_SHARED_MEM_ADDR);
4250         if (base == 0)
4251                 return;
4252
4253         base2 = CNIC_RD(dev, (CNIC_PATH(cp) ? MISC_REG_GENERIC_CR_1 :
4254                                               MISC_REG_GENERIC_CR_0));
4255         addr = BNX2X_SHMEM_ADDR(base,
4256                 dev_info.port_hw_config[port].iscsi_mac_upper);
4257
4258         val = CNIC_RD(dev, addr);
4259
4260         dev->mac_addr[0] = (u8) (val >> 8);
4261         dev->mac_addr[1] = (u8) val;
4262
4263         addr = BNX2X_SHMEM_ADDR(base,
4264                 dev_info.port_hw_config[port].iscsi_mac_lower);
4265
4266         val = CNIC_RD(dev, addr);
4267
4268         dev->mac_addr[2] = (u8) (val >> 24);
4269         dev->mac_addr[3] = (u8) (val >> 16);
4270         dev->mac_addr[4] = (u8) (val >> 8);
4271         dev->mac_addr[5] = (u8) val;
4272
4273         addr = BNX2X_SHMEM_ADDR(base, validity_map[port]);
4274         val = CNIC_RD(dev, addr);
4275
4276         if (!(val & SHR_MEM_VALIDITY_LIC_NO_KEY_IN_EFFECT)) {
4277                 u16 val16;
4278
4279                 addr = BNX2X_SHMEM_ADDR(base,
4280                                 drv_lic_key[port].max_iscsi_init_conn);
4281                 val16 = CNIC_RD16(dev, addr);
4282
4283                 if (val16)
4284                         val16 ^= 0x1e1e;
4285                 dev->max_iscsi_conn = val16;
4286         }
4287         if (BNX2X_CHIP_IS_E1H(cp->chip_id) || BNX2X_CHIP_IS_E2(cp->chip_id)) {
4288                 int func = CNIC_FUNC(cp);
4289                 u32 mf_cfg_addr;
4290
4291                 if (BNX2X_SHMEM2_HAS(base2, mf_cfg_addr))
4292                         mf_cfg_addr = CNIC_RD(dev, BNX2X_SHMEM2_ADDR(base2,
4293                                               mf_cfg_addr));
4294                 else
4295                         mf_cfg_addr = base + BNX2X_SHMEM_MF_BLK_OFFSET;
4296
4297                 addr = mf_cfg_addr +
4298                         offsetof(struct mf_cfg, func_mf_config[func].e1hov_tag);
4299
4300                 val = CNIC_RD(dev, addr);
4301                 val &= FUNC_MF_CFG_E1HOV_TAG_MASK;
4302                 if (val != FUNC_MF_CFG_E1HOV_TAG_DEFAULT) {
4303                         addr = mf_cfg_addr +
4304                                 offsetof(struct mf_cfg,
4305                                          func_mf_config[func].config);
4306                         val = CNIC_RD(dev, addr);
4307                         val &= FUNC_MF_CFG_PROTOCOL_MASK;
4308                         if (val != FUNC_MF_CFG_PROTOCOL_ISCSI)
4309                                 dev->max_iscsi_conn = 0;
4310                 }
4311         }
4312 }
4313
4314 static int cnic_start_bnx2x_hw(struct cnic_dev *dev)
4315 {
4316         struct cnic_local *cp = dev->cnic_priv;
4317         struct cnic_eth_dev *ethdev = cp->ethdev;
4318         int func = CNIC_FUNC(cp), ret, i;
4319         u32 pfid;
4320
4321         if (BNX2X_CHIP_IS_E2(cp->chip_id)) {
4322                 u32 val = CNIC_RD(dev, MISC_REG_PORT4MODE_EN_OVWR);
4323
4324                 if (!(val & 1))
4325                         val = CNIC_RD(dev, MISC_REG_PORT4MODE_EN);
4326                 else
4327                         val = (val >> 1) & 1;
4328
4329                 if (val)
4330                         cp->pfid = func >> 1;
4331                 else
4332                         cp->pfid = func & 0x6;
4333         } else {
4334                 cp->pfid = func;
4335         }
4336         pfid = cp->pfid;
4337
4338         ret = cnic_init_id_tbl(&cp->cid_tbl, MAX_ISCSI_TBL_SZ,
4339                                cp->iscsi_start_cid);
4340
4341         if (ret)
4342                 return -ENOMEM;
4343
4344         cp->bnx2x_igu_sb_id = ethdev->irq_arr[0].status_blk_num2;
4345
4346         cp->kcq1.io_addr = BAR_CSTRORM_INTMEM +
4347                           CSTORM_ISCSI_EQ_PROD_OFFSET(pfid, 0);
4348         cp->kcq1.sw_prod_idx = 0;
4349
4350         if (BNX2X_CHIP_IS_E2(cp->chip_id)) {
4351                 struct host_hc_status_block_e2 *sb = cp->status_blk.gen;
4352
4353                 cp->kcq1.hw_prod_idx_ptr =
4354                         &sb->sb.index_values[HC_INDEX_ISCSI_EQ_CONS];
4355                 cp->kcq1.status_idx_ptr =
4356                         &sb->sb.running_index[SM_RX_ID];
4357         } else {
4358                 struct host_hc_status_block_e1x *sb = cp->status_blk.gen;
4359
4360                 cp->kcq1.hw_prod_idx_ptr =
4361                         &sb->sb.index_values[HC_INDEX_ISCSI_EQ_CONS];
4362                 cp->kcq1.status_idx_ptr =
4363                         &sb->sb.running_index[SM_RX_ID];
4364         }
4365
4366         cnic_get_bnx2x_iscsi_info(dev);
4367
4368         /* Only 1 EQ */
4369         CNIC_WR16(dev, cp->kcq1.io_addr, MAX_KCQ_IDX);
4370         CNIC_WR(dev, BAR_CSTRORM_INTMEM +
4371                 CSTORM_ISCSI_EQ_CONS_OFFSET(pfid, 0), 0);
4372         CNIC_WR(dev, BAR_CSTRORM_INTMEM +
4373                 CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_OFFSET(pfid, 0),
4374                 cp->kcq1.dma.pg_map_arr[1] & 0xffffffff);
4375         CNIC_WR(dev, BAR_CSTRORM_INTMEM +
4376                 CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_OFFSET(pfid, 0) + 4,
4377                 (u64) cp->kcq1.dma.pg_map_arr[1] >> 32);
4378         CNIC_WR(dev, BAR_CSTRORM_INTMEM +
4379                 CSTORM_ISCSI_EQ_NEXT_EQE_ADDR_OFFSET(pfid, 0),
4380                 cp->kcq1.dma.pg_map_arr[0] & 0xffffffff);
4381         CNIC_WR(dev, BAR_CSTRORM_INTMEM +
4382                 CSTORM_ISCSI_EQ_NEXT_EQE_ADDR_OFFSET(pfid, 0) + 4,
4383                 (u64) cp->kcq1.dma.pg_map_arr[0] >> 32);
4384         CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
4385                 CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_VALID_OFFSET(pfid, 0), 1);
4386         CNIC_WR16(dev, BAR_CSTRORM_INTMEM +
4387                 CSTORM_ISCSI_EQ_SB_NUM_OFFSET(pfid, 0), cp->status_blk_num);
4388         CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
4389                 CSTORM_ISCSI_EQ_SB_INDEX_OFFSET(pfid, 0),
4390                 HC_INDEX_ISCSI_EQ_CONS);
4391
4392         for (i = 0; i < cp->conn_buf_info.num_pages; i++) {
4393                 CNIC_WR(dev, BAR_TSTRORM_INTMEM +
4394                         TSTORM_ISCSI_CONN_BUF_PBL_OFFSET(pfid, i),
4395                         cp->conn_buf_info.pgtbl[2 * i]);
4396                 CNIC_WR(dev, BAR_TSTRORM_INTMEM +
4397                         TSTORM_ISCSI_CONN_BUF_PBL_OFFSET(pfid, i) + 4,
4398                         cp->conn_buf_info.pgtbl[(2 * i) + 1]);
4399         }
4400
4401         CNIC_WR(dev, BAR_USTRORM_INTMEM +
4402                 USTORM_ISCSI_GLOBAL_BUF_PHYS_ADDR_OFFSET(pfid),
4403                 cp->gbl_buf_info.pg_map_arr[0] & 0xffffffff);
4404         CNIC_WR(dev, BAR_USTRORM_INTMEM +
4405                 USTORM_ISCSI_GLOBAL_BUF_PHYS_ADDR_OFFSET(pfid) + 4,
4406                 (u64) cp->gbl_buf_info.pg_map_arr[0] >> 32);
4407
4408         CNIC_WR(dev, BAR_TSTRORM_INTMEM +
4409                 TSTORM_ISCSI_TCP_LOCAL_ADV_WND_OFFSET(pfid), DEF_RCV_BUF);
4410
4411         cnic_setup_bnx2x_context(dev);
4412
4413         ret = cnic_init_bnx2x_irq(dev);
4414         if (ret)
4415                 return ret;
4416
4417         return 0;
4418 }
4419
4420 static void cnic_init_rings(struct cnic_dev *dev)
4421 {
4422         struct cnic_local *cp = dev->cnic_priv;
4423         struct cnic_uio_dev *udev = cp->udev;
4424
4425         if (test_bit(CNIC_LCL_FL_RINGS_INITED, &cp->cnic_local_flags))
4426                 return;
4427
4428         if (test_bit(CNIC_F_BNX2_CLASS, &dev->flags)) {
4429                 cnic_init_bnx2_tx_ring(dev);
4430                 cnic_init_bnx2_rx_ring(dev);
4431                 set_bit(CNIC_LCL_FL_RINGS_INITED, &cp->cnic_local_flags);
4432         } else if (test_bit(CNIC_F_BNX2X_CLASS, &dev->flags)) {
4433                 u32 cli = BNX2X_ISCSI_CL_ID(CNIC_E1HVN(cp));
4434                 u32 cl_qzone_id, type;
4435                 struct client_init_ramrod_data *data;
4436                 union l5cm_specific_data l5_data;
4437                 struct ustorm_eth_rx_producers rx_prods = {0};
4438                 u32 off, i;
4439
4440                 rx_prods.bd_prod = 0;
4441                 rx_prods.cqe_prod = BNX2X_MAX_RCQ_DESC_CNT;
4442                 barrier();
4443
4444                 cl_qzone_id = BNX2X_CL_QZONE_ID(cp, cli);
4445
4446                 off = BAR_USTRORM_INTMEM +
4447                         (BNX2X_CHIP_IS_E2(cp->chip_id) ?
4448                          USTORM_RX_PRODS_E2_OFFSET(cl_qzone_id) :
4449                          USTORM_RX_PRODS_E1X_OFFSET(CNIC_PORT(cp), cli));
4450
4451                 for (i = 0; i < sizeof(struct ustorm_eth_rx_producers) / 4; i++)
4452                         CNIC_WR(dev, off + i * 4, ((u32 *) &rx_prods)[i]);
4453
4454                 set_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags);
4455
4456                 data = udev->l2_buf;
4457
4458                 memset(data, 0, sizeof(*data));
4459
4460                 cnic_init_bnx2x_tx_ring(dev, data);
4461                 cnic_init_bnx2x_rx_ring(dev, data);
4462
4463                 l5_data.phy_address.lo = udev->l2_buf_map & 0xffffffff;
4464                 l5_data.phy_address.hi = (u64) udev->l2_buf_map >> 32;
4465
4466                 type = (ETH_CONNECTION_TYPE << SPE_HDR_CONN_TYPE_SHIFT)
4467                         & SPE_HDR_CONN_TYPE;
4468                 type |= ((cp->pfid << SPE_HDR_FUNCTION_ID_SHIFT) &
4469                         SPE_HDR_FUNCTION_ID);
4470
4471                 set_bit(CNIC_LCL_FL_RINGS_INITED, &cp->cnic_local_flags);
4472
4473                 cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_ETH_CLIENT_SETUP,
4474                         BNX2X_ISCSI_L2_CID, type, &l5_data);
4475
4476                 i = 0;
4477                 while (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags) &&
4478                        ++i < 10)
4479                         msleep(1);
4480
4481                 if (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags))
4482                         netdev_err(dev->netdev,
4483                                 "iSCSI CLIENT_SETUP did not complete\n");
4484                 cnic_spq_completion(dev, DRV_CTL_RET_L2_SPQ_CREDIT_CMD, 1);
4485                 cnic_ring_ctl(dev, BNX2X_ISCSI_L2_CID, cli, 1);
4486         }
4487 }
4488
4489 static void cnic_shutdown_rings(struct cnic_dev *dev)
4490 {
4491         struct cnic_local *cp = dev->cnic_priv;
4492
4493         if (!test_bit(CNIC_LCL_FL_RINGS_INITED, &cp->cnic_local_flags))
4494                 return;
4495
4496         if (test_bit(CNIC_F_BNX2_CLASS, &dev->flags)) {
4497                 cnic_shutdown_bnx2_rx_ring(dev);
4498         } else if (test_bit(CNIC_F_BNX2X_CLASS, &dev->flags)) {
4499                 struct cnic_local *cp = dev->cnic_priv;
4500                 u32 cli = BNX2X_ISCSI_CL_ID(CNIC_E1HVN(cp));
4501                 union l5cm_specific_data l5_data;
4502                 int i;
4503                 u32 type;
4504
4505                 cnic_ring_ctl(dev, BNX2X_ISCSI_L2_CID, cli, 0);
4506
4507                 set_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags);
4508
4509                 l5_data.phy_address.lo = cli;
4510                 l5_data.phy_address.hi = 0;
4511                 cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_ETH_HALT,
4512                         BNX2X_ISCSI_L2_CID, ETH_CONNECTION_TYPE, &l5_data);
4513                 i = 0;
4514                 while (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags) &&
4515                        ++i < 10)
4516                         msleep(1);
4517
4518                 if (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags))
4519                         netdev_err(dev->netdev,
4520                                 "iSCSI CLIENT_HALT did not complete\n");
4521                 cnic_spq_completion(dev, DRV_CTL_RET_L2_SPQ_CREDIT_CMD, 1);
4522
4523                 memset(&l5_data, 0, sizeof(l5_data));
4524                 type = (NONE_CONNECTION_TYPE << SPE_HDR_CONN_TYPE_SHIFT)
4525                         & SPE_HDR_CONN_TYPE;
4526                 type |= ((cp->pfid << SPE_HDR_FUNCTION_ID_SHIFT) &
4527                          SPE_HDR_FUNCTION_ID);
4528                 cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_COMMON_CFC_DEL,
4529                         BNX2X_ISCSI_L2_CID, type, &l5_data);
4530                 msleep(10);
4531         }
4532         clear_bit(CNIC_LCL_FL_RINGS_INITED, &cp->cnic_local_flags);
4533 }
4534
4535 static int cnic_register_netdev(struct cnic_dev *dev)
4536 {
4537         struct cnic_local *cp = dev->cnic_priv;
4538         struct cnic_eth_dev *ethdev = cp->ethdev;
4539         int err;
4540
4541         if (!ethdev)
4542                 return -ENODEV;
4543
4544         if (ethdev->drv_state & CNIC_DRV_STATE_REGD)
4545                 return 0;
4546
4547         err = ethdev->drv_register_cnic(dev->netdev, cp->cnic_ops, dev);
4548         if (err)
4549                 netdev_err(dev->netdev, "register_cnic failed\n");
4550
4551         return err;
4552 }
4553
4554 static void cnic_unregister_netdev(struct cnic_dev *dev)
4555 {
4556         struct cnic_local *cp = dev->cnic_priv;
4557         struct cnic_eth_dev *ethdev = cp->ethdev;
4558
4559         if (!ethdev)
4560                 return;
4561
4562         ethdev->drv_unregister_cnic(dev->netdev);
4563 }
4564
4565 static int cnic_start_hw(struct cnic_dev *dev)
4566 {
4567         struct cnic_local *cp = dev->cnic_priv;
4568         struct cnic_eth_dev *ethdev = cp->ethdev;
4569         int err;
4570
4571         if (test_bit(CNIC_F_CNIC_UP, &dev->flags))
4572                 return -EALREADY;
4573
4574         dev->regview = ethdev->io_base;
4575         pci_dev_get(dev->pcidev);
4576         cp->func = PCI_FUNC(dev->pcidev->devfn);
4577         cp->status_blk.gen = ethdev->irq_arr[0].status_blk;
4578         cp->status_blk_num = ethdev->irq_arr[0].status_blk_num;
4579
4580         err = cp->alloc_resc(dev);
4581         if (err) {
4582                 netdev_err(dev->netdev, "allocate resource failure\n");
4583                 goto err1;
4584         }
4585
4586         err = cp->start_hw(dev);
4587         if (err)
4588                 goto err1;
4589
4590         err = cnic_cm_open(dev);
4591         if (err)
4592                 goto err1;
4593
4594         set_bit(CNIC_F_CNIC_UP, &dev->flags);
4595
4596         cp->enable_int(dev);
4597
4598         return 0;
4599
4600 err1:
4601         cp->free_resc(dev);
4602         pci_dev_put(dev->pcidev);
4603         return err;
4604 }
4605
4606 static void cnic_stop_bnx2_hw(struct cnic_dev *dev)
4607 {
4608         cnic_disable_bnx2_int_sync(dev);
4609
4610         cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 0);
4611         cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 0);
4612
4613         cnic_init_context(dev, KWQ_CID);
4614         cnic_init_context(dev, KCQ_CID);
4615
4616         cnic_setup_5709_context(dev, 0);
4617         cnic_free_irq(dev);
4618
4619         cnic_free_resc(dev);
4620 }
4621
4622
4623 static void cnic_stop_bnx2x_hw(struct cnic_dev *dev)
4624 {
4625         struct cnic_local *cp = dev->cnic_priv;
4626
4627         cnic_free_irq(dev);
4628         *cp->kcq1.hw_prod_idx_ptr = 0;
4629         CNIC_WR(dev, BAR_CSTRORM_INTMEM +
4630                 CSTORM_ISCSI_EQ_CONS_OFFSET(cp->pfid, 0), 0);
4631         CNIC_WR16(dev, cp->kcq1.io_addr, 0);
4632         cnic_free_resc(dev);
4633 }
4634
4635 static void cnic_stop_hw(struct cnic_dev *dev)
4636 {
4637         if (test_bit(CNIC_F_CNIC_UP, &dev->flags)) {
4638                 struct cnic_local *cp = dev->cnic_priv;
4639                 int i = 0;
4640
4641                 /* Need to wait for the ring shutdown event to complete
4642                  * before clearing the CNIC_UP flag.
4643                  */
4644                 while (cp->udev->uio_dev != -1 && i < 15) {
4645                         msleep(100);
4646                         i++;
4647                 }
4648                 cnic_shutdown_rings(dev);
4649                 clear_bit(CNIC_F_CNIC_UP, &dev->flags);
4650                 rcu_assign_pointer(cp->ulp_ops[CNIC_ULP_L4], NULL);
4651                 synchronize_rcu();
4652                 cnic_cm_shutdown(dev);
4653                 cp->stop_hw(dev);
4654                 pci_dev_put(dev->pcidev);
4655         }
4656 }
4657
4658 static void cnic_free_dev(struct cnic_dev *dev)
4659 {
4660         int i = 0;
4661
4662         while ((atomic_read(&dev->ref_count) != 0) && i < 10) {
4663                 msleep(100);
4664                 i++;
4665         }
4666         if (atomic_read(&dev->ref_count) != 0)
4667                 netdev_err(dev->netdev, "Failed waiting for ref count to go to zero\n");
4668
4669         netdev_info(dev->netdev, "Removed CNIC device\n");
4670         dev_put(dev->netdev);
4671         kfree(dev);
4672 }
4673
4674 static struct cnic_dev *cnic_alloc_dev(struct net_device *dev,
4675                                        struct pci_dev *pdev)
4676 {
4677         struct cnic_dev *cdev;
4678         struct cnic_local *cp;
4679         int alloc_size;
4680
4681         alloc_size = sizeof(struct cnic_dev) + sizeof(struct cnic_local);
4682
4683         cdev = kzalloc(alloc_size , GFP_KERNEL);
4684         if (cdev == NULL) {
4685                 netdev_err(dev, "allocate dev struct failure\n");
4686                 return NULL;
4687         }
4688
4689         cdev->netdev = dev;
4690         cdev->cnic_priv = (char *)cdev + sizeof(struct cnic_dev);
4691         cdev->register_device = cnic_register_device;
4692         cdev->unregister_device = cnic_unregister_device;
4693         cdev->iscsi_nl_msg_recv = cnic_iscsi_nl_msg_recv;
4694
4695         cp = cdev->cnic_priv;
4696         cp->dev = cdev;
4697         cp->l2_single_buf_size = 0x400;
4698         cp->l2_rx_ring_size = 3;
4699
4700         spin_lock_init(&cp->cnic_ulp_lock);
4701
4702         netdev_info(dev, "Added CNIC device\n");
4703
4704         return cdev;
4705 }
4706
4707 static struct cnic_dev *init_bnx2_cnic(struct net_device *dev)
4708 {
4709         struct pci_dev *pdev;
4710         struct cnic_dev *cdev;
4711         struct cnic_local *cp;
4712         struct cnic_eth_dev *ethdev = NULL;
4713         struct cnic_eth_dev *(*probe)(struct net_device *) = NULL;
4714
4715         probe = symbol_get(bnx2_cnic_probe);
4716         if (probe) {
4717                 ethdev = (*probe)(dev);
4718                 symbol_put(bnx2_cnic_probe);
4719         }
4720         if (!ethdev)
4721                 return NULL;
4722
4723         pdev = ethdev->pdev;
4724         if (!pdev)
4725                 return NULL;
4726
4727         dev_hold(dev);
4728         pci_dev_get(pdev);
4729         if (pdev->device == PCI_DEVICE_ID_NX2_5709 ||
4730             pdev->device == PCI_DEVICE_ID_NX2_5709S) {
4731                 u8 rev;
4732
4733                 pci_read_config_byte(pdev, PCI_REVISION_ID, &rev);
4734                 if (rev < 0x10) {
4735                         pci_dev_put(pdev);
4736                         goto cnic_err;
4737                 }
4738         }
4739         pci_dev_put(pdev);
4740
4741         cdev = cnic_alloc_dev(dev, pdev);
4742         if (cdev == NULL)
4743                 goto cnic_err;
4744
4745         set_bit(CNIC_F_BNX2_CLASS, &cdev->flags);
4746         cdev->submit_kwqes = cnic_submit_bnx2_kwqes;
4747
4748         cp = cdev->cnic_priv;
4749         cp->ethdev = ethdev;
4750         cdev->pcidev = pdev;
4751         cp->chip_id = ethdev->chip_id;
4752
4753         cp->cnic_ops = &cnic_bnx2_ops;
4754         cp->start_hw = cnic_start_bnx2_hw;
4755         cp->stop_hw = cnic_stop_bnx2_hw;
4756         cp->setup_pgtbl = cnic_setup_page_tbl;
4757         cp->alloc_resc = cnic_alloc_bnx2_resc;
4758         cp->free_resc = cnic_free_resc;
4759         cp->start_cm = cnic_cm_init_bnx2_hw;
4760         cp->stop_cm = cnic_cm_stop_bnx2_hw;
4761         cp->enable_int = cnic_enable_bnx2_int;
4762         cp->disable_int_sync = cnic_disable_bnx2_int_sync;
4763         cp->close_conn = cnic_close_bnx2_conn;
4764         cp->next_idx = cnic_bnx2_next_idx;
4765         cp->hw_idx = cnic_bnx2_hw_idx;
4766         return cdev;
4767
4768 cnic_err:
4769         dev_put(dev);
4770         return NULL;
4771 }
4772
4773 static struct cnic_dev *init_bnx2x_cnic(struct net_device *dev)
4774 {
4775         struct pci_dev *pdev;
4776         struct cnic_dev *cdev;
4777         struct cnic_local *cp;
4778         struct cnic_eth_dev *ethdev = NULL;
4779         struct cnic_eth_dev *(*probe)(struct net_device *) = NULL;
4780
4781         probe = symbol_get(bnx2x_cnic_probe);
4782         if (probe) {
4783                 ethdev = (*probe)(dev);
4784                 symbol_put(bnx2x_cnic_probe);
4785         }
4786         if (!ethdev)
4787                 return NULL;
4788
4789         pdev = ethdev->pdev;
4790         if (!pdev)
4791                 return NULL;
4792
4793         dev_hold(dev);
4794         cdev = cnic_alloc_dev(dev, pdev);
4795         if (cdev == NULL) {
4796                 dev_put(dev);
4797                 return NULL;
4798         }
4799
4800         set_bit(CNIC_F_BNX2X_CLASS, &cdev->flags);
4801         cdev->submit_kwqes = cnic_submit_bnx2x_kwqes;
4802
4803         cp = cdev->cnic_priv;
4804         cp->ethdev = ethdev;
4805         cdev->pcidev = pdev;
4806         cp->chip_id = ethdev->chip_id;
4807
4808         cp->cnic_ops = &cnic_bnx2x_ops;
4809         cp->start_hw = cnic_start_bnx2x_hw;
4810         cp->stop_hw = cnic_stop_bnx2x_hw;
4811         cp->setup_pgtbl = cnic_setup_page_tbl_le;
4812         cp->alloc_resc = cnic_alloc_bnx2x_resc;
4813         cp->free_resc = cnic_free_resc;
4814         cp->start_cm = cnic_cm_init_bnx2x_hw;
4815         cp->stop_cm = cnic_cm_stop_bnx2x_hw;
4816         cp->enable_int = cnic_enable_bnx2x_int;
4817         cp->disable_int_sync = cnic_disable_bnx2x_int_sync;
4818         if (BNX2X_CHIP_IS_E2(cp->chip_id))
4819                 cp->ack_int = cnic_ack_bnx2x_e2_msix;
4820         else
4821                 cp->ack_int = cnic_ack_bnx2x_msix;
4822         cp->close_conn = cnic_close_bnx2x_conn;
4823         cp->next_idx = cnic_bnx2x_next_idx;
4824         cp->hw_idx = cnic_bnx2x_hw_idx;
4825         return cdev;
4826 }
4827
4828 static struct cnic_dev *is_cnic_dev(struct net_device *dev)
4829 {
4830         struct ethtool_drvinfo drvinfo;
4831         struct cnic_dev *cdev = NULL;
4832
4833         if (dev->ethtool_ops && dev->ethtool_ops->get_drvinfo) {
4834                 memset(&drvinfo, 0, sizeof(drvinfo));
4835                 dev->ethtool_ops->get_drvinfo(dev, &drvinfo);
4836
4837                 if (!strcmp(drvinfo.driver, "bnx2"))
4838                         cdev = init_bnx2_cnic(dev);
4839                 if (!strcmp(drvinfo.driver, "bnx2x"))
4840                         cdev = init_bnx2x_cnic(dev);
4841                 if (cdev) {
4842                         write_lock(&cnic_dev_lock);
4843                         list_add(&cdev->list, &cnic_dev_list);
4844                         write_unlock(&cnic_dev_lock);
4845                 }
4846         }
4847         return cdev;
4848 }
4849
4850 /**
4851  * netdev event handler
4852  */
4853 static int cnic_netdev_event(struct notifier_block *this, unsigned long event,
4854                                                          void *ptr)
4855 {
4856         struct net_device *netdev = ptr;
4857         struct cnic_dev *dev;
4858         int if_type;
4859         int new_dev = 0;
4860
4861         dev = cnic_from_netdev(netdev);
4862
4863         if (!dev && (event == NETDEV_REGISTER || event == NETDEV_UP)) {
4864                 /* Check for the hot-plug device */
4865                 dev = is_cnic_dev(netdev);
4866                 if (dev) {
4867                         new_dev = 1;
4868                         cnic_hold(dev);
4869                 }
4870         }
4871         if (dev) {
4872                 struct cnic_local *cp = dev->cnic_priv;
4873
4874                 if (new_dev)
4875                         cnic_ulp_init(dev);
4876                 else if (event == NETDEV_UNREGISTER)
4877                         cnic_ulp_exit(dev);
4878
4879                 if (event == NETDEV_UP) {
4880                         if (cnic_register_netdev(dev) != 0) {
4881                                 cnic_put(dev);
4882                                 goto done;
4883                         }
4884                         if (!cnic_start_hw(dev))
4885                                 cnic_ulp_start(dev);
4886                 }
4887
4888                 rcu_read_lock();
4889                 for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) {
4890                         struct cnic_ulp_ops *ulp_ops;
4891                         void *ctx;
4892
4893                         ulp_ops = rcu_dereference(cp->ulp_ops[if_type]);
4894                         if (!ulp_ops || !ulp_ops->indicate_netevent)
4895                                 continue;
4896
4897                         ctx = cp->ulp_handle[if_type];
4898
4899                         ulp_ops->indicate_netevent(ctx, event);
4900                 }
4901                 rcu_read_unlock();
4902
4903                 if (event == NETDEV_GOING_DOWN) {
4904                         cnic_ulp_stop(dev);
4905                         cnic_stop_hw(dev);
4906                         cnic_unregister_netdev(dev);
4907                 } else if (event == NETDEV_UNREGISTER) {
4908                         write_lock(&cnic_dev_lock);
4909                         list_del_init(&dev->list);
4910                         write_unlock(&cnic_dev_lock);
4911
4912                         cnic_put(dev);
4913                         cnic_free_dev(dev);
4914                         goto done;
4915                 }
4916                 cnic_put(dev);
4917         }
4918 done:
4919         return NOTIFY_DONE;
4920 }
4921
4922 static struct notifier_block cnic_netdev_notifier = {
4923         .notifier_call = cnic_netdev_event
4924 };
4925
4926 static void cnic_release(void)
4927 {
4928         struct cnic_dev *dev;
4929         struct cnic_uio_dev *udev;
4930
4931         while (!list_empty(&cnic_dev_list)) {
4932                 dev = list_entry(cnic_dev_list.next, struct cnic_dev, list);
4933                 if (test_bit(CNIC_F_CNIC_UP, &dev->flags)) {
4934                         cnic_ulp_stop(dev);
4935                         cnic_stop_hw(dev);
4936                 }
4937
4938                 cnic_ulp_exit(dev);
4939                 cnic_unregister_netdev(dev);
4940                 list_del_init(&dev->list);
4941                 cnic_free_dev(dev);
4942         }
4943         while (!list_empty(&cnic_udev_list)) {
4944                 udev = list_entry(cnic_udev_list.next, struct cnic_uio_dev,
4945                                   list);
4946                 cnic_free_uio(udev);
4947         }
4948 }
4949
4950 static int __init cnic_init(void)
4951 {
4952         int rc = 0;
4953
4954         pr_info("%s", version);
4955
4956         rc = register_netdevice_notifier(&cnic_netdev_notifier);
4957         if (rc) {
4958                 cnic_release();
4959                 return rc;
4960         }
4961
4962         cnic_wq = create_singlethread_workqueue("cnic_wq");
4963         if (!cnic_wq) {
4964                 cnic_release();
4965                 unregister_netdevice_notifier(&cnic_netdev_notifier);
4966                 return -ENOMEM;
4967         }
4968
4969         return 0;
4970 }
4971
4972 static void __exit cnic_exit(void)
4973 {
4974         unregister_netdevice_notifier(&cnic_netdev_notifier);
4975         cnic_release();
4976         destroy_workqueue(cnic_wq);
4977 }
4978
4979 module_init(cnic_init);
4980 module_exit(cnic_exit);