drivers/net/wireless/ath/ath9k/main.c

   1 /*
   2  * Copyright (c) 2008-2009 Atheros Communications Inc.
   3  *
   4  * Permission to use, copy, modify, and/or distribute this software for any
   5  * purpose with or without fee is hereby granted, provided that the above
   6  * copyright notice and this permission notice appear in all copies.
   7  *
   8  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
   9  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15  */
  16
  17 #include <linux/nl80211.h>
  18 #include "ath9k.h"
  19 #include "btcoex.h"
  20
  21 static void ath_update_txpow(struct ath_softc *sc)
  22 {
  23         struct ath_hw *ah = sc->sc_ah;
  24
  25         if (sc->curtxpow != sc->config.txpowlimit) {
  26                 ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit, false);
  27                 /* read back in case value is clamped */
  28                 sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
  29         }
  30 }
  31
  32 static u8 parse_mpdudensity(u8 mpdudensity)
  33 {
  34         /*
  35          * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  36          *   0 for no restriction
  37          *   1 for 1/4 us
  38          *   2 for 1/2 us
  39          *   3 for 1 us
  40          *   4 for 2 us
  41          *   5 for 4 us
  42          *   6 for 8 us
  43          *   7 for 16 us
  44          */
  45         switch (mpdudensity) {
  46         case 0:
  47                 return 0;
  48         case 1:
  49         case 2:
  50         case 3:
  51                 /* Our lower layer calculations limit our precision to
  52                    1 microsecond */
  53                 return 1;
  54         case 4:
  55                 return 2;
  56         case 5:
  57                 return 4;
  58         case 6:
  59                 return 8;
  60         case 7:
  61                 return 16;
  62         default:
  63                 return 0;
  64         }
  65 }
  66
  67 static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
  68                                                 struct ieee80211_hw *hw)
  69 {
  70         struct ieee80211_channel *curchan = hw->conf.channel;
  71         struct ath9k_channel *channel;
  72         u8 chan_idx;
  73
  74         chan_idx = curchan->hw_value;
  75         channel = &sc->sc_ah->channels[chan_idx];
  76         ath9k_update_ichannel(sc, hw, channel);
  77         return channel;
  78 }
  79
  80 bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  81 {
  82         unsigned long flags;
  83         bool ret;
  84
  85         spin_lock_irqsave(&sc->sc_pm_lock, flags);
  86         ret = ath9k_hw_setpower(sc->sc_ah, mode);
  87         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  88
  89         return ret;
  90 }
  91
  92 void ath9k_ps_wakeup(struct ath_softc *sc)
  93 {
  94         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  95         unsigned long flags;
  96         enum ath9k_power_mode power_mode;
  97
  98         spin_lock_irqsave(&sc->sc_pm_lock, flags);
  99         if (++sc->ps_usecount != 1)
 100                 goto unlock;
 101
 102         power_mode = sc->sc_ah->power_mode;
 103         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
 104
 105         /*
 106          * While the hardware is asleep, the cycle counters contain no
 107          * useful data. Better clear them now so that they don't mess up
 108          * survey data results.
 109          */
 110         if (power_mode != ATH9K_PM_AWAKE) {
 111                 spin_lock(&common->cc_lock);
 112                 ath_hw_cycle_counters_update(common);
 113                 memset(&common->cc_survey, 0, sizeof(common->cc_survey));
 114                 spin_unlock(&common->cc_lock);
 115         }
 116
 117  unlock:
 118         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 119 }
 120
 121 void ath9k_ps_restore(struct ath_softc *sc)
 122 {
 123         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
 124         unsigned long flags;
 125
 126         spin_lock_irqsave(&sc->sc_pm_lock, flags);
 127         if (--sc->ps_usecount != 0)
 128                 goto unlock;
 129
 130         spin_lock(&common->cc_lock);
 131         ath_hw_cycle_counters_update(common);
 132         spin_unlock(&common->cc_lock);
 133
 134         if (sc->ps_idle)
 135                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
 136         else if (sc->ps_enabled &&
 137                  !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
 138                               PS_WAIT_FOR_CAB |
 139                               PS_WAIT_FOR_PSPOLL_DATA |
 140                               PS_WAIT_FOR_TX_ACK)))
 141                 ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
 142
 143  unlock:
 144         spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
 145 }
 146
 147 static void ath_start_ani(struct ath_common *common)
 148 {
 149         struct ath_hw *ah = common->ah;
 150         unsigned long timestamp = jiffies_to_msecs(jiffies);
 151         struct ath_softc *sc = (struct ath_softc *) common->priv;
 152
 153         if (!(sc->sc_flags & SC_OP_ANI_RUN))
 154                 return;
 155
 156         if (sc->sc_flags & SC_OP_OFFCHANNEL)
 157                 return;
 158
 159         common->ani.longcal_timer = timestamp;
 160         common->ani.shortcal_timer = timestamp;
 161         common->ani.checkani_timer = timestamp;
 162
 163         mod_timer(&common->ani.timer,
 164                   jiffies +
 165                         msecs_to_jiffies((u32)ah->config.ani_poll_interval));
 166 }
 167
 168 static void ath_update_survey_nf(struct ath_softc *sc, int channel)
 169 {
 170         struct ath_hw *ah = sc->sc_ah;
 171         struct ath9k_channel *chan = &ah->channels[channel];
 172         struct survey_info *survey = &sc->survey[channel];
 173
 174         if (chan->noisefloor) {
 175                 survey->filled |= SURVEY_INFO_NOISE_DBM;
 176                 survey->noise = chan->noisefloor;
 177         }
 178 }
 179
 180 static void ath_update_survey_stats(struct ath_softc *sc)
 181 {
 182         struct ath_hw *ah = sc->sc_ah;
 183         struct ath_common *common = ath9k_hw_common(ah);
 184         int pos = ah->curchan - &ah->channels[0];
 185         struct survey_info *survey = &sc->survey[pos];
 186         struct ath_cycle_counters *cc = &common->cc_survey;
 187         unsigned int div = common->clockrate * 1000;
 188
 189         if (!ah->curchan)
 190                 return;
 191
 192         if (ah->power_mode == ATH9K_PM_AWAKE)
 193                 ath_hw_cycle_counters_update(common);
 194
 195         if (cc->cycles > 0) {
 196                 survey->filled |= SURVEY_INFO_CHANNEL_TIME |
 197                         SURVEY_INFO_CHANNEL_TIME_BUSY |
 198                         SURVEY_INFO_CHANNEL_TIME_RX |
 199                         SURVEY_INFO_CHANNEL_TIME_TX;
 200                 survey->channel_time += cc->cycles / div;
 201                 survey->channel_time_busy += cc->rx_busy / div;
 202                 survey->channel_time_rx += cc->rx_frame / div;
 203                 survey->channel_time_tx += cc->tx_frame / div;
 204         }
 205         memset(cc, 0, sizeof(*cc));
 206
 207         ath_update_survey_nf(sc, pos);
 208 }
 209
 210 /*
 211  * Set/change channels.  If the channel is really being changed, it's done
 212  * by reseting the chip.  To accomplish this we must first cleanup any pending
 213  * DMA, then restart stuff.
 214 */
 215 int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
 216                     struct ath9k_channel *hchan)
 217 {
 218         struct ath_wiphy *aphy = hw->priv;
 219         struct ath_hw *ah = sc->sc_ah;
 220         struct ath_common *common = ath9k_hw_common(ah);
 221         struct ieee80211_conf *conf = &common->hw->conf;
 222         bool fastcc = true, stopped;
 223         struct ieee80211_channel *channel = hw->conf.channel;
 224         struct ath9k_hw_cal_data *caldata = NULL;
 225         int r;
 226
 227         if (sc->sc_flags & SC_OP_INVALID)
 228                 return -EIO;
 229
 230         del_timer_sync(&common->ani.timer);
 231         cancel_work_sync(&sc->paprd_work);
 232         cancel_work_sync(&sc->hw_check_work);
 233         cancel_delayed_work_sync(&sc->tx_complete_work);
 234
 235         ath9k_ps_wakeup(sc);
 236
 237         spin_lock_bh(&sc->sc_pcu_lock);
 238
 239         /*
 240          * This is only performed if the channel settings have
 241          * actually changed.
 242          *
 243          * To switch channels clear any pending DMA operations;
 244          * wait long enough for the RX fifo to drain, reset the
 245          * hardware at the new frequency, and then re-enable
 246          * the relevant bits of the h/w.
 247          */
 248         ath9k_hw_disable_interrupts(ah);
 249         ath_drain_all_txq(sc, false);
 250
 251         stopped = ath_stoprecv(sc);
 252
 253         /* XXX: do not flush receive queue here. We don't want
 254          * to flush data frames already in queue because of
 255          * changing channel. */
 256
 257         if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
 258                 fastcc = false;
 259
 260         if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
 261                 caldata = &aphy->caldata;
 262
 263         ath_print(common, ATH_DBG_CONFIG,
 264                   "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
 265                   sc->sc_ah->curchan->channel,
 266                   channel->center_freq, conf_is_ht40(conf),
 267                   fastcc);
 268
 269         r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
 270         if (r) {
 271                 ath_print(common, ATH_DBG_FATAL,
 272                           "Unable to reset channel (%u MHz), "
 273                           "reset status %d\n",
 274                           channel->center_freq, r);
 275                 goto ps_restore;
 276         }
 277
 278         if (ath_startrecv(sc) != 0) {
 279                 ath_print(common, ATH_DBG_FATAL,
 280                           "Unable to restart recv logic\n");
 281                 r = -EIO;
 282                 goto ps_restore;
 283         }
 284
 285         ath_update_txpow(sc);
 286         ath9k_hw_set_interrupts(ah, ah->imask);
 287
 288         if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
 289                 ath_beacon_config(sc, NULL);
 290                 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
 291                 ath_start_ani(common);
 292         }
 293
 294  ps_restore:
 295         spin_unlock_bh(&sc->sc_pcu_lock);
 296
 297         ath9k_ps_restore(sc);
 298         return r;
 299 }
 300
 301 static void ath_paprd_activate(struct ath_softc *sc)
 302 {
 303         struct ath_hw *ah = sc->sc_ah;
 304         struct ath9k_hw_cal_data *caldata = ah->caldata;
 305         struct ath_common *common = ath9k_hw_common(ah);
 306         int chain;
 307
 308         if (!caldata || !caldata->paprd_done)
 309                 return;
 310
 311         ath9k_ps_wakeup(sc);
 312         ar9003_paprd_enable(ah, false);
 313         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 314                 if (!(common->tx_chainmask & BIT(chain)))
 315                         continue;
 316
 317                 ar9003_paprd_populate_single_table(ah, caldata, chain);
 318         }
 319
 320         ar9003_paprd_enable(ah, true);
 321         ath9k_ps_restore(sc);
 322 }
 323
 324 void ath_paprd_calibrate(struct work_struct *work)
 325 {
 326         struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
 327         struct ieee80211_hw *hw = sc->hw;
 328         struct ath_hw *ah = sc->sc_ah;
 329         struct ieee80211_hdr *hdr;
 330         struct sk_buff *skb = NULL;
 331         struct ieee80211_tx_info *tx_info;
 332         int band = hw->conf.channel->band;
 333         struct ieee80211_supported_band *sband = &sc->sbands[band];
 334         struct ath_tx_control txctl;
 335         struct ath9k_hw_cal_data *caldata = ah->caldata;
 336         struct ath_common *common = ath9k_hw_common(ah);
 337         int ftype;
 338         int chain_ok = 0;
 339         int chain;
 340         int len = 1800;
 341         int time_left;
 342         int i;
 343
 344         if (!caldata)
 345                 return;
 346
 347         skb = alloc_skb(len, GFP_KERNEL);
 348         if (!skb)
 349                 return;
 350
 351         tx_info = IEEE80211_SKB_CB(skb);
 352
 353         skb_put(skb, len);
 354         memset(skb->data, 0, len);
 355         hdr = (struct ieee80211_hdr *)skb->data;
 356         ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
 357         hdr->frame_control = cpu_to_le16(ftype);
 358         hdr->duration_id = cpu_to_le16(10);
 359         memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
 360         memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
 361         memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
 362
 363         memset(&txctl, 0, sizeof(txctl));
 364         txctl.txq = sc->tx.txq_map[WME_AC_BE];
 365
 366         ath9k_ps_wakeup(sc);
 367         ar9003_paprd_init_table(ah);
 368         for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
 369                 if (!(common->tx_chainmask & BIT(chain)))
 370                         continue;
 371
 372                 chain_ok = 0;
 373                 memset(tx_info, 0, sizeof(*tx_info));
 374                 tx_info->band = band;
 375
 376                 for (i = 0; i < 4; i++) {
 377                         tx_info->control.rates[i].idx = sband->n_bitrates - 1;
 378                         tx_info->control.rates[i].count = 6;
 379                 }
 380
 381                 init_completion(&sc->paprd_complete);
 382                 sc->paprd_pending = true;
 383                 ar9003_paprd_setup_gain_table(ah, chain);
 384                 txctl.paprd = BIT(chain);
 385                 if (ath_tx_start(hw, skb, &txctl) != 0)
 386                         break;
 387
 388                 time_left = wait_for_completion_timeout(&sc->paprd_complete,
 389                                 msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
 390                 sc->paprd_pending = false;
 391                 if (!time_left) {
 392                         ath_print(ath9k_hw_common(ah), ATH_DBG_CALIBRATE,
 393                                   "Timeout waiting for paprd training on "
 394                                   "TX chain %d\n",
 395                                   chain);
 396                         goto fail_paprd;
 397                 }
 398
 399                 if (!ar9003_paprd_is_done(ah))
 400                         break;
 401
 402                 if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
 403                         break;
 404
 405                 chain_ok = 1;
 406         }
 407         kfree_skb(skb);
 408
 409         if (chain_ok) {
 410                 caldata->paprd_done = true;
 411                 ath_paprd_activate(sc);
 412         }
 413
 414 fail_paprd:
 415         ath9k_ps_restore(sc);
 416 }
 417
 418 /*
 419  *  This routine performs the periodic noise floor calibration function
 420  *  that is used to adjust and optimize the chip performance.  This
 421  *  takes environmental changes (location, temperature) into account.
 422  *  When the task is complete, it reschedules itself depending on the
 423  *  appropriate interval that was calculated.
 424  */
 425 void ath_ani_calibrate(unsigned long data)
 426 {
 427         struct ath_softc *sc = (struct ath_softc *)data;
 428         struct ath_hw *ah = sc->sc_ah;
 429         struct ath_common *common = ath9k_hw_common(ah);
 430         bool longcal = false;
 431         bool shortcal = false;
 432         bool aniflag = false;
 433         unsigned int timestamp = jiffies_to_msecs(jiffies);
 434         u32 cal_interval, short_cal_interval, long_cal_interval;
 435         unsigned long flags;
 436
 437         if (ah->caldata && ah->caldata->nfcal_interference)
 438                 long_cal_interval = ATH_LONG_CALINTERVAL_INT;
 439         else
 440                 long_cal_interval = ATH_LONG_CALINTERVAL;
 441
 442         short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
 443                 ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
 444
 445         /* Only calibrate if awake */
 446         if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
 447                 goto set_timer;
 448
 449         ath9k_ps_wakeup(sc);
 450
 451         /* Long calibration runs independently of short calibration. */
 452         if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
 453                 longcal = true;
 454                 ath_print(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
 455                 common->ani.longcal_timer = timestamp;
 456         }
 457
 458         /* Short calibration applies only while caldone is false */
 459         if (!common->ani.caldone) {
 460                 if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
 461                         shortcal = true;
 462                         ath_print(common, ATH_DBG_ANI,
 463                                   "shortcal @%lu\n", jiffies);
 464                         common->ani.shortcal_timer = timestamp;
 465                         common->ani.resetcal_timer = timestamp;
 466                 }
 467         } else {
 468                 if ((timestamp - common->ani.resetcal_timer) >=
 469                     ATH_RESTART_CALINTERVAL) {
 470                         common->ani.caldone = ath9k_hw_reset_calvalid(ah);
 471                         if (common->ani.caldone)
 472                                 common->ani.resetcal_timer = timestamp;
 473                 }
 474         }
 475
 476         /* Verify whether we must check ANI */
 477         if ((timestamp - common->ani.checkani_timer) >=
 478              ah->config.ani_poll_interval) {
 479                 aniflag = true;
 480                 common->ani.checkani_timer = timestamp;
 481         }
 482
 483         /* Skip all processing if there's nothing to do. */
 484         if (longcal || shortcal || aniflag) {
 485                 /* Call ANI routine if necessary */
 486                 if (aniflag) {
 487                         spin_lock_irqsave(&common->cc_lock, flags);
 488                         ath9k_hw_ani_monitor(ah, ah->curchan);
 489                         ath_update_survey_stats(sc);
 490                         spin_unlock_irqrestore(&common->cc_lock, flags);
 491                 }
 492
 493                 /* Perform calibration if necessary */
 494                 if (longcal || shortcal) {
 495                         common->ani.caldone =
 496                                 ath9k_hw_calibrate(ah,
 497                                                    ah->curchan,
 498                                                    common->rx_chainmask,
 499                                                    longcal);
 500                 }
 501         }
 502
 503         ath9k_ps_restore(sc);
 504
 505 set_timer:
 506         /*
 507         * Set timer interval based on previous results.
 508         * The interval must be the shortest necessary to satisfy ANI,
 509         * short calibration and long calibration.
 510         */
 511         cal_interval = ATH_LONG_CALINTERVAL;
 512         if (sc->sc_ah->config.enable_ani)
 513                 cal_interval = min(cal_interval,
 514                                    (u32)ah->config.ani_poll_interval);
 515         if (!common->ani.caldone)
 516                 cal_interval = min(cal_interval, (u32)short_cal_interval);
 517
 518         mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
 519         if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
 520                 if (!ah->caldata->paprd_done)
 521                         ieee80211_queue_work(sc->hw, &sc->paprd_work);
 522                 else
 523                         ath_paprd_activate(sc);
 524         }
 525 }
 526
 527 /*
 528  * Update tx/rx chainmask. For legacy association,
 529  * hard code chainmask to 1x1, for 11n association, use
 530  * the chainmask configuration, for bt coexistence, use
 531  * the chainmask configuration even in legacy mode.
 532  */
 533 void ath_update_chainmask(struct ath_softc *sc, int is_ht)
 534 {
 535         struct ath_hw *ah = sc->sc_ah;
 536         struct ath_common *common = ath9k_hw_common(ah);
 537
 538         if ((sc->sc_flags & SC_OP_OFFCHANNEL) || is_ht ||
 539             (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE)) {
 540                 common->tx_chainmask = ah->caps.tx_chainmask;
 541                 common->rx_chainmask = ah->caps.rx_chainmask;
 542         } else {
 543                 common->tx_chainmask = 1;
 544                 common->rx_chainmask = 1;
 545         }
 546
 547         ath_print(common, ATH_DBG_CONFIG,
 548                   "tx chmask: %d, rx chmask: %d\n",
 549                   common->tx_chainmask,
 550                   common->rx_chainmask);
 551 }
 552
 553 static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
 554 {
 555         struct ath_node *an;
 556
 557         an = (struct ath_node *)sta->drv_priv;
 558
 559         if (sc->sc_flags & SC_OP_TXAGGR) {
 560                 ath_tx_node_init(sc, an);
 561                 an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
 562                                      sta->ht_cap.ampdu_factor);
 563                 an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
 564         }
 565 }
 566
 567 static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
 568 {
 569         struct ath_node *an = (struct ath_node *)sta->drv_priv;
 570
 571         if (sc->sc_flags & SC_OP_TXAGGR)
 572                 ath_tx_node_cleanup(sc, an);
 573 }
 574
 575 void ath_hw_check(struct work_struct *work)
 576 {
 577         struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
 578         int i;
 579
 580         ath9k_ps_wakeup(sc);
 581
 582         for (i = 0; i < 3; i++) {
 583                 if (ath9k_hw_check_alive(sc->sc_ah))
 584                         goto out;
 585
 586                 msleep(1);
 587         }
 588         ath_reset(sc, true);
 589
 590 out:
 591         ath9k_ps_restore(sc);
 592 }
 593
 594 void ath9k_tasklet(unsigned long data)
 595 {
 596         struct ath_softc *sc = (struct ath_softc *)data;
 597         struct ath_hw *ah = sc->sc_ah;
 598         struct ath_common *common = ath9k_hw_common(ah);
 599
 600         u32 status = sc->intrstatus;
 601         u32 rxmask;
 602
 603         ath9k_ps_wakeup(sc);
 604
 605         if (status & ATH9K_INT_FATAL) {
 606                 ath_reset(sc, true);
 607                 ath9k_ps_restore(sc);
 608                 return;
 609         }
 610
 611         spin_lock_bh(&sc->sc_pcu_lock);
 612
 613         if (!ath9k_hw_check_alive(ah))
 614                 ieee80211_queue_work(sc->hw, &sc->hw_check_work);
 615
 616         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 617                 rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
 618                           ATH9K_INT_RXORN);
 619         else
 620                 rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 621
 622         if (status & rxmask) {
 623                 /* Check for high priority Rx first */
 624                 if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 625                     (status & ATH9K_INT_RXHP))
 626                         ath_rx_tasklet(sc, 0, true);
 627
 628                 ath_rx_tasklet(sc, 0, false);
 629         }
 630
 631         if (status & ATH9K_INT_TX) {
 632                 if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
 633                         ath_tx_edma_tasklet(sc);
 634                 else
 635                         ath_tx_tasklet(sc);
 636         }
 637
 638         if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
 639                 /*
 640                  * TSF sync does not look correct; remain awake to sync with
 641                  * the next Beacon.
 642                  */
 643                 ath_print(common, ATH_DBG_PS,
 644                           "TSFOOR - Sync with next Beacon\n");
 645                 sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
 646         }
 647
 648         if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
 649                 if (status & ATH9K_INT_GENTIMER)
 650                         ath_gen_timer_isr(sc->sc_ah);
 651
 652         /* re-enable hardware interrupt */
 653         ath9k_hw_enable_interrupts(ah);
 654
 655         spin_unlock_bh(&sc->sc_pcu_lock);
 656         ath9k_ps_restore(sc);
 657 }
 658
 659 irqreturn_t ath_isr(int irq, void *dev)
 660 {
 661 #define SCHED_INTR (                            \
 662                 ATH9K_INT_FATAL |               \
 663                 ATH9K_INT_RXORN |               \
 664                 ATH9K_INT_RXEOL |               \
 665                 ATH9K_INT_RX |                  \
 666                 ATH9K_INT_RXLP |                \
 667                 ATH9K_INT_RXHP |                \
 668                 ATH9K_INT_TX |                  \
 669                 ATH9K_INT_BMISS |               \
 670                 ATH9K_INT_CST |                 \
 671                 ATH9K_INT_TSFOOR |              \
 672                 ATH9K_INT_GENTIMER)
 673
 674         struct ath_softc *sc = dev;
 675         struct ath_hw *ah = sc->sc_ah;
 676         struct ath_common *common = ath9k_hw_common(ah);
 677         enum ath9k_int status;
 678         bool sched = false;
 679
 680         /*
 681          * The hardware is not ready/present, don't
 682          * touch anything. Note this can happen early
 683          * on if the IRQ is shared.
 684          */
 685         if (sc->sc_flags & SC_OP_INVALID)
 686                 return IRQ_NONE;
 687
 688
 689         /* shared irq, not for us */
 690
 691         if (!ath9k_hw_intrpend(ah))
 692                 return IRQ_NONE;
 693
 694         /*
 695          * Figure out the reason(s) for the interrupt.  Note
 696          * that the hal returns a pseudo-ISR that may include
 697          * bits we haven't explicitly enabled so we mask the
 698          * value to insure we only process bits we requested.
 699          */
 700         ath9k_hw_getisr(ah, &status);   /* NB: clears ISR too */
 701         status &= ah->imask;    /* discard unasked-for bits */
 702
 703         /*
 704          * If there are no status bits set, then this interrupt was not
 705          * for me (should have been caught above).
 706          */
 707         if (!status)
 708                 return IRQ_NONE;
 709
 710         /* Cache the status */
 711         sc->intrstatus = status;
 712
 713         if (status & SCHED_INTR)
 714                 sched = true;
 715
 716         /*
 717          * If a FATAL or RXORN interrupt is received, we have to reset the
 718          * chip immediately.
 719          */
 720         if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
 721             !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
 722                 goto chip_reset;
 723
 724         if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
 725             (status & ATH9K_INT_BB_WATCHDOG)) {
 726
 727                 spin_lock(&common->cc_lock);
 728                 ath_hw_cycle_counters_update(common);
 729                 ar9003_hw_bb_watchdog_dbg_info(ah);
 730                 spin_unlock(&common->cc_lock);
 731
 732                 goto chip_reset;
 733         }
 734
 735         if (status & ATH9K_INT_SWBA)
 736                 tasklet_schedule(&sc->bcon_tasklet);
 737
 738         if (status & ATH9K_INT_TXURN)
 739                 ath9k_hw_updatetxtriglevel(ah, true);
 740
 741         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
 742                 if (status & ATH9K_INT_RXEOL) {
 743                         ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
 744                         ath9k_hw_set_interrupts(ah, ah->imask);
 745                 }
 746         }
 747
 748         if (status & ATH9K_INT_MIB) {
 749                 /*
 750                  * Disable interrupts until we service the MIB
 751                  * interrupt; otherwise it will continue to
 752                  * fire.
 753                  */
 754                 ath9k_hw_disable_interrupts(ah);
 755                 /*
 756                  * Let the hal handle the event. We assume
 757                  * it will clear whatever condition caused
 758                  * the interrupt.
 759                  */
 760                 spin_lock(&common->cc_lock);
 761                 ath9k_hw_proc_mib_event(ah);
 762                 spin_unlock(&common->cc_lock);
 763                 ath9k_hw_enable_interrupts(ah);
 764         }
 765
 766         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
 767                 if (status & ATH9K_INT_TIM_TIMER) {
 768                         /* Clear RxAbort bit so that we can
 769                          * receive frames */
 770                         ath9k_setpower(sc, ATH9K_PM_AWAKE);
 771                         ath9k_hw_setrxabort(sc->sc_ah, 0);
 772                         sc->ps_flags |= PS_WAIT_FOR_BEACON;
 773                 }
 774
 775 chip_reset:
 776
 777         ath_debug_stat_interrupt(sc, status);
 778
 779         if (sched) {
 780                 /* turn off every interrupt */
 781                 ath9k_hw_disable_interrupts(ah);
 782                 tasklet_schedule(&sc->intr_tq);
 783         }
 784
 785         return IRQ_HANDLED;
 786
 787 #undef SCHED_INTR
 788 }
 789
 790 static u32 ath_get_extchanmode(struct ath_softc *sc,
 791                                struct ieee80211_channel *chan,
 792                                enum nl80211_channel_type channel_type)
 793 {
 794         u32 chanmode = 0;
 795
 796         switch (chan->band) {
 797         case IEEE80211_BAND_2GHZ:
 798                 switch(channel_type) {
 799                 case NL80211_CHAN_NO_HT:
 800                 case NL80211_CHAN_HT20:
 801                         chanmode = CHANNEL_G_HT20;
 802                         break;
 803                 case NL80211_CHAN_HT40PLUS:
 804                         chanmode = CHANNEL_G_HT40PLUS;
 805                         break;
 806                 case NL80211_CHAN_HT40MINUS:
 807                         chanmode = CHANNEL_G_HT40MINUS;
 808                         break;
 809                 }
 810                 break;
 811         case IEEE80211_BAND_5GHZ:
 812                 switch(channel_type) {
 813                 case NL80211_CHAN_NO_HT:
 814                 case NL80211_CHAN_HT20:
 815                         chanmode = CHANNEL_A_HT20;
 816                         break;
 817                 case NL80211_CHAN_HT40PLUS:
 818                         chanmode = CHANNEL_A_HT40PLUS;
 819                         break;
 820                 case NL80211_CHAN_HT40MINUS:
 821                         chanmode = CHANNEL_A_HT40MINUS;
 822                         break;
 823                 }
 824                 break;
 825         default:
 826                 break;
 827         }
 828
 829         return chanmode;
 830 }
 831
 832 static void ath9k_bss_assoc_info(struct ath_softc *sc,
 833                                  struct ieee80211_hw *hw,
 834                                  struct ieee80211_vif *vif,
 835                                  struct ieee80211_bss_conf *bss_conf)
 836 {
 837         struct ath_wiphy *aphy = hw->priv;
 838         struct ath_hw *ah = sc->sc_ah;
 839         struct ath_common *common = ath9k_hw_common(ah);
 840
 841         if (bss_conf->assoc) {
 842                 ath_print(common, ATH_DBG_CONFIG,
 843                           "Bss Info ASSOC %d, bssid: %pM\n",
 844                            bss_conf->aid, common->curbssid);
 845
 846                 /* New association, store aid */
 847                 common->curaid = bss_conf->aid;
 848                 ath9k_hw_write_associd(ah);
 849
 850                 /*
 851                  * Request a re-configuration of Beacon related timers
 852                  * on the receipt of the first Beacon frame (i.e.,
 853                  * after time sync with the AP).
 854                  */
 855                 sc->ps_flags |= PS_BEACON_SYNC;
 856
 857                 /* Configure the beacon */
 858                 ath_beacon_config(sc, vif);
 859
 860                 /* Reset rssi stats */
 861                 aphy->last_rssi = ATH_RSSI_DUMMY_MARKER;
 862                 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
 863
 864                 sc->sc_flags |= SC_OP_ANI_RUN;
 865                 ath_start_ani(common);
 866         } else {
 867                 ath_print(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
 868                 common->curaid = 0;
 869                 /* Stop ANI */
 870                 sc->sc_flags &= ~SC_OP_ANI_RUN;
 871                 del_timer_sync(&common->ani.timer);
 872         }
 873 }
 874
 875 void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
 876 {
 877         struct ath_hw *ah = sc->sc_ah;
 878         struct ath_common *common = ath9k_hw_common(ah);
 879         struct ieee80211_channel *channel = hw->conf.channel;
 880         int r;
 881
 882         ath9k_ps_wakeup(sc);
 883         spin_lock_bh(&sc->sc_pcu_lock);
 884
 885         ath9k_hw_configpcipowersave(ah, 0, 0);
 886
 887         if (!ah->curchan)
 888                 ah->curchan = ath_get_curchannel(sc, sc->hw);
 889
 890         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 891         if (r) {
 892                 ath_print(common, ATH_DBG_FATAL,
 893                           "Unable to reset channel (%u MHz), "
 894                           "reset status %d\n",
 895                           channel->center_freq, r);
 896         }
 897
 898         ath_update_txpow(sc);
 899         if (ath_startrecv(sc) != 0) {
 900                 ath_print(common, ATH_DBG_FATAL,
 901                           "Unable to restart recv logic\n");
 902                 spin_unlock_bh(&sc->sc_pcu_lock);
 903                 return;
 904         }
 905         if (sc->sc_flags & SC_OP_BEACONS)
 906                 ath_beacon_config(sc, NULL);    /* restart beacons */
 907
 908         /* Re-Enable  interrupts */
 909         ath9k_hw_set_interrupts(ah, ah->imask);
 910
 911         /* Enable LED */
 912         ath9k_hw_cfg_output(ah, ah->led_pin,
 913                             AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
 914         ath9k_hw_set_gpio(ah, ah->led_pin, 0);
 915
 916         ieee80211_wake_queues(hw);
 917         spin_unlock_bh(&sc->sc_pcu_lock);
 918
 919         ath9k_ps_restore(sc);
 920 }
 921
 922 void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
 923 {
 924         struct ath_hw *ah = sc->sc_ah;
 925         struct ieee80211_channel *channel = hw->conf.channel;
 926         int r;
 927
 928         ath9k_ps_wakeup(sc);
 929         spin_lock_bh(&sc->sc_pcu_lock);
 930
 931         ieee80211_stop_queues(hw);
 932
 933         /*
 934          * Keep the LED on when the radio is disabled
 935          * during idle unassociated state.
 936          */
 937         if (!sc->ps_idle) {
 938                 ath9k_hw_set_gpio(ah, ah->led_pin, 1);
 939                 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
 940         }
 941
 942         /* Disable interrupts */
 943         ath9k_hw_disable_interrupts(ah);
 944
 945         ath_drain_all_txq(sc, false);   /* clear pending tx frames */
 946
 947         ath_stoprecv(sc);               /* turn off frame recv */
 948         ath_flushrecv(sc);              /* flush recv queue */
 949
 950         if (!ah->curchan)
 951                 ah->curchan = ath_get_curchannel(sc, hw);
 952
 953         r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
 954         if (r) {
 955                 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
 956                           "Unable to reset channel (%u MHz), "
 957                           "reset status %d\n",
 958                           channel->center_freq, r);
 959         }
 960
 961         ath9k_hw_phy_disable(ah);
 962
 963         ath9k_hw_configpcipowersave(ah, 1, 1);
 964
 965         spin_unlock_bh(&sc->sc_pcu_lock);
 966         ath9k_ps_restore(sc);
 967
 968         ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
 969 }
 970
 971 int ath_reset(struct ath_softc *sc, bool retry_tx)
 972 {
 973         struct ath_hw *ah = sc->sc_ah;
 974         struct ath_common *common = ath9k_hw_common(ah);
 975         struct ieee80211_hw *hw = sc->hw;
 976         int r;
 977
 978         /* Stop ANI */
 979         del_timer_sync(&common->ani.timer);
 980
 981         spin_lock_bh(&sc->sc_pcu_lock);
 982
 983         ieee80211_stop_queues(hw);
 984
 985         ath9k_hw_disable_interrupts(ah);
 986         ath_drain_all_txq(sc, retry_tx);
 987
 988         ath_stoprecv(sc);
 989         ath_flushrecv(sc);
 990
 991         r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
 992         if (r)
 993                 ath_print(common, ATH_DBG_FATAL,
 994                           "Unable to reset hardware; reset status %d\n", r);
 995
 996         if (ath_startrecv(sc) != 0)
 997                 ath_print(common, ATH_DBG_FATAL,
 998                           "Unable to start recv logic\n");
 999
1000         /*
1001          * We may be doing a reset in response to a request
1002          * that changes the channel so update any state that
1003          * might change as a result.
1004          */
1005         ath_update_txpow(sc);
1006
1007         if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
1008                 ath_beacon_config(sc, NULL);    /* restart beacons */
1009
1010         ath9k_hw_set_interrupts(ah, ah->imask);
1011
1012         if (retry_tx) {
1013                 int i;
1014                 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1015                         if (ATH_TXQ_SETUP(sc, i)) {
1016                                 spin_lock_bh(&sc->tx.txq[i].axq_lock);
1017                                 ath_txq_schedule(sc, &sc->tx.txq[i]);
1018                                 spin_unlock_bh(&sc->tx.txq[i].axq_lock);
1019                         }
1020                 }
1021         }
1022
1023         ieee80211_wake_queues(hw);
1024         spin_unlock_bh(&sc->sc_pcu_lock);
1025
1026         /* Start ANI */
1027         ath_start_ani(common);
1028
1029         return r;
1030 }
1031
1032 /* XXX: Remove me once we don't depend on ath9k_channel for all
1033  * this redundant data */
1034 void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
1035                            struct ath9k_channel *ichan)
1036 {
1037         struct ieee80211_channel *chan = hw->conf.channel;
1038         struct ieee80211_conf *conf = &hw->conf;
1039
1040         ichan->channel = chan->center_freq;
1041         ichan->chan = chan;
1042
1043         if (chan->band == IEEE80211_BAND_2GHZ) {
1044                 ichan->chanmode = CHANNEL_G;
1045                 ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
1046         } else {
1047                 ichan->chanmode = CHANNEL_A;
1048                 ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
1049         }
1050
1051         if (conf_is_ht(conf))
1052                 ichan->chanmode = ath_get_extchanmode(sc, chan,
1053                                             conf->channel_type);
1054 }
1055
1056 /**********************/
1057 /* mac80211 callbacks */
1058 /**********************/
1059
1060 static int ath9k_start(struct ieee80211_hw *hw)
1061 {
1062         struct ath_wiphy *aphy = hw->priv;
1063         struct ath_softc *sc = aphy->sc;
1064         struct ath_hw *ah = sc->sc_ah;
1065         struct ath_common *common = ath9k_hw_common(ah);
1066         struct ieee80211_channel *curchan = hw->conf.channel;
1067         struct ath9k_channel *init_channel;
1068         int r;
1069
1070         ath_print(common, ATH_DBG_CONFIG,
1071                   "Starting driver with initial channel: %d MHz\n",
1072                   curchan->center_freq);
1073
1074         mutex_lock(&sc->mutex);
1075
1076         if (ath9k_wiphy_started(sc)) {
1077                 if (sc->chan_idx == curchan->hw_value) {
1078                         /*
1079                          * Already on the operational channel, the new wiphy
1080                          * can be marked active.
1081                          */
1082                         aphy->state = ATH_WIPHY_ACTIVE;
1083                         ieee80211_wake_queues(hw);
1084                 } else {
1085                         /*
1086                          * Another wiphy is on another channel, start the new
1087                          * wiphy in paused state.
1088                          */
1089                         aphy->state = ATH_WIPHY_PAUSED;
1090                         ieee80211_stop_queues(hw);
1091                 }
1092                 mutex_unlock(&sc->mutex);
1093                 return 0;
1094         }
1095         aphy->state = ATH_WIPHY_ACTIVE;
1096
1097         /* setup initial channel */
1098
1099         sc->chan_idx = curchan->hw_value;
1100
1101         init_channel = ath_get_curchannel(sc, hw);
1102
1103         /* Reset SERDES registers */
1104         ath9k_hw_configpcipowersave(ah, 0, 0);
1105
1106         /*
1107          * The basic interface to setting the hardware in a good
1108          * state is ``reset''.  On return the hardware is known to
1109          * be powered up and with interrupts disabled.  This must
1110          * be followed by initialization of the appropriate bits
1111          * and then setup of the interrupt mask.
1112          */
1113         spin_lock_bh(&sc->sc_pcu_lock);
1114         r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
1115         if (r) {
1116                 ath_print(common, ATH_DBG_FATAL,
1117                           "Unable to reset hardware; reset status %d "
1118                           "(freq %u MHz)\n", r,
1119                           curchan->center_freq);
1120                 spin_unlock_bh(&sc->sc_pcu_lock);
1121                 goto mutex_unlock;
1122         }
1123
1124         /*
1125          * This is needed only to setup initial state
1126          * but it's best done after a reset.
1127          */
1128         ath_update_txpow(sc);
1129
1130         /*
1131          * Setup the hardware after reset:
1132          * The receive engine is set going.
1133          * Frame transmit is handled entirely
1134          * in the frame output path; there's nothing to do
1135          * here except setup the interrupt mask.
1136          */
1137         if (ath_startrecv(sc) != 0) {
1138                 ath_print(common, ATH_DBG_FATAL,
1139                           "Unable to start recv logic\n");
1140                 r = -EIO;
1141                 spin_unlock_bh(&sc->sc_pcu_lock);
1142                 goto mutex_unlock;
1143         }
1144         spin_unlock_bh(&sc->sc_pcu_lock);
1145
1146         /* Setup our intr mask. */
1147         ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
1148                     ATH9K_INT_RXORN | ATH9K_INT_FATAL |
1149                     ATH9K_INT_GLOBAL;
1150
1151         if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
1152                 ah->imask |= ATH9K_INT_RXHP |
1153                              ATH9K_INT_RXLP |
1154                              ATH9K_INT_BB_WATCHDOG;
1155         else
1156                 ah->imask |= ATH9K_INT_RX;
1157
1158         ah->imask |= ATH9K_INT_GTT;
1159
1160         if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
1161                 ah->imask |= ATH9K_INT_CST;
1162
1163         sc->sc_flags &= ~SC_OP_INVALID;
1164         sc->sc_ah->is_monitoring = false;
1165
1166         /* Disable BMISS interrupt when we're not associated */
1167         ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
1168         ath9k_hw_set_interrupts(ah, ah->imask);
1169
1170         ieee80211_wake_queues(hw);
1171
1172         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1173
1174         if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
1175             !ah->btcoex_hw.enabled) {
1176                 ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
1177                                            AR_STOMP_LOW_WLAN_WGHT);
1178                 ath9k_hw_btcoex_enable(ah);
1179
1180                 if (common->bus_ops->bt_coex_prep)
1181                         common->bus_ops->bt_coex_prep(common);
1182                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1183                         ath9k_btcoex_timer_resume(sc);
1184         }
1185
1186         pm_qos_update_request(&sc->pm_qos_req, 55);
1187
1188 mutex_unlock:
1189         mutex_unlock(&sc->mutex);
1190
1191         return r;
1192 }
1193
1194 static int ath9k_tx(struct ieee80211_hw *hw,
1195                     struct sk_buff *skb)
1196 {
1197         struct ath_wiphy *aphy = hw->priv;
1198         struct ath_softc *sc = aphy->sc;
1199         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1200         struct ath_tx_control txctl;
1201         struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
1202
1203         if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
1204                 ath_print(common, ATH_DBG_XMIT,
1205                           "ath9k: %s: TX in unexpected wiphy state "
1206                           "%d\n", wiphy_name(hw->wiphy), aphy->state);
1207                 goto exit;
1208         }
1209
1210         if (sc->ps_enabled) {
1211                 /*
1212                  * mac80211 does not set PM field for normal data frames, so we
1213                  * need to update that based on the current PS mode.
1214                  */
1215                 if (ieee80211_is_data(hdr->frame_control) &&
1216                     !ieee80211_is_nullfunc(hdr->frame_control) &&
1217                     !ieee80211_has_pm(hdr->frame_control)) {
1218                         ath_print(common, ATH_DBG_PS, "Add PM=1 for a TX frame "
1219                                   "while in PS mode\n");
1220                         hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
1221                 }
1222         }
1223
1224         if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
1225                 /*
1226                  * We are using PS-Poll and mac80211 can request TX while in
1227                  * power save mode. Need to wake up hardware for the TX to be
1228                  * completed and if needed, also for RX of buffered frames.
1229                  */
1230                 ath9k_ps_wakeup(sc);
1231                 if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
1232                         ath9k_hw_setrxabort(sc->sc_ah, 0);
1233                 if (ieee80211_is_pspoll(hdr->frame_control)) {
1234                         ath_print(common, ATH_DBG_PS,
1235                                   "Sending PS-Poll to pick a buffered frame\n");
1236                         sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
1237                 } else {
1238                         ath_print(common, ATH_DBG_PS,
1239                                   "Wake up to complete TX\n");
1240                         sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
1241                 }
1242                 /*
1243                  * The actual restore operation will happen only after
1244                  * the sc_flags bit is cleared. We are just dropping
1245                  * the ps_usecount here.
1246                  */
1247                 ath9k_ps_restore(sc);
1248         }
1249
1250         memset(&txctl, 0, sizeof(struct ath_tx_control));
1251         txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
1252
1253         ath_print(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
1254
1255         if (ath_tx_start(hw, skb, &txctl) != 0) {
1256                 ath_print(common, ATH_DBG_XMIT, "TX failed\n");
1257                 goto exit;
1258         }
1259
1260         return 0;
1261 exit:
1262         dev_kfree_skb_any(skb);
1263         return 0;
1264 }
1265
1266 static void ath9k_stop(struct ieee80211_hw *hw)
1267 {
1268         struct ath_wiphy *aphy = hw->priv;
1269         struct ath_softc *sc = aphy->sc;
1270         struct ath_hw *ah = sc->sc_ah;
1271         struct ath_common *common = ath9k_hw_common(ah);
1272         int i;
1273
1274         mutex_lock(&sc->mutex);
1275
1276         aphy->state = ATH_WIPHY_INACTIVE;
1277
1278         if (led_blink)
1279                 cancel_delayed_work_sync(&sc->ath_led_blink_work);
1280
1281         cancel_delayed_work_sync(&sc->tx_complete_work);
1282         cancel_work_sync(&sc->paprd_work);
1283         cancel_work_sync(&sc->hw_check_work);
1284
1285         for (i = 0; i < sc->num_sec_wiphy; i++) {
1286                 if (sc->sec_wiphy[i])
1287                         break;
1288         }
1289
1290         if (i == sc->num_sec_wiphy) {
1291                 cancel_delayed_work_sync(&sc->wiphy_work);
1292                 cancel_work_sync(&sc->chan_work);
1293         }
1294
1295         if (sc->sc_flags & SC_OP_INVALID) {
1296                 ath_print(common, ATH_DBG_ANY, "Device not present\n");
1297                 mutex_unlock(&sc->mutex);
1298                 return;
1299         }
1300
1301         if (ath9k_wiphy_started(sc)) {
1302                 mutex_unlock(&sc->mutex);
1303                 return; /* another wiphy still in use */
1304         }
1305
1306         /* Ensure HW is awake when we try to shut it down. */
1307         ath9k_ps_wakeup(sc);
1308
1309         if (ah->btcoex_hw.enabled) {
1310                 ath9k_hw_btcoex_disable(ah);
1311                 if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
1312                         ath9k_btcoex_timer_pause(sc);
1313         }
1314
1315         spin_lock_bh(&sc->sc_pcu_lock);
1316
1317         /* make sure h/w will not generate any interrupt
1318          * before setting the invalid flag. */
1319         ath9k_hw_disable_interrupts(ah);
1320
1321         if (!(sc->sc_flags & SC_OP_INVALID)) {
1322                 ath_drain_all_txq(sc, false);
1323                 ath_stoprecv(sc);
1324                 ath9k_hw_phy_disable(ah);
1325         } else
1326                 sc->rx.rxlink = NULL;
1327
1328         /* disable HAL and put h/w to sleep */
1329         ath9k_hw_disable(ah);
1330         ath9k_hw_configpcipowersave(ah, 1, 1);
1331
1332         spin_unlock_bh(&sc->sc_pcu_lock);
1333
1334         ath9k_ps_restore(sc);
1335
1336         /* Finally, put the chip in FULL SLEEP mode */
1337         ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
1338
1339         sc->sc_flags |= SC_OP_INVALID;
1340
1341         pm_qos_update_request(&sc->pm_qos_req, PM_QOS_DEFAULT_VALUE);
1342
1343         mutex_unlock(&sc->mutex);
1344
1345         ath_print(common, ATH_DBG_CONFIG, "Driver halt\n");
1346 }
1347
1348 static int ath9k_add_interface(struct ieee80211_hw *hw,
1349                                struct ieee80211_vif *vif)
1350 {
1351         struct ath_wiphy *aphy = hw->priv;
1352         struct ath_softc *sc = aphy->sc;
1353         struct ath_hw *ah = sc->sc_ah;
1354         struct ath_common *common = ath9k_hw_common(ah);
1355         struct ath_vif *avp = (void *)vif->drv_priv;
1356         enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
1357         int ret = 0;
1358
1359         mutex_lock(&sc->mutex);
1360
1361         switch (vif->type) {
1362         case NL80211_IFTYPE_STATION:
1363                 ic_opmode = NL80211_IFTYPE_STATION;
1364                 break;
1365         case NL80211_IFTYPE_WDS:
1366                 ic_opmode = NL80211_IFTYPE_WDS;
1367                 break;
1368         case NL80211_IFTYPE_ADHOC:
1369         case NL80211_IFTYPE_AP:
1370         case NL80211_IFTYPE_MESH_POINT:
1371                 if (sc->nbcnvifs >= ATH_BCBUF) {
1372                         ret = -ENOBUFS;
1373                         goto out;
1374                 }
1375                 ic_opmode = vif->type;
1376                 break;
1377         default:
1378                 ath_print(common, ATH_DBG_FATAL,
1379                         "Interface type %d not yet supported\n", vif->type);
1380                 ret = -EOPNOTSUPP;
1381                 goto out;
1382         }
1383
1384         ath_print(common, ATH_DBG_CONFIG,
1385                   "Attach a VIF of type: %d\n", ic_opmode);
1386
1387         /* Set the VIF opmode */
1388         avp->av_opmode = ic_opmode;
1389         avp->av_bslot = -1;
1390
1391         sc->nvifs++;
1392
1393         ath9k_set_bssid_mask(hw, vif);
1394
1395         if (sc->nvifs > 1)
1396                 goto out; /* skip global settings for secondary vif */
1397
1398         if (ic_opmode == NL80211_IFTYPE_AP) {
1399                 ath9k_hw_set_tsfadjust(ah, 1);
1400                 sc->sc_flags |= SC_OP_TSF_RESET;
1401         }
1402
1403         /* Set the device opmode */
1404         ah->opmode = ic_opmode;
1405
1406         /*
1407          * Enable MIB interrupts when there are hardware phy counters.
1408          * Note we only do this (at the moment) for station mode.
1409          */
1410         if ((vif->type == NL80211_IFTYPE_STATION) ||
1411             (vif->type == NL80211_IFTYPE_ADHOC) ||
1412             (vif->type == NL80211_IFTYPE_MESH_POINT)) {
1413                 if (ah->config.enable_ani)
1414                         ah->imask |= ATH9K_INT_MIB;
1415                 ah->imask |= ATH9K_INT_TSFOOR;
1416         }
1417
1418         ath9k_hw_set_interrupts(ah, ah->imask);
1419
1420         if (vif->type == NL80211_IFTYPE_AP    ||
1421             vif->type == NL80211_IFTYPE_ADHOC) {
1422                 sc->sc_flags |= SC_OP_ANI_RUN;
1423                 ath_start_ani(common);
1424         }
1425
1426 out:
1427         mutex_unlock(&sc->mutex);
1428         return ret;
1429 }
1430
1431 static void ath9k_remove_interface(struct ieee80211_hw *hw,
1432                                    struct ieee80211_vif *vif)
1433 {
1434         struct ath_wiphy *aphy = hw->priv;
1435         struct ath_softc *sc = aphy->sc;
1436         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1437         struct ath_vif *avp = (void *)vif->drv_priv;
1438         bool bs_valid = false;
1439         int i;
1440
1441         ath_print(common, ATH_DBG_CONFIG, "Detach Interface\n");
1442
1443         mutex_lock(&sc->mutex);
1444
1445         /* Stop ANI */
1446         sc->sc_flags &= ~SC_OP_ANI_RUN;
1447         del_timer_sync(&common->ani.timer);
1448
1449         /* Reclaim beacon resources */
1450         if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
1451             (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
1452             (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) {
1453                 ath9k_ps_wakeup(sc);
1454                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1455                 ath9k_ps_restore(sc);
1456         }
1457
1458         ath_beacon_return(sc, avp);
1459         sc->sc_flags &= ~SC_OP_BEACONS;
1460
1461         for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
1462                 if (sc->beacon.bslot[i] == vif) {
1463                         printk(KERN_DEBUG "%s: vif had allocated beacon "
1464                                "slot\n", __func__);
1465                         sc->beacon.bslot[i] = NULL;
1466                         sc->beacon.bslot_aphy[i] = NULL;
1467                 } else if (sc->beacon.bslot[i])
1468                         bs_valid = true;
1469         }
1470         if (!bs_valid && (sc->sc_ah->imask & ATH9K_INT_SWBA)) {
1471                 /* Disable SWBA interrupt */
1472                 sc->sc_ah->imask &= ~ATH9K_INT_SWBA;
1473                 ath9k_ps_wakeup(sc);
1474                 ath9k_hw_set_interrupts(sc->sc_ah, sc->sc_ah->imask);
1475                 ath9k_ps_restore(sc);
1476         }
1477
1478         sc->nvifs--;
1479
1480         mutex_unlock(&sc->mutex);
1481 }
1482
1483 static void ath9k_enable_ps(struct ath_softc *sc)
1484 {
1485         struct ath_hw *ah = sc->sc_ah;
1486
1487         sc->ps_enabled = true;
1488         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1489                 if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
1490                         ah->imask |= ATH9K_INT_TIM_TIMER;
1491                         ath9k_hw_set_interrupts(ah, ah->imask);
1492                 }
1493                 ath9k_hw_setrxabort(ah, 1);
1494         }
1495 }
1496
1497 static void ath9k_disable_ps(struct ath_softc *sc)
1498 {
1499         struct ath_hw *ah = sc->sc_ah;
1500
1501         sc->ps_enabled = false;
1502         ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
1503         if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
1504                 ath9k_hw_setrxabort(ah, 0);
1505                 sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
1506                                   PS_WAIT_FOR_CAB |
1507                                   PS_WAIT_FOR_PSPOLL_DATA |
1508                                   PS_WAIT_FOR_TX_ACK);
1509                 if (ah->imask & ATH9K_INT_TIM_TIMER) {
1510                         ah->imask &= ~ATH9K_INT_TIM_TIMER;
1511                         ath9k_hw_set_interrupts(ah, ah->imask);
1512                 }
1513         }
1514
1515 }
1516
1517 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
1518 {
1519         struct ath_wiphy *aphy = hw->priv;
1520         struct ath_softc *sc = aphy->sc;
1521         struct ath_hw *ah = sc->sc_ah;
1522         struct ath_common *common = ath9k_hw_common(ah);
1523         struct ieee80211_conf *conf = &hw->conf;
1524         bool disable_radio;
1525
1526         mutex_lock(&sc->mutex);
1527
1528         /*
1529          * Leave this as the first check because we need to turn on the
1530          * radio if it was disabled before prior to processing the rest
1531          * of the changes. Likewise we must only disable the radio towards
1532          * the end.
1533          */
1534         if (changed & IEEE80211_CONF_CHANGE_IDLE) {
1535                 bool enable_radio;
1536                 bool all_wiphys_idle;
1537                 bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
1538
1539                 spin_lock_bh(&sc->wiphy_lock);
1540                 all_wiphys_idle =  ath9k_all_wiphys_idle(sc);
1541                 ath9k_set_wiphy_idle(aphy, idle);
1542
1543                 enable_radio = (!idle && all_wiphys_idle);
1544
1545                 /*
1546                  * After we unlock here its possible another wiphy
1547                  * can be re-renabled so to account for that we will
1548                  * only disable the radio toward the end of this routine
1549                  * if by then all wiphys are still idle.
1550                  */
1551                 spin_unlock_bh(&sc->wiphy_lock);
1552
1553                 if (enable_radio) {
1554                         sc->ps_idle = false;
1555                         ath_radio_enable(sc, hw);
1556                         ath_print(common, ATH_DBG_CONFIG,
1557                                   "not-idle: enabling radio\n");
1558                 }
1559         }
1560
1561         /*
1562          * We just prepare to enable PS. We have to wait until our AP has
1563          * ACK'd our null data frame to disable RX otherwise we'll ignore
1564          * those ACKs and end up retransmitting the same null data frames.
1565          * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
1566          */
1567         if (changed & IEEE80211_CONF_CHANGE_PS) {
1568                 unsigned long flags;
1569                 spin_lock_irqsave(&sc->sc_pm_lock, flags);
1570                 if (conf->flags & IEEE80211_CONF_PS)
1571                         ath9k_enable_ps(sc);
1572                 else
1573                         ath9k_disable_ps(sc);
1574                 spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
1575         }
1576
1577         if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
1578                 if (conf->flags & IEEE80211_CONF_MONITOR) {
1579                         ath_print(common, ATH_DBG_CONFIG,
1580                                   "Monitor mode is enabled\n");
1581                         sc->sc_ah->is_monitoring = true;
1582                 } else {
1583                         ath_print(common, ATH_DBG_CONFIG,
1584                                   "Monitor mode is disabled\n");
1585                         sc->sc_ah->is_monitoring = false;
1586                 }
1587         }
1588
1589         if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1590                 struct ieee80211_channel *curchan = hw->conf.channel;
1591                 int pos = curchan->hw_value;
1592                 int old_pos = -1;
1593                 unsigned long flags;
1594
1595                 if (ah->curchan)
1596                         old_pos = ah->curchan - &ah->channels[0];
1597
1598                 aphy->chan_idx = pos;
1599                 aphy->chan_is_ht = conf_is_ht(conf);
1600                 if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
1601                         sc->sc_flags |= SC_OP_OFFCHANNEL;
1602                 else
1603                         sc->sc_flags &= ~SC_OP_OFFCHANNEL;
1604
1605                 if (aphy->state == ATH_WIPHY_SCAN ||
1606                     aphy->state == ATH_WIPHY_ACTIVE)
1607                         ath9k_wiphy_pause_all_forced(sc, aphy);
1608                 else {
1609                         /*
1610                          * Do not change operational channel based on a paused
1611                          * wiphy changes.
1612                          */
1613                         goto skip_chan_change;
1614                 }
1615
1616                 ath_print(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
1617                           curchan->center_freq);
1618
1619                 /* XXX: remove me eventualy */
1620                 ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
1621
1622                 ath_update_chainmask(sc, conf_is_ht(conf));
1623
1624                 /* update survey stats for the old channel before switching */
1625                 spin_lock_irqsave(&common->cc_lock, flags);
1626                 ath_update_survey_stats(sc);
1627                 spin_unlock_irqrestore(&common->cc_lock, flags);
1628
1629                 /*
1630                  * If the operating channel changes, change the survey in-use flags
1631                  * along with it.
1632                  * Reset the survey data for the new channel, unless we're switching
1633                  * back to the operating channel from an off-channel operation.
1634                  */
1635                 if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
1636                     sc->cur_survey != &sc->survey[pos]) {
1637
1638                         if (sc->cur_survey)
1639                                 sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
1640
1641                         sc->cur_survey = &sc->survey[pos];
1642
1643                         memset(sc->cur_survey, 0, sizeof(struct survey_info));
1644                         sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
1645                 } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
1646                         memset(&sc->survey[pos], 0, sizeof(struct survey_info));
1647                 }
1648
1649                 if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
1650                         ath_print(common, ATH_DBG_FATAL,
1651                                   "Unable to set channel\n");
1652                         mutex_unlock(&sc->mutex);
1653                         return -EINVAL;
1654                 }
1655
1656                 /*
1657                  * The most recent snapshot of channel->noisefloor for the old
1658                  * channel is only available after the hardware reset. Copy it to
1659                  * the survey stats now.
1660                  */
1661                 if (old_pos >= 0)
1662                         ath_update_survey_nf(sc, old_pos);
1663         }
1664
1665 skip_chan_change:
1666         if (changed & IEEE80211_CONF_CHANGE_POWER) {
1667                 sc->config.txpowlimit = 2 * conf->power_level;
1668                 ath_update_txpow(sc);
1669         }
1670
1671         spin_lock_bh(&sc->wiphy_lock);
1672         disable_radio = ath9k_all_wiphys_idle(sc);
1673         spin_unlock_bh(&sc->wiphy_lock);
1674
1675         if (disable_radio) {
1676                 ath_print(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
1677                 sc->ps_idle = true;
1678                 ath_radio_disable(sc, hw);
1679         }
1680
1681         mutex_unlock(&sc->mutex);
1682
1683         return 0;
1684 }
1685
1686 #define SUPPORTED_FILTERS                       \
1687         (FIF_PROMISC_IN_BSS |                   \
1688         FIF_ALLMULTI |                          \
1689         FIF_CONTROL |                           \
1690         FIF_PSPOLL |                            \
1691         FIF_OTHER_BSS |                         \
1692         FIF_BCN_PRBRESP_PROMISC |               \
1693         FIF_PROBE_REQ |                         \
1694         FIF_FCSFAIL)
1695
1696 /* FIXME: sc->sc_full_reset ? */
1697 static void ath9k_configure_filter(struct ieee80211_hw *hw,
1698                                    unsigned int changed_flags,
1699                                    unsigned int *total_flags,
1700                                    u64 multicast)
1701 {
1702         struct ath_wiphy *aphy = hw->priv;
1703         struct ath_softc *sc = aphy->sc;
1704         u32 rfilt;
1705
1706         changed_flags &= SUPPORTED_FILTERS;
1707         *total_flags &= SUPPORTED_FILTERS;
1708
1709         sc->rx.rxfilter = *total_flags;
1710         ath9k_ps_wakeup(sc);
1711         rfilt = ath_calcrxfilter(sc);
1712         ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
1713         ath9k_ps_restore(sc);
1714
1715         ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
1716                   "Set HW RX filter: 0x%x\n", rfilt);
1717 }
1718
1719 static int ath9k_sta_add(struct ieee80211_hw *hw,
1720                          struct ieee80211_vif *vif,
1721                          struct ieee80211_sta *sta)
1722 {
1723         struct ath_wiphy *aphy = hw->priv;
1724         struct ath_softc *sc = aphy->sc;
1725
1726         ath_node_attach(sc, sta);
1727
1728         return 0;
1729 }
1730
1731 static int ath9k_sta_remove(struct ieee80211_hw *hw,
1732                             struct ieee80211_vif *vif,
1733                             struct ieee80211_sta *sta)
1734 {
1735         struct ath_wiphy *aphy = hw->priv;
1736         struct ath_softc *sc = aphy->sc;
1737
1738         ath_node_detach(sc, sta);
1739
1740         return 0;
1741 }
1742
1743 static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
1744                          const struct ieee80211_tx_queue_params *params)
1745 {
1746         struct ath_wiphy *aphy = hw->priv;
1747         struct ath_softc *sc = aphy->sc;
1748         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1749         struct ath_txq *txq;
1750         struct ath9k_tx_queue_info qi;
1751         int ret = 0;
1752
1753         if (queue >= WME_NUM_AC)
1754                 return 0;
1755
1756         txq = sc->tx.txq_map[queue];
1757
1758         mutex_lock(&sc->mutex);
1759
1760         memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
1761
1762         qi.tqi_aifs = params->aifs;
1763         qi.tqi_cwmin = params->cw_min;
1764         qi.tqi_cwmax = params->cw_max;
1765         qi.tqi_burstTime = params->txop;
1766
1767         ath_print(common, ATH_DBG_CONFIG,
1768                   "Configure tx [queue/halq] [%d/%d],  "
1769                   "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
1770                   queue, txq->axq_qnum, params->aifs, params->cw_min,
1771                   params->cw_max, params->txop);
1772
1773         ret = ath_txq_update(sc, txq->axq_qnum, &qi);
1774         if (ret)
1775                 ath_print(common, ATH_DBG_FATAL, "TXQ Update failed\n");
1776
1777         if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
1778                 if (queue == WME_AC_BE && !ret)
1779                         ath_beaconq_config(sc);
1780
1781         mutex_unlock(&sc->mutex);
1782
1783         return ret;
1784 }
1785
1786 static int ath9k_set_key(struct ieee80211_hw *hw,
1787                          enum set_key_cmd cmd,
1788                          struct ieee80211_vif *vif,
1789                          struct ieee80211_sta *sta,
1790                          struct ieee80211_key_conf *key)
1791 {
1792         struct ath_wiphy *aphy = hw->priv;
1793         struct ath_softc *sc = aphy->sc;
1794         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1795         int ret = 0;
1796
1797         if (modparam_nohwcrypt)
1798                 return -ENOSPC;
1799
1800         mutex_lock(&sc->mutex);
1801         ath9k_ps_wakeup(sc);
1802         ath_print(common, ATH_DBG_CONFIG, "Set HW Key\n");
1803
1804         switch (cmd) {
1805         case SET_KEY:
1806                 ret = ath_key_config(common, vif, sta, key);
1807                 if (ret >= 0) {
1808                         key->hw_key_idx = ret;
1809                         /* push IV and Michael MIC generation to stack */
1810                         key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
1811                         if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
1812                                 key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
1813                         if (sc->sc_ah->sw_mgmt_crypto &&
1814                             key->cipher == WLAN_CIPHER_SUITE_CCMP)
1815                                 key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
1816                         ret = 0;
1817                 }
1818                 break;
1819         case DISABLE_KEY:
1820                 ath_key_delete(common, key);
1821                 break;
1822         default:
1823                 ret = -EINVAL;
1824         }
1825
1826         ath9k_ps_restore(sc);
1827         mutex_unlock(&sc->mutex);
1828
1829         return ret;
1830 }
1831
1832 static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
1833                                    struct ieee80211_vif *vif,
1834                                    struct ieee80211_bss_conf *bss_conf,
1835                                    u32 changed)
1836 {
1837         struct ath_wiphy *aphy = hw->priv;
1838         struct ath_softc *sc = aphy->sc;
1839         struct ath_hw *ah = sc->sc_ah;
1840         struct ath_common *common = ath9k_hw_common(ah);
1841         struct ath_vif *avp = (void *)vif->drv_priv;
1842         int slottime;
1843         int error;
1844
1845         mutex_lock(&sc->mutex);
1846
1847         if (changed & BSS_CHANGED_BSSID) {
1848                 /* Set BSSID */
1849                 memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
1850                 memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
1851                 common->curaid = 0;
1852                 ath9k_hw_write_associd(ah);
1853
1854                 /* Set aggregation protection mode parameters */
1855                 sc->config.ath_aggr_prot = 0;
1856
1857                 /* Only legacy IBSS for now */
1858                 if (vif->type == NL80211_IFTYPE_ADHOC)
1859                         ath_update_chainmask(sc, 0);
1860
1861                 ath_print(common, ATH_DBG_CONFIG,
1862                           "BSSID: %pM aid: 0x%x\n",
1863                           common->curbssid, common->curaid);
1864
1865                 /* need to reconfigure the beacon */
1866                 sc->sc_flags &= ~SC_OP_BEACONS ;
1867         }
1868
1869         /* Enable transmission of beacons (AP, IBSS, MESH) */
1870         if ((changed & BSS_CHANGED_BEACON) ||
1871             ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
1872                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1873                 error = ath_beacon_alloc(aphy, vif);
1874                 if (!error)
1875                         ath_beacon_config(sc, vif);
1876         }
1877
1878         if (changed & BSS_CHANGED_ERP_SLOT) {
1879                 if (bss_conf->use_short_slot)
1880                         slottime = 9;
1881                 else
1882                         slottime = 20;
1883                 if (vif->type == NL80211_IFTYPE_AP) {
1884                         /*
1885                          * Defer update, so that connected stations can adjust
1886                          * their settings at the same time.
1887                          * See beacon.c for more details
1888                          */
1889                         sc->beacon.slottime = slottime;
1890                         sc->beacon.updateslot = UPDATE;
1891                 } else {
1892                         ah->slottime = slottime;
1893                         ath9k_hw_init_global_settings(ah);
1894                 }
1895         }
1896
1897         /* Disable transmission of beacons */
1898         if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
1899                 ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1900
1901         if (changed & BSS_CHANGED_BEACON_INT) {
1902                 sc->beacon_interval = bss_conf->beacon_int;
1903                 /*
1904                  * In case of AP mode, the HW TSF has to be reset
1905                  * when the beacon interval changes.
1906                  */
1907                 if (vif->type == NL80211_IFTYPE_AP) {
1908                         sc->sc_flags |= SC_OP_TSF_RESET;
1909                         ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
1910                         error = ath_beacon_alloc(aphy, vif);
1911                         if (!error)
1912                                 ath_beacon_config(sc, vif);
1913                 } else {
1914                         ath_beacon_config(sc, vif);
1915                 }
1916         }
1917
1918         if (changed & BSS_CHANGED_ERP_PREAMBLE) {
1919                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
1920                           bss_conf->use_short_preamble);
1921                 if (bss_conf->use_short_preamble)
1922                         sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
1923                 else
1924                         sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
1925         }
1926
1927         if (changed & BSS_CHANGED_ERP_CTS_PROT) {
1928                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
1929                           bss_conf->use_cts_prot);
1930                 if (bss_conf->use_cts_prot &&
1931                     hw->conf.channel->band != IEEE80211_BAND_5GHZ)
1932                         sc->sc_flags |= SC_OP_PROTECT_ENABLE;
1933                 else
1934                         sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
1935         }
1936
1937         if (changed & BSS_CHANGED_ASSOC) {
1938                 ath_print(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
1939                         bss_conf->assoc);
1940                 ath9k_bss_assoc_info(sc, hw, vif, bss_conf);
1941         }
1942
1943         mutex_unlock(&sc->mutex);
1944 }
1945
1946 static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
1947 {
1948         u64 tsf;
1949         struct ath_wiphy *aphy = hw->priv;
1950         struct ath_softc *sc = aphy->sc;
1951
1952         mutex_lock(&sc->mutex);
1953         tsf = ath9k_hw_gettsf64(sc->sc_ah);
1954         mutex_unlock(&sc->mutex);
1955
1956         return tsf;
1957 }
1958
1959 static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
1960 {
1961         struct ath_wiphy *aphy = hw->priv;
1962         struct ath_softc *sc = aphy->sc;
1963
1964         mutex_lock(&sc->mutex);
1965         ath9k_hw_settsf64(sc->sc_ah, tsf);
1966         mutex_unlock(&sc->mutex);
1967 }
1968
1969 static void ath9k_reset_tsf(struct ieee80211_hw *hw)
1970 {
1971         struct ath_wiphy *aphy = hw->priv;
1972         struct ath_softc *sc = aphy->sc;
1973
1974         mutex_lock(&sc->mutex);
1975
1976         ath9k_ps_wakeup(sc);
1977         ath9k_hw_reset_tsf(sc->sc_ah);
1978         ath9k_ps_restore(sc);
1979
1980         mutex_unlock(&sc->mutex);
1981 }
1982
1983 static int ath9k_ampdu_action(struct ieee80211_hw *hw,
1984                               struct ieee80211_vif *vif,
1985                               enum ieee80211_ampdu_mlme_action action,
1986                               struct ieee80211_sta *sta,
1987                               u16 tid, u16 *ssn)
1988 {
1989         struct ath_wiphy *aphy = hw->priv;
1990         struct ath_softc *sc = aphy->sc;
1991         int ret = 0;
1992
1993         local_bh_disable();
1994
1995         switch (action) {
1996         case IEEE80211_AMPDU_RX_START:
1997                 if (!(sc->sc_flags & SC_OP_RXAGGR))
1998                         ret = -ENOTSUPP;
1999                 break;
2000         case IEEE80211_AMPDU_RX_STOP:
2001                 break;
2002         case IEEE80211_AMPDU_TX_START:
2003                 if (!(sc->sc_flags & SC_OP_TXAGGR))
2004                         return -EOPNOTSUPP;
2005
2006                 ath9k_ps_wakeup(sc);
2007                 ret = ath_tx_aggr_start(sc, sta, tid, ssn);
2008                 if (!ret)
2009                         ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2010                 ath9k_ps_restore(sc);
2011                 break;
2012         case IEEE80211_AMPDU_TX_STOP:
2013                 ath9k_ps_wakeup(sc);
2014                 ath_tx_aggr_stop(sc, sta, tid);
2015                 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
2016                 ath9k_ps_restore(sc);
2017                 break;
2018         case IEEE80211_AMPDU_TX_OPERATIONAL:
2019                 ath9k_ps_wakeup(sc);
2020                 ath_tx_aggr_resume(sc, sta, tid);
2021                 ath9k_ps_restore(sc);
2022                 break;
2023         default:
2024                 ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
2025                           "Unknown AMPDU action\n");
2026         }
2027
2028         local_bh_enable();
2029
2030         return ret;
2031 }
2032
2033 static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
2034                              struct survey_info *survey)
2035 {
2036         struct ath_wiphy *aphy = hw->priv;
2037         struct ath_softc *sc = aphy->sc;
2038         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2039         struct ieee80211_supported_band *sband;
2040         struct ieee80211_channel *chan;
2041         unsigned long flags;
2042         int pos;
2043
2044         spin_lock_irqsave(&common->cc_lock, flags);
2045         if (idx == 0)
2046                 ath_update_survey_stats(sc);
2047
2048         sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
2049         if (sband && idx >= sband->n_channels) {
2050                 idx -= sband->n_channels;
2051                 sband = NULL;
2052         }
2053
2054         if (!sband)
2055                 sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
2056
2057         if (!sband || idx >= sband->n_channels) {
2058                 spin_unlock_irqrestore(&common->cc_lock, flags);
2059                 return -ENOENT;
2060         }
2061
2062         chan = &sband->channels[idx];
2063         pos = chan->hw_value;
2064         memcpy(survey, &sc->survey[pos], sizeof(*survey));
2065         survey->channel = chan;
2066         spin_unlock_irqrestore(&common->cc_lock, flags);
2067
2068         return 0;
2069 }
2070
2071 static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
2072 {
2073         struct ath_wiphy *aphy = hw->priv;
2074         struct ath_softc *sc = aphy->sc;
2075
2076         mutex_lock(&sc->mutex);
2077         if (ath9k_wiphy_scanning(sc)) {
2078                 /*
2079                  * There is a race here in mac80211 but fixing it requires
2080                  * we revisit how we handle the scan complete callback.
2081                  * After mac80211 fixes we will not have configured hardware
2082                  * to the home channel nor would we have configured the RX
2083                  * filter yet.
2084                  */
2085                 mutex_unlock(&sc->mutex);
2086                 return;
2087         }
2088
2089         aphy->state = ATH_WIPHY_SCAN;
2090         ath9k_wiphy_pause_all_forced(sc, aphy);
2091         mutex_unlock(&sc->mutex);
2092 }
2093
2094 /*
2095  * XXX: this requires a revisit after the driver
2096  * scan_complete gets moved to another place/removed in mac80211.
2097  */
2098 static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
2099 {
2100         struct ath_wiphy *aphy = hw->priv;
2101         struct ath_softc *sc = aphy->sc;
2102
2103         mutex_lock(&sc->mutex);
2104         aphy->state = ATH_WIPHY_ACTIVE;
2105         mutex_unlock(&sc->mutex);
2106 }
2107
2108 static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
2109 {
2110         struct ath_wiphy *aphy = hw->priv;
2111         struct ath_softc *sc = aphy->sc;
2112         struct ath_hw *ah = sc->sc_ah;
2113
2114         mutex_lock(&sc->mutex);
2115         ah->coverage_class = coverage_class;
2116         ath9k_hw_init_global_settings(ah);
2117         mutex_unlock(&sc->mutex);
2118 }
2119
2120 struct ieee80211_ops ath9k_ops = {
2121         .tx                 = ath9k_tx,
2122         .start              = ath9k_start,
2123         .stop               = ath9k_stop,
2124         .add_interface      = ath9k_add_interface,
2125         .remove_interface   = ath9k_remove_interface,
2126         .config             = ath9k_config,
2127         .configure_filter   = ath9k_configure_filter,
2128         .sta_add            = ath9k_sta_add,
2129         .sta_remove         = ath9k_sta_remove,
2130         .conf_tx            = ath9k_conf_tx,
2131         .bss_info_changed   = ath9k_bss_info_changed,
2132         .set_key            = ath9k_set_key,
2133         .get_tsf            = ath9k_get_tsf,
2134         .set_tsf            = ath9k_set_tsf,
2135         .reset_tsf          = ath9k_reset_tsf,
2136         .ampdu_action       = ath9k_ampdu_action,
2137         .get_survey         = ath9k_get_survey,
2138         .sw_scan_start      = ath9k_sw_scan_start,
2139         .sw_scan_complete   = ath9k_sw_scan_complete,
2140         .rfkill_poll        = ath9k_rfkill_poll_state,
2141         .set_coverage_class = ath9k_set_coverage_class,
2142 };