2 * ALSA SoC TWL4030 codec driver
4 * Author: Steve Sakoman, <steve@sakoman.com>
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
22 #include <linux/module.h>
23 #include <linux/moduleparam.h>
24 #include <linux/init.h>
25 #include <linux/delay.h>
27 #include <linux/i2c.h>
28 #include <linux/platform_device.h>
29 #include <linux/i2c/twl.h>
30 #include <linux/slab.h>
31 #include <sound/core.h>
32 #include <sound/pcm.h>
33 #include <sound/pcm_params.h>
34 #include <sound/soc.h>
35 #include <sound/soc-dapm.h>
36 #include <sound/initval.h>
37 #include <sound/tlv.h>
39 /* Register descriptions are here */
40 #include <linux/mfd/twl4030-codec.h>
42 /* Shadow register used by the audio driver */
43 #define TWL4030_REG_SW_SHADOW 0x4A
44 #define TWL4030_CACHEREGNUM (TWL4030_REG_SW_SHADOW + 1)
46 /* TWL4030_REG_SW_SHADOW (0x4A) Fields */
47 #define TWL4030_HFL_EN 0x01
48 #define TWL4030_HFR_EN 0x02
51 * twl4030 register cache & default register settings
53 static const u8 twl4030_reg[TWL4030_CACHEREGNUM] = {
54 0x00, /* this register not used */
55 0x00, /* REG_CODEC_MODE (0x1) */
56 0x00, /* REG_OPTION (0x2) */
57 0x00, /* REG_UNKNOWN (0x3) */
58 0x00, /* REG_MICBIAS_CTL (0x4) */
59 0x00, /* REG_ANAMICL (0x5) */
60 0x00, /* REG_ANAMICR (0x6) */
61 0x00, /* REG_AVADC_CTL (0x7) */
62 0x00, /* REG_ADCMICSEL (0x8) */
63 0x00, /* REG_DIGMIXING (0x9) */
64 0x0f, /* REG_ATXL1PGA (0xA) */
65 0x0f, /* REG_ATXR1PGA (0xB) */
66 0x0f, /* REG_AVTXL2PGA (0xC) */
67 0x0f, /* REG_AVTXR2PGA (0xD) */
68 0x00, /* REG_AUDIO_IF (0xE) */
69 0x00, /* REG_VOICE_IF (0xF) */
70 0x3f, /* REG_ARXR1PGA (0x10) */
71 0x3f, /* REG_ARXL1PGA (0x11) */
72 0x3f, /* REG_ARXR2PGA (0x12) */
73 0x3f, /* REG_ARXL2PGA (0x13) */
74 0x25, /* REG_VRXPGA (0x14) */
75 0x00, /* REG_VSTPGA (0x15) */
76 0x00, /* REG_VRX2ARXPGA (0x16) */
77 0x00, /* REG_AVDAC_CTL (0x17) */
78 0x00, /* REG_ARX2VTXPGA (0x18) */
79 0x32, /* REG_ARXL1_APGA_CTL (0x19) */
80 0x32, /* REG_ARXR1_APGA_CTL (0x1A) */
81 0x32, /* REG_ARXL2_APGA_CTL (0x1B) */
82 0x32, /* REG_ARXR2_APGA_CTL (0x1C) */
83 0x00, /* REG_ATX2ARXPGA (0x1D) */
84 0x00, /* REG_BT_IF (0x1E) */
85 0x55, /* REG_BTPGA (0x1F) */
86 0x00, /* REG_BTSTPGA (0x20) */
87 0x00, /* REG_EAR_CTL (0x21) */
88 0x00, /* REG_HS_SEL (0x22) */
89 0x00, /* REG_HS_GAIN_SET (0x23) */
90 0x00, /* REG_HS_POPN_SET (0x24) */
91 0x00, /* REG_PREDL_CTL (0x25) */
92 0x00, /* REG_PREDR_CTL (0x26) */
93 0x00, /* REG_PRECKL_CTL (0x27) */
94 0x00, /* REG_PRECKR_CTL (0x28) */
95 0x00, /* REG_HFL_CTL (0x29) */
96 0x00, /* REG_HFR_CTL (0x2A) */
97 0x05, /* REG_ALC_CTL (0x2B) */
98 0x00, /* REG_ALC_SET1 (0x2C) */
99 0x00, /* REG_ALC_SET2 (0x2D) */
100 0x00, /* REG_BOOST_CTL (0x2E) */
101 0x00, /* REG_SOFTVOL_CTL (0x2F) */
102 0x13, /* REG_DTMF_FREQSEL (0x30) */
103 0x00, /* REG_DTMF_TONEXT1H (0x31) */
104 0x00, /* REG_DTMF_TONEXT1L (0x32) */
105 0x00, /* REG_DTMF_TONEXT2H (0x33) */
106 0x00, /* REG_DTMF_TONEXT2L (0x34) */
107 0x79, /* REG_DTMF_TONOFF (0x35) */
108 0x11, /* REG_DTMF_WANONOFF (0x36) */
109 0x00, /* REG_I2S_RX_SCRAMBLE_H (0x37) */
110 0x00, /* REG_I2S_RX_SCRAMBLE_M (0x38) */
111 0x00, /* REG_I2S_RX_SCRAMBLE_L (0x39) */
112 0x06, /* REG_APLL_CTL (0x3A) */
113 0x00, /* REG_DTMF_CTL (0x3B) */
114 0x44, /* REG_DTMF_PGA_CTL2 (0x3C) */
115 0x69, /* REG_DTMF_PGA_CTL1 (0x3D) */
116 0x00, /* REG_MISC_SET_1 (0x3E) */
117 0x00, /* REG_PCMBTMUX (0x3F) */
118 0x00, /* not used (0x40) */
119 0x00, /* not used (0x41) */
120 0x00, /* not used (0x42) */
121 0x00, /* REG_RX_PATH_SEL (0x43) */
122 0x32, /* REG_VDL_APGA_CTL (0x44) */
123 0x00, /* REG_VIBRA_CTL (0x45) */
124 0x00, /* REG_VIBRA_SET (0x46) */
125 0x00, /* REG_VIBRA_PWM_SET (0x47) */
126 0x00, /* REG_ANAMIC_GAIN (0x48) */
127 0x00, /* REG_MISC_SET_2 (0x49) */
128 0x00, /* REG_SW_SHADOW (0x4A) - Shadow, non HW register */
131 /* codec private data */
132 struct twl4030_priv {
133 struct snd_soc_codec codec;
135 unsigned int codec_powered;
137 /* reference counts of AIF/APLL users */
138 unsigned int apll_enabled;
140 struct snd_pcm_substream *master_substream;
141 struct snd_pcm_substream *slave_substream;
143 unsigned int configured;
145 unsigned int sample_bits;
146 unsigned int channels;
150 /* Output (with associated amp) states */
151 u8 hsl_enabled, hsr_enabled;
153 u8 predrivel_enabled, predriver_enabled;
154 u8 carkitl_enabled, carkitr_enabled;
156 /* Delay needed after enabling the digimic interface */
157 unsigned int digimic_delay;
161 * read twl4030 register cache
163 static inline unsigned int twl4030_read_reg_cache(struct snd_soc_codec *codec,
166 u8 *cache = codec->reg_cache;
168 if (reg >= TWL4030_CACHEREGNUM)
175 * write twl4030 register cache
177 static inline void twl4030_write_reg_cache(struct snd_soc_codec *codec,
180 u8 *cache = codec->reg_cache;
182 if (reg >= TWL4030_CACHEREGNUM)
188 * write to the twl4030 register space
190 static int twl4030_write(struct snd_soc_codec *codec,
191 unsigned int reg, unsigned int value)
193 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
194 int write_to_reg = 0;
196 twl4030_write_reg_cache(codec, reg, value);
197 if (likely(reg < TWL4030_REG_SW_SHADOW)) {
198 /* Decide if the given register can be written */
200 case TWL4030_REG_EAR_CTL:
201 if (twl4030->earpiece_enabled)
204 case TWL4030_REG_PREDL_CTL:
205 if (twl4030->predrivel_enabled)
208 case TWL4030_REG_PREDR_CTL:
209 if (twl4030->predriver_enabled)
212 case TWL4030_REG_PRECKL_CTL:
213 if (twl4030->carkitl_enabled)
216 case TWL4030_REG_PRECKR_CTL:
217 if (twl4030->carkitr_enabled)
220 case TWL4030_REG_HS_GAIN_SET:
221 if (twl4030->hsl_enabled || twl4030->hsr_enabled)
225 /* All other register can be written */
230 return twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
236 static inline void twl4030_wait_ms(int time)
240 usleep_range(time, time + 500);
246 static void twl4030_codec_enable(struct snd_soc_codec *codec, int enable)
248 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
251 if (enable == twl4030->codec_powered)
255 mode = twl4030_codec_enable_resource(TWL4030_CODEC_RES_POWER);
257 mode = twl4030_codec_disable_resource(TWL4030_CODEC_RES_POWER);
260 twl4030_write_reg_cache(codec, TWL4030_REG_CODEC_MODE, mode);
261 twl4030->codec_powered = enable;
264 /* REVISIT: this delay is present in TI sample drivers */
265 /* but there seems to be no TRM requirement for it */
269 static inline void twl4030_check_defaults(struct snd_soc_codec *codec)
271 int i, difference = 0;
274 dev_dbg(codec->dev, "Checking TWL audio default configuration\n");
275 for (i = 1; i <= TWL4030_REG_MISC_SET_2; i++) {
276 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &val, i);
277 if (val != twl4030_reg[i]) {
280 "Reg 0x%02x: chip: 0x%02x driver: 0x%02x\n",
281 i, val, twl4030_reg[i]);
284 dev_dbg(codec->dev, "Found %d non maching registers. %s\n",
285 difference, difference ? "Not OK" : "OK");
288 static inline void twl4030_reset_registers(struct snd_soc_codec *codec)
292 /* set all audio section registers to reasonable defaults */
293 for (i = TWL4030_REG_OPTION; i <= TWL4030_REG_MISC_SET_2; i++)
294 if (i != TWL4030_REG_APLL_CTL)
295 twl4030_write(codec, i, twl4030_reg[i]);
299 static void twl4030_init_chip(struct snd_soc_codec *codec)
301 struct twl4030_codec_audio_data *pdata = dev_get_platdata(codec->dev);
302 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
306 /* Check defaults, if instructed before anything else */
307 if (pdata && pdata->check_defaults)
308 twl4030_check_defaults(codec);
310 /* Reset registers, if no setup data or if instructed to do so */
311 if (!pdata || (pdata && pdata->reset_registers))
312 twl4030_reset_registers(codec);
314 /* Refresh APLL_CTL register from HW */
315 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte,
316 TWL4030_REG_APLL_CTL);
317 twl4030_write_reg_cache(codec, TWL4030_REG_APLL_CTL, byte);
319 /* anti-pop when changing analog gain */
320 reg = twl4030_read_reg_cache(codec, TWL4030_REG_MISC_SET_1);
321 twl4030_write(codec, TWL4030_REG_MISC_SET_1,
322 reg | TWL4030_SMOOTH_ANAVOL_EN);
324 twl4030_write(codec, TWL4030_REG_OPTION,
325 TWL4030_ATXL1_EN | TWL4030_ATXR1_EN |
326 TWL4030_ARXL2_EN | TWL4030_ARXR2_EN);
328 /* REG_ARXR2_APGA_CTL reset according to the TRM: 0dB, DA_EN */
329 twl4030_write(codec, TWL4030_REG_ARXR2_APGA_CTL, 0x32);
331 /* Machine dependent setup */
335 twl4030->digimic_delay = pdata->digimic_delay;
337 reg = twl4030_read_reg_cache(codec, TWL4030_REG_HS_POPN_SET);
338 reg &= ~TWL4030_RAMP_DELAY;
339 reg |= (pdata->ramp_delay_value << 2);
340 twl4030_write_reg_cache(codec, TWL4030_REG_HS_POPN_SET, reg);
342 /* initiate offset cancellation */
343 twl4030_codec_enable(codec, 1);
345 reg = twl4030_read_reg_cache(codec, TWL4030_REG_ANAMICL);
346 reg &= ~TWL4030_OFFSET_CNCL_SEL;
347 reg |= pdata->offset_cncl_path;
348 twl4030_write(codec, TWL4030_REG_ANAMICL,
349 reg | TWL4030_CNCL_OFFSET_START);
352 * Wait for offset cancellation to complete.
353 * Since this takes a while, do not slam the i2c.
354 * Start polling the status after ~20ms.
358 usleep_range(1000, 2000);
359 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte,
360 TWL4030_REG_ANAMICL);
361 } while ((i++ < 100) &&
362 ((byte & TWL4030_CNCL_OFFSET_START) ==
363 TWL4030_CNCL_OFFSET_START));
365 /* Make sure that the reg_cache has the same value as the HW */
366 twl4030_write_reg_cache(codec, TWL4030_REG_ANAMICL, byte);
368 twl4030_codec_enable(codec, 0);
371 static void twl4030_apll_enable(struct snd_soc_codec *codec, int enable)
373 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
377 twl4030->apll_enabled++;
378 if (twl4030->apll_enabled == 1)
379 status = twl4030_codec_enable_resource(
380 TWL4030_CODEC_RES_APLL);
382 twl4030->apll_enabled--;
383 if (!twl4030->apll_enabled)
384 status = twl4030_codec_disable_resource(
385 TWL4030_CODEC_RES_APLL);
389 twl4030_write_reg_cache(codec, TWL4030_REG_APLL_CTL, status);
393 static const struct snd_kcontrol_new twl4030_dapm_earpiece_controls[] = {
394 SOC_DAPM_SINGLE("Voice", TWL4030_REG_EAR_CTL, 0, 1, 0),
395 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_EAR_CTL, 1, 1, 0),
396 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_EAR_CTL, 2, 1, 0),
397 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_EAR_CTL, 3, 1, 0),
401 static const struct snd_kcontrol_new twl4030_dapm_predrivel_controls[] = {
402 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDL_CTL, 0, 1, 0),
403 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PREDL_CTL, 1, 1, 0),
404 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDL_CTL, 2, 1, 0),
405 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDL_CTL, 3, 1, 0),
409 static const struct snd_kcontrol_new twl4030_dapm_predriver_controls[] = {
410 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDR_CTL, 0, 1, 0),
411 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PREDR_CTL, 1, 1, 0),
412 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDR_CTL, 2, 1, 0),
413 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDR_CTL, 3, 1, 0),
417 static const struct snd_kcontrol_new twl4030_dapm_hsol_controls[] = {
418 SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 0, 1, 0),
419 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_HS_SEL, 1, 1, 0),
420 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_HS_SEL, 2, 1, 0),
424 static const struct snd_kcontrol_new twl4030_dapm_hsor_controls[] = {
425 SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 3, 1, 0),
426 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_HS_SEL, 4, 1, 0),
427 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_HS_SEL, 5, 1, 0),
431 static const struct snd_kcontrol_new twl4030_dapm_carkitl_controls[] = {
432 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKL_CTL, 0, 1, 0),
433 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PRECKL_CTL, 1, 1, 0),
434 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PRECKL_CTL, 2, 1, 0),
438 static const struct snd_kcontrol_new twl4030_dapm_carkitr_controls[] = {
439 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKR_CTL, 0, 1, 0),
440 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PRECKR_CTL, 1, 1, 0),
441 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PRECKR_CTL, 2, 1, 0),
445 static const char *twl4030_handsfreel_texts[] =
446 {"Voice", "AudioL1", "AudioL2", "AudioR2"};
448 static const struct soc_enum twl4030_handsfreel_enum =
449 SOC_ENUM_SINGLE(TWL4030_REG_HFL_CTL, 0,
450 ARRAY_SIZE(twl4030_handsfreel_texts),
451 twl4030_handsfreel_texts);
453 static const struct snd_kcontrol_new twl4030_dapm_handsfreel_control =
454 SOC_DAPM_ENUM("Route", twl4030_handsfreel_enum);
456 /* Handsfree Left virtual mute */
457 static const struct snd_kcontrol_new twl4030_dapm_handsfreelmute_control =
458 SOC_DAPM_SINGLE("Switch", TWL4030_REG_SW_SHADOW, 0, 1, 0);
460 /* Handsfree Right */
461 static const char *twl4030_handsfreer_texts[] =
462 {"Voice", "AudioR1", "AudioR2", "AudioL2"};
464 static const struct soc_enum twl4030_handsfreer_enum =
465 SOC_ENUM_SINGLE(TWL4030_REG_HFR_CTL, 0,
466 ARRAY_SIZE(twl4030_handsfreer_texts),
467 twl4030_handsfreer_texts);
469 static const struct snd_kcontrol_new twl4030_dapm_handsfreer_control =
470 SOC_DAPM_ENUM("Route", twl4030_handsfreer_enum);
472 /* Handsfree Right virtual mute */
473 static const struct snd_kcontrol_new twl4030_dapm_handsfreermute_control =
474 SOC_DAPM_SINGLE("Switch", TWL4030_REG_SW_SHADOW, 1, 1, 0);
477 /* Vibra audio path selection */
478 static const char *twl4030_vibra_texts[] =
479 {"AudioL1", "AudioR1", "AudioL2", "AudioR2"};
481 static const struct soc_enum twl4030_vibra_enum =
482 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 2,
483 ARRAY_SIZE(twl4030_vibra_texts),
484 twl4030_vibra_texts);
486 static const struct snd_kcontrol_new twl4030_dapm_vibra_control =
487 SOC_DAPM_ENUM("Route", twl4030_vibra_enum);
489 /* Vibra path selection: local vibrator (PWM) or audio driven */
490 static const char *twl4030_vibrapath_texts[] =
491 {"Local vibrator", "Audio"};
493 static const struct soc_enum twl4030_vibrapath_enum =
494 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 4,
495 ARRAY_SIZE(twl4030_vibrapath_texts),
496 twl4030_vibrapath_texts);
498 static const struct snd_kcontrol_new twl4030_dapm_vibrapath_control =
499 SOC_DAPM_ENUM("Route", twl4030_vibrapath_enum);
501 /* Left analog microphone selection */
502 static const struct snd_kcontrol_new twl4030_dapm_analoglmic_controls[] = {
503 SOC_DAPM_SINGLE("Main Mic Capture Switch",
504 TWL4030_REG_ANAMICL, 0, 1, 0),
505 SOC_DAPM_SINGLE("Headset Mic Capture Switch",
506 TWL4030_REG_ANAMICL, 1, 1, 0),
507 SOC_DAPM_SINGLE("AUXL Capture Switch",
508 TWL4030_REG_ANAMICL, 2, 1, 0),
509 SOC_DAPM_SINGLE("Carkit Mic Capture Switch",
510 TWL4030_REG_ANAMICL, 3, 1, 0),
513 /* Right analog microphone selection */
514 static const struct snd_kcontrol_new twl4030_dapm_analogrmic_controls[] = {
515 SOC_DAPM_SINGLE("Sub Mic Capture Switch", TWL4030_REG_ANAMICR, 0, 1, 0),
516 SOC_DAPM_SINGLE("AUXR Capture Switch", TWL4030_REG_ANAMICR, 2, 1, 0),
519 /* TX1 L/R Analog/Digital microphone selection */
520 static const char *twl4030_micpathtx1_texts[] =
521 {"Analog", "Digimic0"};
523 static const struct soc_enum twl4030_micpathtx1_enum =
524 SOC_ENUM_SINGLE(TWL4030_REG_ADCMICSEL, 0,
525 ARRAY_SIZE(twl4030_micpathtx1_texts),
526 twl4030_micpathtx1_texts);
528 static const struct snd_kcontrol_new twl4030_dapm_micpathtx1_control =
529 SOC_DAPM_ENUM("Route", twl4030_micpathtx1_enum);
531 /* TX2 L/R Analog/Digital microphone selection */
532 static const char *twl4030_micpathtx2_texts[] =
533 {"Analog", "Digimic1"};
535 static const struct soc_enum twl4030_micpathtx2_enum =
536 SOC_ENUM_SINGLE(TWL4030_REG_ADCMICSEL, 2,
537 ARRAY_SIZE(twl4030_micpathtx2_texts),
538 twl4030_micpathtx2_texts);
540 static const struct snd_kcontrol_new twl4030_dapm_micpathtx2_control =
541 SOC_DAPM_ENUM("Route", twl4030_micpathtx2_enum);
543 /* Analog bypass for AudioR1 */
544 static const struct snd_kcontrol_new twl4030_dapm_abypassr1_control =
545 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR1_APGA_CTL, 2, 1, 0);
547 /* Analog bypass for AudioL1 */
548 static const struct snd_kcontrol_new twl4030_dapm_abypassl1_control =
549 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL1_APGA_CTL, 2, 1, 0);
551 /* Analog bypass for AudioR2 */
552 static const struct snd_kcontrol_new twl4030_dapm_abypassr2_control =
553 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR2_APGA_CTL, 2, 1, 0);
555 /* Analog bypass for AudioL2 */
556 static const struct snd_kcontrol_new twl4030_dapm_abypassl2_control =
557 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL2_APGA_CTL, 2, 1, 0);
559 /* Analog bypass for Voice */
560 static const struct snd_kcontrol_new twl4030_dapm_abypassv_control =
561 SOC_DAPM_SINGLE("Switch", TWL4030_REG_VDL_APGA_CTL, 2, 1, 0);
563 /* Digital bypass gain, mute instead of -30dB */
564 static const unsigned int twl4030_dapm_dbypass_tlv[] = {
565 TLV_DB_RANGE_HEAD(3),
566 0, 1, TLV_DB_SCALE_ITEM(-3000, 600, 1),
567 2, 3, TLV_DB_SCALE_ITEM(-2400, 0, 0),
568 4, 7, TLV_DB_SCALE_ITEM(-1800, 600, 0),
571 /* Digital bypass left (TX1L -> RX2L) */
572 static const struct snd_kcontrol_new twl4030_dapm_dbypassl_control =
573 SOC_DAPM_SINGLE_TLV("Volume",
574 TWL4030_REG_ATX2ARXPGA, 3, 7, 0,
575 twl4030_dapm_dbypass_tlv);
577 /* Digital bypass right (TX1R -> RX2R) */
578 static const struct snd_kcontrol_new twl4030_dapm_dbypassr_control =
579 SOC_DAPM_SINGLE_TLV("Volume",
580 TWL4030_REG_ATX2ARXPGA, 0, 7, 0,
581 twl4030_dapm_dbypass_tlv);
584 * Voice Sidetone GAIN volume control:
585 * from -51 to -10 dB in 1 dB steps (mute instead of -51 dB)
587 static DECLARE_TLV_DB_SCALE(twl4030_dapm_dbypassv_tlv, -5100, 100, 1);
589 /* Digital bypass voice: sidetone (VUL -> VDL)*/
590 static const struct snd_kcontrol_new twl4030_dapm_dbypassv_control =
591 SOC_DAPM_SINGLE_TLV("Volume",
592 TWL4030_REG_VSTPGA, 0, 0x29, 0,
593 twl4030_dapm_dbypassv_tlv);
596 * Output PGA builder:
597 * Handle the muting and unmuting of the given output (turning off the
598 * amplifier associated with the output pin)
599 * On mute bypass the reg_cache and write 0 to the register
600 * On unmute: restore the register content from the reg_cache
601 * Outputs handled in this way: Earpiece, PreDrivL/R, CarkitL/R
603 #define TWL4030_OUTPUT_PGA(pin_name, reg, mask) \
604 static int pin_name##pga_event(struct snd_soc_dapm_widget *w, \
605 struct snd_kcontrol *kcontrol, int event) \
607 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec); \
610 case SND_SOC_DAPM_POST_PMU: \
611 twl4030->pin_name##_enabled = 1; \
612 twl4030_write(w->codec, reg, \
613 twl4030_read_reg_cache(w->codec, reg)); \
615 case SND_SOC_DAPM_POST_PMD: \
616 twl4030->pin_name##_enabled = 0; \
617 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, \
624 TWL4030_OUTPUT_PGA(earpiece, TWL4030_REG_EAR_CTL, TWL4030_EAR_GAIN);
625 TWL4030_OUTPUT_PGA(predrivel, TWL4030_REG_PREDL_CTL, TWL4030_PREDL_GAIN);
626 TWL4030_OUTPUT_PGA(predriver, TWL4030_REG_PREDR_CTL, TWL4030_PREDR_GAIN);
627 TWL4030_OUTPUT_PGA(carkitl, TWL4030_REG_PRECKL_CTL, TWL4030_PRECKL_GAIN);
628 TWL4030_OUTPUT_PGA(carkitr, TWL4030_REG_PRECKR_CTL, TWL4030_PRECKR_GAIN);
630 static void handsfree_ramp(struct snd_soc_codec *codec, int reg, int ramp)
632 unsigned char hs_ctl;
634 hs_ctl = twl4030_read_reg_cache(codec, reg);
638 hs_ctl |= TWL4030_HF_CTL_REF_EN;
639 twl4030_write(codec, reg, hs_ctl);
641 hs_ctl |= TWL4030_HF_CTL_RAMP_EN;
642 twl4030_write(codec, reg, hs_ctl);
644 hs_ctl |= TWL4030_HF_CTL_LOOP_EN;
645 hs_ctl |= TWL4030_HF_CTL_HB_EN;
646 twl4030_write(codec, reg, hs_ctl);
649 hs_ctl &= ~TWL4030_HF_CTL_LOOP_EN;
650 hs_ctl &= ~TWL4030_HF_CTL_HB_EN;
651 twl4030_write(codec, reg, hs_ctl);
652 hs_ctl &= ~TWL4030_HF_CTL_RAMP_EN;
653 twl4030_write(codec, reg, hs_ctl);
655 hs_ctl &= ~TWL4030_HF_CTL_REF_EN;
656 twl4030_write(codec, reg, hs_ctl);
660 static int handsfreelpga_event(struct snd_soc_dapm_widget *w,
661 struct snd_kcontrol *kcontrol, int event)
664 case SND_SOC_DAPM_POST_PMU:
665 handsfree_ramp(w->codec, TWL4030_REG_HFL_CTL, 1);
667 case SND_SOC_DAPM_POST_PMD:
668 handsfree_ramp(w->codec, TWL4030_REG_HFL_CTL, 0);
674 static int handsfreerpga_event(struct snd_soc_dapm_widget *w,
675 struct snd_kcontrol *kcontrol, int event)
678 case SND_SOC_DAPM_POST_PMU:
679 handsfree_ramp(w->codec, TWL4030_REG_HFR_CTL, 1);
681 case SND_SOC_DAPM_POST_PMD:
682 handsfree_ramp(w->codec, TWL4030_REG_HFR_CTL, 0);
688 static int vibramux_event(struct snd_soc_dapm_widget *w,
689 struct snd_kcontrol *kcontrol, int event)
691 twl4030_write(w->codec, TWL4030_REG_VIBRA_SET, 0xff);
695 static int apll_event(struct snd_soc_dapm_widget *w,
696 struct snd_kcontrol *kcontrol, int event)
699 case SND_SOC_DAPM_PRE_PMU:
700 twl4030_apll_enable(w->codec, 1);
702 case SND_SOC_DAPM_POST_PMD:
703 twl4030_apll_enable(w->codec, 0);
709 static int aif_event(struct snd_soc_dapm_widget *w,
710 struct snd_kcontrol *kcontrol, int event)
714 audio_if = twl4030_read_reg_cache(w->codec, TWL4030_REG_AUDIO_IF);
716 case SND_SOC_DAPM_PRE_PMU:
718 /* enable the PLL before we use it to clock the DAI */
719 twl4030_apll_enable(w->codec, 1);
721 twl4030_write(w->codec, TWL4030_REG_AUDIO_IF,
722 audio_if | TWL4030_AIF_EN);
724 case SND_SOC_DAPM_POST_PMD:
725 /* disable the DAI before we stop it's source PLL */
726 twl4030_write(w->codec, TWL4030_REG_AUDIO_IF,
727 audio_if & ~TWL4030_AIF_EN);
728 twl4030_apll_enable(w->codec, 0);
734 static void headset_ramp(struct snd_soc_codec *codec, int ramp)
736 struct twl4030_codec_audio_data *pdata = codec->dev->platform_data;
737 unsigned char hs_gain, hs_pop;
738 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
739 /* Base values for ramp delay calculation: 2^19 - 2^26 */
740 unsigned int ramp_base[] = {524288, 1048576, 2097152, 4194304,
741 8388608, 16777216, 33554432, 67108864};
744 hs_gain = twl4030_read_reg_cache(codec, TWL4030_REG_HS_GAIN_SET);
745 hs_pop = twl4030_read_reg_cache(codec, TWL4030_REG_HS_POPN_SET);
746 delay = (ramp_base[(hs_pop & TWL4030_RAMP_DELAY) >> 2] /
747 twl4030->sysclk) + 1;
749 /* Enable external mute control, this dramatically reduces
751 if (pdata && pdata->hs_extmute) {
752 if (pdata->set_hs_extmute) {
753 pdata->set_hs_extmute(1);
755 hs_pop |= TWL4030_EXTMUTE;
756 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
761 /* Headset ramp-up according to the TRM */
762 hs_pop |= TWL4030_VMID_EN;
763 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
764 /* Actually write to the register */
765 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
767 TWL4030_REG_HS_GAIN_SET);
768 hs_pop |= TWL4030_RAMP_EN;
769 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
770 /* Wait ramp delay time + 1, so the VMID can settle */
771 twl4030_wait_ms(delay);
773 /* Headset ramp-down _not_ according to
774 * the TRM, but in a way that it is working */
775 hs_pop &= ~TWL4030_RAMP_EN;
776 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
777 /* Wait ramp delay time + 1, so the VMID can settle */
778 twl4030_wait_ms(delay);
779 /* Bypass the reg_cache to mute the headset */
780 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE,
782 TWL4030_REG_HS_GAIN_SET);
784 hs_pop &= ~TWL4030_VMID_EN;
785 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
788 /* Disable external mute */
789 if (pdata && pdata->hs_extmute) {
790 if (pdata->set_hs_extmute) {
791 pdata->set_hs_extmute(0);
793 hs_pop &= ~TWL4030_EXTMUTE;
794 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
799 static int headsetlpga_event(struct snd_soc_dapm_widget *w,
800 struct snd_kcontrol *kcontrol, int event)
802 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec);
805 case SND_SOC_DAPM_POST_PMU:
806 /* Do the ramp-up only once */
807 if (!twl4030->hsr_enabled)
808 headset_ramp(w->codec, 1);
810 twl4030->hsl_enabled = 1;
812 case SND_SOC_DAPM_POST_PMD:
813 /* Do the ramp-down only if both headsetL/R is disabled */
814 if (!twl4030->hsr_enabled)
815 headset_ramp(w->codec, 0);
817 twl4030->hsl_enabled = 0;
823 static int headsetrpga_event(struct snd_soc_dapm_widget *w,
824 struct snd_kcontrol *kcontrol, int event)
826 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec);
829 case SND_SOC_DAPM_POST_PMU:
830 /* Do the ramp-up only once */
831 if (!twl4030->hsl_enabled)
832 headset_ramp(w->codec, 1);
834 twl4030->hsr_enabled = 1;
836 case SND_SOC_DAPM_POST_PMD:
837 /* Do the ramp-down only if both headsetL/R is disabled */
838 if (!twl4030->hsl_enabled)
839 headset_ramp(w->codec, 0);
841 twl4030->hsr_enabled = 0;
847 static int digimic_event(struct snd_soc_dapm_widget *w,
848 struct snd_kcontrol *kcontrol, int event)
850 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec);
852 if (twl4030->digimic_delay)
853 twl4030_wait_ms(twl4030->digimic_delay);
858 * Some of the gain controls in TWL (mostly those which are associated with
859 * the outputs) are implemented in an interesting way:
860 * 0x0 : Power down (mute)
864 * Inverting not going to help with these.
865 * Custom volsw and volsw_2r get/put functions to handle these gain bits.
867 #define SOC_DOUBLE_TLV_TWL4030(xname, xreg, shift_left, shift_right, xmax,\
868 xinvert, tlv_array) \
869 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
870 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
871 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
872 .tlv.p = (tlv_array), \
873 .info = snd_soc_info_volsw, \
874 .get = snd_soc_get_volsw_twl4030, \
875 .put = snd_soc_put_volsw_twl4030, \
876 .private_value = (unsigned long)&(struct soc_mixer_control) \
877 {.reg = xreg, .shift = shift_left, .rshift = shift_right,\
878 .max = xmax, .invert = xinvert} }
879 #define SOC_DOUBLE_R_TLV_TWL4030(xname, reg_left, reg_right, xshift, xmax,\
880 xinvert, tlv_array) \
881 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
882 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
883 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
884 .tlv.p = (tlv_array), \
885 .info = snd_soc_info_volsw_2r, \
886 .get = snd_soc_get_volsw_r2_twl4030,\
887 .put = snd_soc_put_volsw_r2_twl4030, \
888 .private_value = (unsigned long)&(struct soc_mixer_control) \
889 {.reg = reg_left, .rreg = reg_right, .shift = xshift, \
890 .rshift = xshift, .max = xmax, .invert = xinvert} }
891 #define SOC_SINGLE_TLV_TWL4030(xname, xreg, xshift, xmax, xinvert, tlv_array) \
892 SOC_DOUBLE_TLV_TWL4030(xname, xreg, xshift, xshift, xmax, \
895 static int snd_soc_get_volsw_twl4030(struct snd_kcontrol *kcontrol,
896 struct snd_ctl_elem_value *ucontrol)
898 struct soc_mixer_control *mc =
899 (struct soc_mixer_control *)kcontrol->private_value;
900 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
901 unsigned int reg = mc->reg;
902 unsigned int shift = mc->shift;
903 unsigned int rshift = mc->rshift;
905 int mask = (1 << fls(max)) - 1;
907 ucontrol->value.integer.value[0] =
908 (snd_soc_read(codec, reg) >> shift) & mask;
909 if (ucontrol->value.integer.value[0])
910 ucontrol->value.integer.value[0] =
911 max + 1 - ucontrol->value.integer.value[0];
913 if (shift != rshift) {
914 ucontrol->value.integer.value[1] =
915 (snd_soc_read(codec, reg) >> rshift) & mask;
916 if (ucontrol->value.integer.value[1])
917 ucontrol->value.integer.value[1] =
918 max + 1 - ucontrol->value.integer.value[1];
924 static int snd_soc_put_volsw_twl4030(struct snd_kcontrol *kcontrol,
925 struct snd_ctl_elem_value *ucontrol)
927 struct soc_mixer_control *mc =
928 (struct soc_mixer_control *)kcontrol->private_value;
929 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
930 unsigned int reg = mc->reg;
931 unsigned int shift = mc->shift;
932 unsigned int rshift = mc->rshift;
934 int mask = (1 << fls(max)) - 1;
935 unsigned short val, val2, val_mask;
937 val = (ucontrol->value.integer.value[0] & mask);
939 val_mask = mask << shift;
943 if (shift != rshift) {
944 val2 = (ucontrol->value.integer.value[1] & mask);
945 val_mask |= mask << rshift;
947 val2 = max + 1 - val2;
948 val |= val2 << rshift;
950 return snd_soc_update_bits(codec, reg, val_mask, val);
953 static int snd_soc_get_volsw_r2_twl4030(struct snd_kcontrol *kcontrol,
954 struct snd_ctl_elem_value *ucontrol)
956 struct soc_mixer_control *mc =
957 (struct soc_mixer_control *)kcontrol->private_value;
958 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
959 unsigned int reg = mc->reg;
960 unsigned int reg2 = mc->rreg;
961 unsigned int shift = mc->shift;
963 int mask = (1<<fls(max))-1;
965 ucontrol->value.integer.value[0] =
966 (snd_soc_read(codec, reg) >> shift) & mask;
967 ucontrol->value.integer.value[1] =
968 (snd_soc_read(codec, reg2) >> shift) & mask;
970 if (ucontrol->value.integer.value[0])
971 ucontrol->value.integer.value[0] =
972 max + 1 - ucontrol->value.integer.value[0];
973 if (ucontrol->value.integer.value[1])
974 ucontrol->value.integer.value[1] =
975 max + 1 - ucontrol->value.integer.value[1];
980 static int snd_soc_put_volsw_r2_twl4030(struct snd_kcontrol *kcontrol,
981 struct snd_ctl_elem_value *ucontrol)
983 struct soc_mixer_control *mc =
984 (struct soc_mixer_control *)kcontrol->private_value;
985 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
986 unsigned int reg = mc->reg;
987 unsigned int reg2 = mc->rreg;
988 unsigned int shift = mc->shift;
990 int mask = (1 << fls(max)) - 1;
992 unsigned short val, val2, val_mask;
994 val_mask = mask << shift;
995 val = (ucontrol->value.integer.value[0] & mask);
996 val2 = (ucontrol->value.integer.value[1] & mask);
1001 val2 = max + 1 - val2;
1004 val2 = val2 << shift;
1006 err = snd_soc_update_bits(codec, reg, val_mask, val);
1010 err = snd_soc_update_bits(codec, reg2, val_mask, val2);
1014 /* Codec operation modes */
1015 static const char *twl4030_op_modes_texts[] = {
1016 "Option 2 (voice/audio)", "Option 1 (audio)"
1019 static const struct soc_enum twl4030_op_modes_enum =
1020 SOC_ENUM_SINGLE(TWL4030_REG_CODEC_MODE, 0,
1021 ARRAY_SIZE(twl4030_op_modes_texts),
1022 twl4030_op_modes_texts);
1024 static int snd_soc_put_twl4030_opmode_enum_double(struct snd_kcontrol *kcontrol,
1025 struct snd_ctl_elem_value *ucontrol)
1027 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
1028 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
1029 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
1031 unsigned short mask, bitmask;
1033 if (twl4030->configured) {
1034 printk(KERN_ERR "twl4030 operation mode cannot be "
1035 "changed on-the-fly\n");
1039 for (bitmask = 1; bitmask < e->max; bitmask <<= 1)
1041 if (ucontrol->value.enumerated.item[0] > e->max - 1)
1044 val = ucontrol->value.enumerated.item[0] << e->shift_l;
1045 mask = (bitmask - 1) << e->shift_l;
1046 if (e->shift_l != e->shift_r) {
1047 if (ucontrol->value.enumerated.item[1] > e->max - 1)
1049 val |= ucontrol->value.enumerated.item[1] << e->shift_r;
1050 mask |= (bitmask - 1) << e->shift_r;
1053 return snd_soc_update_bits(codec, e->reg, mask, val);
1057 * FGAIN volume control:
1058 * from -62 to 0 dB in 1 dB steps (mute instead of -63 dB)
1060 static DECLARE_TLV_DB_SCALE(digital_fine_tlv, -6300, 100, 1);
1063 * CGAIN volume control:
1064 * 0 dB to 12 dB in 6 dB steps
1065 * value 2 and 3 means 12 dB
1067 static DECLARE_TLV_DB_SCALE(digital_coarse_tlv, 0, 600, 0);
1070 * Voice Downlink GAIN volume control:
1071 * from -37 to 12 dB in 1 dB steps (mute instead of -37 dB)
1073 static DECLARE_TLV_DB_SCALE(digital_voice_downlink_tlv, -3700, 100, 1);
1076 * Analog playback gain
1077 * -24 dB to 12 dB in 2 dB steps
1079 static DECLARE_TLV_DB_SCALE(analog_tlv, -2400, 200, 0);
1082 * Gain controls tied to outputs
1083 * -6 dB to 6 dB in 6 dB steps (mute instead of -12)
1085 static DECLARE_TLV_DB_SCALE(output_tvl, -1200, 600, 1);
1088 * Gain control for earpiece amplifier
1089 * 0 dB to 12 dB in 6 dB steps (mute instead of -6)
1091 static DECLARE_TLV_DB_SCALE(output_ear_tvl, -600, 600, 1);
1094 * Capture gain after the ADCs
1095 * from 0 dB to 31 dB in 1 dB steps
1097 static DECLARE_TLV_DB_SCALE(digital_capture_tlv, 0, 100, 0);
1100 * Gain control for input amplifiers
1101 * 0 dB to 30 dB in 6 dB steps
1103 static DECLARE_TLV_DB_SCALE(input_gain_tlv, 0, 600, 0);
1105 /* AVADC clock priority */
1106 static const char *twl4030_avadc_clk_priority_texts[] = {
1107 "Voice high priority", "HiFi high priority"
1110 static const struct soc_enum twl4030_avadc_clk_priority_enum =
1111 SOC_ENUM_SINGLE(TWL4030_REG_AVADC_CTL, 2,
1112 ARRAY_SIZE(twl4030_avadc_clk_priority_texts),
1113 twl4030_avadc_clk_priority_texts);
1115 static const char *twl4030_rampdelay_texts[] = {
1116 "27/20/14 ms", "55/40/27 ms", "109/81/55 ms", "218/161/109 ms",
1117 "437/323/218 ms", "874/645/437 ms", "1748/1291/874 ms",
1121 static const struct soc_enum twl4030_rampdelay_enum =
1122 SOC_ENUM_SINGLE(TWL4030_REG_HS_POPN_SET, 2,
1123 ARRAY_SIZE(twl4030_rampdelay_texts),
1124 twl4030_rampdelay_texts);
1126 /* Vibra H-bridge direction mode */
1127 static const char *twl4030_vibradirmode_texts[] = {
1128 "Vibra H-bridge direction", "Audio data MSB",
1131 static const struct soc_enum twl4030_vibradirmode_enum =
1132 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 5,
1133 ARRAY_SIZE(twl4030_vibradirmode_texts),
1134 twl4030_vibradirmode_texts);
1136 /* Vibra H-bridge direction */
1137 static const char *twl4030_vibradir_texts[] = {
1138 "Positive polarity", "Negative polarity",
1141 static const struct soc_enum twl4030_vibradir_enum =
1142 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL, 1,
1143 ARRAY_SIZE(twl4030_vibradir_texts),
1144 twl4030_vibradir_texts);
1146 /* Digimic Left and right swapping */
1147 static const char *twl4030_digimicswap_texts[] = {
1148 "Not swapped", "Swapped",
1151 static const struct soc_enum twl4030_digimicswap_enum =
1152 SOC_ENUM_SINGLE(TWL4030_REG_MISC_SET_1, 0,
1153 ARRAY_SIZE(twl4030_digimicswap_texts),
1154 twl4030_digimicswap_texts);
1156 static const struct snd_kcontrol_new twl4030_snd_controls[] = {
1157 /* Codec operation mode control */
1158 SOC_ENUM_EXT("Codec Operation Mode", twl4030_op_modes_enum,
1159 snd_soc_get_enum_double,
1160 snd_soc_put_twl4030_opmode_enum_double),
1162 /* Common playback gain controls */
1163 SOC_DOUBLE_R_TLV("DAC1 Digital Fine Playback Volume",
1164 TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA,
1165 0, 0x3f, 0, digital_fine_tlv),
1166 SOC_DOUBLE_R_TLV("DAC2 Digital Fine Playback Volume",
1167 TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA,
1168 0, 0x3f, 0, digital_fine_tlv),
1170 SOC_DOUBLE_R_TLV("DAC1 Digital Coarse Playback Volume",
1171 TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA,
1172 6, 0x2, 0, digital_coarse_tlv),
1173 SOC_DOUBLE_R_TLV("DAC2 Digital Coarse Playback Volume",
1174 TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA,
1175 6, 0x2, 0, digital_coarse_tlv),
1177 SOC_DOUBLE_R_TLV("DAC1 Analog Playback Volume",
1178 TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL,
1179 3, 0x12, 1, analog_tlv),
1180 SOC_DOUBLE_R_TLV("DAC2 Analog Playback Volume",
1181 TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL,
1182 3, 0x12, 1, analog_tlv),
1183 SOC_DOUBLE_R("DAC1 Analog Playback Switch",
1184 TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL,
1186 SOC_DOUBLE_R("DAC2 Analog Playback Switch",
1187 TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL,
1190 /* Common voice downlink gain controls */
1191 SOC_SINGLE_TLV("DAC Voice Digital Downlink Volume",
1192 TWL4030_REG_VRXPGA, 0, 0x31, 0, digital_voice_downlink_tlv),
1194 SOC_SINGLE_TLV("DAC Voice Analog Downlink Volume",
1195 TWL4030_REG_VDL_APGA_CTL, 3, 0x12, 1, analog_tlv),
1197 SOC_SINGLE("DAC Voice Analog Downlink Switch",
1198 TWL4030_REG_VDL_APGA_CTL, 1, 1, 0),
1200 /* Separate output gain controls */
1201 SOC_DOUBLE_R_TLV_TWL4030("PreDriv Playback Volume",
1202 TWL4030_REG_PREDL_CTL, TWL4030_REG_PREDR_CTL,
1203 4, 3, 0, output_tvl),
1205 SOC_DOUBLE_TLV_TWL4030("Headset Playback Volume",
1206 TWL4030_REG_HS_GAIN_SET, 0, 2, 3, 0, output_tvl),
1208 SOC_DOUBLE_R_TLV_TWL4030("Carkit Playback Volume",
1209 TWL4030_REG_PRECKL_CTL, TWL4030_REG_PRECKR_CTL,
1210 4, 3, 0, output_tvl),
1212 SOC_SINGLE_TLV_TWL4030("Earpiece Playback Volume",
1213 TWL4030_REG_EAR_CTL, 4, 3, 0, output_ear_tvl),
1215 /* Common capture gain controls */
1216 SOC_DOUBLE_R_TLV("TX1 Digital Capture Volume",
1217 TWL4030_REG_ATXL1PGA, TWL4030_REG_ATXR1PGA,
1218 0, 0x1f, 0, digital_capture_tlv),
1219 SOC_DOUBLE_R_TLV("TX2 Digital Capture Volume",
1220 TWL4030_REG_AVTXL2PGA, TWL4030_REG_AVTXR2PGA,
1221 0, 0x1f, 0, digital_capture_tlv),
1223 SOC_DOUBLE_TLV("Analog Capture Volume", TWL4030_REG_ANAMIC_GAIN,
1224 0, 3, 5, 0, input_gain_tlv),
1226 SOC_ENUM("AVADC Clock Priority", twl4030_avadc_clk_priority_enum),
1228 SOC_ENUM("HS ramp delay", twl4030_rampdelay_enum),
1230 SOC_ENUM("Vibra H-bridge mode", twl4030_vibradirmode_enum),
1231 SOC_ENUM("Vibra H-bridge direction", twl4030_vibradir_enum),
1233 SOC_ENUM("Digimic LR Swap", twl4030_digimicswap_enum),
1236 static const struct snd_soc_dapm_widget twl4030_dapm_widgets[] = {
1237 /* Left channel inputs */
1238 SND_SOC_DAPM_INPUT("MAINMIC"),
1239 SND_SOC_DAPM_INPUT("HSMIC"),
1240 SND_SOC_DAPM_INPUT("AUXL"),
1241 SND_SOC_DAPM_INPUT("CARKITMIC"),
1242 /* Right channel inputs */
1243 SND_SOC_DAPM_INPUT("SUBMIC"),
1244 SND_SOC_DAPM_INPUT("AUXR"),
1245 /* Digital microphones (Stereo) */
1246 SND_SOC_DAPM_INPUT("DIGIMIC0"),
1247 SND_SOC_DAPM_INPUT("DIGIMIC1"),
1250 SND_SOC_DAPM_OUTPUT("EARPIECE"),
1251 SND_SOC_DAPM_OUTPUT("PREDRIVEL"),
1252 SND_SOC_DAPM_OUTPUT("PREDRIVER"),
1253 SND_SOC_DAPM_OUTPUT("HSOL"),
1254 SND_SOC_DAPM_OUTPUT("HSOR"),
1255 SND_SOC_DAPM_OUTPUT("CARKITL"),
1256 SND_SOC_DAPM_OUTPUT("CARKITR"),
1257 SND_SOC_DAPM_OUTPUT("HFL"),
1258 SND_SOC_DAPM_OUTPUT("HFR"),
1259 SND_SOC_DAPM_OUTPUT("VIBRA"),
1261 /* AIF and APLL clocks for running DAIs (including loopback) */
1262 SND_SOC_DAPM_OUTPUT("Virtual HiFi OUT"),
1263 SND_SOC_DAPM_INPUT("Virtual HiFi IN"),
1264 SND_SOC_DAPM_OUTPUT("Virtual Voice OUT"),
1267 SND_SOC_DAPM_DAC("DAC Right1", "Right Front HiFi Playback",
1268 SND_SOC_NOPM, 0, 0),
1269 SND_SOC_DAPM_DAC("DAC Left1", "Left Front HiFi Playback",
1270 SND_SOC_NOPM, 0, 0),
1271 SND_SOC_DAPM_DAC("DAC Right2", "Right Rear HiFi Playback",
1272 SND_SOC_NOPM, 0, 0),
1273 SND_SOC_DAPM_DAC("DAC Left2", "Left Rear HiFi Playback",
1274 SND_SOC_NOPM, 0, 0),
1275 SND_SOC_DAPM_DAC("DAC Voice", "Voice Playback",
1276 SND_SOC_NOPM, 0, 0),
1278 /* Analog bypasses */
1279 SND_SOC_DAPM_SWITCH("Right1 Analog Loopback", SND_SOC_NOPM, 0, 0,
1280 &twl4030_dapm_abypassr1_control),
1281 SND_SOC_DAPM_SWITCH("Left1 Analog Loopback", SND_SOC_NOPM, 0, 0,
1282 &twl4030_dapm_abypassl1_control),
1283 SND_SOC_DAPM_SWITCH("Right2 Analog Loopback", SND_SOC_NOPM, 0, 0,
1284 &twl4030_dapm_abypassr2_control),
1285 SND_SOC_DAPM_SWITCH("Left2 Analog Loopback", SND_SOC_NOPM, 0, 0,
1286 &twl4030_dapm_abypassl2_control),
1287 SND_SOC_DAPM_SWITCH("Voice Analog Loopback", SND_SOC_NOPM, 0, 0,
1288 &twl4030_dapm_abypassv_control),
1290 /* Master analog loopback switch */
1291 SND_SOC_DAPM_SUPPLY("FM Loop Enable", TWL4030_REG_MISC_SET_1, 5, 0,
1294 /* Digital bypasses */
1295 SND_SOC_DAPM_SWITCH("Left Digital Loopback", SND_SOC_NOPM, 0, 0,
1296 &twl4030_dapm_dbypassl_control),
1297 SND_SOC_DAPM_SWITCH("Right Digital Loopback", SND_SOC_NOPM, 0, 0,
1298 &twl4030_dapm_dbypassr_control),
1299 SND_SOC_DAPM_SWITCH("Voice Digital Loopback", SND_SOC_NOPM, 0, 0,
1300 &twl4030_dapm_dbypassv_control),
1302 /* Digital mixers, power control for the physical DACs */
1303 SND_SOC_DAPM_MIXER("Digital R1 Playback Mixer",
1304 TWL4030_REG_AVDAC_CTL, 0, 0, NULL, 0),
1305 SND_SOC_DAPM_MIXER("Digital L1 Playback Mixer",
1306 TWL4030_REG_AVDAC_CTL, 1, 0, NULL, 0),
1307 SND_SOC_DAPM_MIXER("Digital R2 Playback Mixer",
1308 TWL4030_REG_AVDAC_CTL, 2, 0, NULL, 0),
1309 SND_SOC_DAPM_MIXER("Digital L2 Playback Mixer",
1310 TWL4030_REG_AVDAC_CTL, 3, 0, NULL, 0),
1311 SND_SOC_DAPM_MIXER("Digital Voice Playback Mixer",
1312 TWL4030_REG_AVDAC_CTL, 4, 0, NULL, 0),
1314 /* Analog mixers, power control for the physical PGAs */
1315 SND_SOC_DAPM_MIXER("Analog R1 Playback Mixer",
1316 TWL4030_REG_ARXR1_APGA_CTL, 0, 0, NULL, 0),
1317 SND_SOC_DAPM_MIXER("Analog L1 Playback Mixer",
1318 TWL4030_REG_ARXL1_APGA_CTL, 0, 0, NULL, 0),
1319 SND_SOC_DAPM_MIXER("Analog R2 Playback Mixer",
1320 TWL4030_REG_ARXR2_APGA_CTL, 0, 0, NULL, 0),
1321 SND_SOC_DAPM_MIXER("Analog L2 Playback Mixer",
1322 TWL4030_REG_ARXL2_APGA_CTL, 0, 0, NULL, 0),
1323 SND_SOC_DAPM_MIXER("Analog Voice Playback Mixer",
1324 TWL4030_REG_VDL_APGA_CTL, 0, 0, NULL, 0),
1326 SND_SOC_DAPM_SUPPLY("APLL Enable", SND_SOC_NOPM, 0, 0, apll_event,
1327 SND_SOC_DAPM_PRE_PMU|SND_SOC_DAPM_POST_PMD),
1329 SND_SOC_DAPM_SUPPLY("AIF Enable", SND_SOC_NOPM, 0, 0, aif_event,
1330 SND_SOC_DAPM_PRE_PMU|SND_SOC_DAPM_POST_PMD),
1332 /* Output MIXER controls */
1334 SND_SOC_DAPM_MIXER("Earpiece Mixer", SND_SOC_NOPM, 0, 0,
1335 &twl4030_dapm_earpiece_controls[0],
1336 ARRAY_SIZE(twl4030_dapm_earpiece_controls)),
1337 SND_SOC_DAPM_PGA_E("Earpiece PGA", SND_SOC_NOPM,
1338 0, 0, NULL, 0, earpiecepga_event,
1339 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1341 SND_SOC_DAPM_MIXER("PredriveL Mixer", SND_SOC_NOPM, 0, 0,
1342 &twl4030_dapm_predrivel_controls[0],
1343 ARRAY_SIZE(twl4030_dapm_predrivel_controls)),
1344 SND_SOC_DAPM_PGA_E("PredriveL PGA", SND_SOC_NOPM,
1345 0, 0, NULL, 0, predrivelpga_event,
1346 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1347 SND_SOC_DAPM_MIXER("PredriveR Mixer", SND_SOC_NOPM, 0, 0,
1348 &twl4030_dapm_predriver_controls[0],
1349 ARRAY_SIZE(twl4030_dapm_predriver_controls)),
1350 SND_SOC_DAPM_PGA_E("PredriveR PGA", SND_SOC_NOPM,
1351 0, 0, NULL, 0, predriverpga_event,
1352 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1354 SND_SOC_DAPM_MIXER("HeadsetL Mixer", SND_SOC_NOPM, 0, 0,
1355 &twl4030_dapm_hsol_controls[0],
1356 ARRAY_SIZE(twl4030_dapm_hsol_controls)),
1357 SND_SOC_DAPM_PGA_E("HeadsetL PGA", SND_SOC_NOPM,
1358 0, 0, NULL, 0, headsetlpga_event,
1359 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1360 SND_SOC_DAPM_MIXER("HeadsetR Mixer", SND_SOC_NOPM, 0, 0,
1361 &twl4030_dapm_hsor_controls[0],
1362 ARRAY_SIZE(twl4030_dapm_hsor_controls)),
1363 SND_SOC_DAPM_PGA_E("HeadsetR PGA", SND_SOC_NOPM,
1364 0, 0, NULL, 0, headsetrpga_event,
1365 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1367 SND_SOC_DAPM_MIXER("CarkitL Mixer", SND_SOC_NOPM, 0, 0,
1368 &twl4030_dapm_carkitl_controls[0],
1369 ARRAY_SIZE(twl4030_dapm_carkitl_controls)),
1370 SND_SOC_DAPM_PGA_E("CarkitL PGA", SND_SOC_NOPM,
1371 0, 0, NULL, 0, carkitlpga_event,
1372 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1373 SND_SOC_DAPM_MIXER("CarkitR Mixer", SND_SOC_NOPM, 0, 0,
1374 &twl4030_dapm_carkitr_controls[0],
1375 ARRAY_SIZE(twl4030_dapm_carkitr_controls)),
1376 SND_SOC_DAPM_PGA_E("CarkitR PGA", SND_SOC_NOPM,
1377 0, 0, NULL, 0, carkitrpga_event,
1378 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1380 /* Output MUX controls */
1382 SND_SOC_DAPM_MUX("HandsfreeL Mux", SND_SOC_NOPM, 0, 0,
1383 &twl4030_dapm_handsfreel_control),
1384 SND_SOC_DAPM_SWITCH("HandsfreeL", SND_SOC_NOPM, 0, 0,
1385 &twl4030_dapm_handsfreelmute_control),
1386 SND_SOC_DAPM_PGA_E("HandsfreeL PGA", SND_SOC_NOPM,
1387 0, 0, NULL, 0, handsfreelpga_event,
1388 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1389 SND_SOC_DAPM_MUX("HandsfreeR Mux", SND_SOC_NOPM, 5, 0,
1390 &twl4030_dapm_handsfreer_control),
1391 SND_SOC_DAPM_SWITCH("HandsfreeR", SND_SOC_NOPM, 0, 0,
1392 &twl4030_dapm_handsfreermute_control),
1393 SND_SOC_DAPM_PGA_E("HandsfreeR PGA", SND_SOC_NOPM,
1394 0, 0, NULL, 0, handsfreerpga_event,
1395 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1397 SND_SOC_DAPM_MUX_E("Vibra Mux", TWL4030_REG_VIBRA_CTL, 0, 0,
1398 &twl4030_dapm_vibra_control, vibramux_event,
1399 SND_SOC_DAPM_PRE_PMU),
1400 SND_SOC_DAPM_MUX("Vibra Route", SND_SOC_NOPM, 0, 0,
1401 &twl4030_dapm_vibrapath_control),
1403 /* Introducing four virtual ADC, since TWL4030 have four channel for
1405 SND_SOC_DAPM_ADC("ADC Virtual Left1", "Left Front Capture",
1406 SND_SOC_NOPM, 0, 0),
1407 SND_SOC_DAPM_ADC("ADC Virtual Right1", "Right Front Capture",
1408 SND_SOC_NOPM, 0, 0),
1409 SND_SOC_DAPM_ADC("ADC Virtual Left2", "Left Rear Capture",
1410 SND_SOC_NOPM, 0, 0),
1411 SND_SOC_DAPM_ADC("ADC Virtual Right2", "Right Rear Capture",
1412 SND_SOC_NOPM, 0, 0),
1414 /* Analog/Digital mic path selection.
1415 TX1 Left/Right: either analog Left/Right or Digimic0
1416 TX2 Left/Right: either analog Left/Right or Digimic1 */
1417 SND_SOC_DAPM_MUX("TX1 Capture Route", SND_SOC_NOPM, 0, 0,
1418 &twl4030_dapm_micpathtx1_control),
1419 SND_SOC_DAPM_MUX("TX2 Capture Route", SND_SOC_NOPM, 0, 0,
1420 &twl4030_dapm_micpathtx2_control),
1422 /* Analog input mixers for the capture amplifiers */
1423 SND_SOC_DAPM_MIXER("Analog Left",
1424 TWL4030_REG_ANAMICL, 4, 0,
1425 &twl4030_dapm_analoglmic_controls[0],
1426 ARRAY_SIZE(twl4030_dapm_analoglmic_controls)),
1427 SND_SOC_DAPM_MIXER("Analog Right",
1428 TWL4030_REG_ANAMICR, 4, 0,
1429 &twl4030_dapm_analogrmic_controls[0],
1430 ARRAY_SIZE(twl4030_dapm_analogrmic_controls)),
1432 SND_SOC_DAPM_PGA("ADC Physical Left",
1433 TWL4030_REG_AVADC_CTL, 3, 0, NULL, 0),
1434 SND_SOC_DAPM_PGA("ADC Physical Right",
1435 TWL4030_REG_AVADC_CTL, 1, 0, NULL, 0),
1437 SND_SOC_DAPM_PGA_E("Digimic0 Enable",
1438 TWL4030_REG_ADCMICSEL, 1, 0, NULL, 0,
1439 digimic_event, SND_SOC_DAPM_POST_PMU),
1440 SND_SOC_DAPM_PGA_E("Digimic1 Enable",
1441 TWL4030_REG_ADCMICSEL, 3, 0, NULL, 0,
1442 digimic_event, SND_SOC_DAPM_POST_PMU),
1444 SND_SOC_DAPM_SUPPLY("micbias1 select", TWL4030_REG_MICBIAS_CTL, 5, 0,
1446 SND_SOC_DAPM_SUPPLY("micbias2 select", TWL4030_REG_MICBIAS_CTL, 6, 0,
1449 SND_SOC_DAPM_MICBIAS("Mic Bias 1", TWL4030_REG_MICBIAS_CTL, 0, 0),
1450 SND_SOC_DAPM_MICBIAS("Mic Bias 2", TWL4030_REG_MICBIAS_CTL, 1, 0),
1451 SND_SOC_DAPM_MICBIAS("Headset Mic Bias", TWL4030_REG_MICBIAS_CTL, 2, 0),
1455 static const struct snd_soc_dapm_route intercon[] = {
1456 {"Digital L1 Playback Mixer", NULL, "DAC Left1"},
1457 {"Digital R1 Playback Mixer", NULL, "DAC Right1"},
1458 {"Digital L2 Playback Mixer", NULL, "DAC Left2"},
1459 {"Digital R2 Playback Mixer", NULL, "DAC Right2"},
1460 {"Digital Voice Playback Mixer", NULL, "DAC Voice"},
1462 /* Supply for the digital part (APLL) */
1463 {"Digital Voice Playback Mixer", NULL, "APLL Enable"},
1465 {"DAC Left1", NULL, "AIF Enable"},
1466 {"DAC Right1", NULL, "AIF Enable"},
1467 {"DAC Left2", NULL, "AIF Enable"},
1468 {"DAC Right1", NULL, "AIF Enable"},
1470 {"Digital R2 Playback Mixer", NULL, "AIF Enable"},
1471 {"Digital L2 Playback Mixer", NULL, "AIF Enable"},
1473 {"Analog L1 Playback Mixer", NULL, "Digital L1 Playback Mixer"},
1474 {"Analog R1 Playback Mixer", NULL, "Digital R1 Playback Mixer"},
1475 {"Analog L2 Playback Mixer", NULL, "Digital L2 Playback Mixer"},
1476 {"Analog R2 Playback Mixer", NULL, "Digital R2 Playback Mixer"},
1477 {"Analog Voice Playback Mixer", NULL, "Digital Voice Playback Mixer"},
1479 /* Internal playback routings */
1481 {"Earpiece Mixer", "Voice", "Analog Voice Playback Mixer"},
1482 {"Earpiece Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1483 {"Earpiece Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1484 {"Earpiece Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1485 {"Earpiece PGA", NULL, "Earpiece Mixer"},
1487 {"PredriveL Mixer", "Voice", "Analog Voice Playback Mixer"},
1488 {"PredriveL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1489 {"PredriveL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1490 {"PredriveL Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1491 {"PredriveL PGA", NULL, "PredriveL Mixer"},
1493 {"PredriveR Mixer", "Voice", "Analog Voice Playback Mixer"},
1494 {"PredriveR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1495 {"PredriveR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1496 {"PredriveR Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1497 {"PredriveR PGA", NULL, "PredriveR Mixer"},
1499 {"HeadsetL Mixer", "Voice", "Analog Voice Playback Mixer"},
1500 {"HeadsetL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1501 {"HeadsetL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1502 {"HeadsetL PGA", NULL, "HeadsetL Mixer"},
1504 {"HeadsetR Mixer", "Voice", "Analog Voice Playback Mixer"},
1505 {"HeadsetR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1506 {"HeadsetR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1507 {"HeadsetR PGA", NULL, "HeadsetR Mixer"},
1509 {"CarkitL Mixer", "Voice", "Analog Voice Playback Mixer"},
1510 {"CarkitL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1511 {"CarkitL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1512 {"CarkitL PGA", NULL, "CarkitL Mixer"},
1514 {"CarkitR Mixer", "Voice", "Analog Voice Playback Mixer"},
1515 {"CarkitR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1516 {"CarkitR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1517 {"CarkitR PGA", NULL, "CarkitR Mixer"},
1519 {"HandsfreeL Mux", "Voice", "Analog Voice Playback Mixer"},
1520 {"HandsfreeL Mux", "AudioL1", "Analog L1 Playback Mixer"},
1521 {"HandsfreeL Mux", "AudioL2", "Analog L2 Playback Mixer"},
1522 {"HandsfreeL Mux", "AudioR2", "Analog R2 Playback Mixer"},
1523 {"HandsfreeL", "Switch", "HandsfreeL Mux"},
1524 {"HandsfreeL PGA", NULL, "HandsfreeL"},
1526 {"HandsfreeR Mux", "Voice", "Analog Voice Playback Mixer"},
1527 {"HandsfreeR Mux", "AudioR1", "Analog R1 Playback Mixer"},
1528 {"HandsfreeR Mux", "AudioR2", "Analog R2 Playback Mixer"},
1529 {"HandsfreeR Mux", "AudioL2", "Analog L2 Playback Mixer"},
1530 {"HandsfreeR", "Switch", "HandsfreeR Mux"},
1531 {"HandsfreeR PGA", NULL, "HandsfreeR"},
1533 {"Vibra Mux", "AudioL1", "DAC Left1"},
1534 {"Vibra Mux", "AudioR1", "DAC Right1"},
1535 {"Vibra Mux", "AudioL2", "DAC Left2"},
1536 {"Vibra Mux", "AudioR2", "DAC Right2"},
1539 /* Must be always connected (for AIF and APLL) */
1540 {"Virtual HiFi OUT", NULL, "DAC Left1"},
1541 {"Virtual HiFi OUT", NULL, "DAC Right1"},
1542 {"Virtual HiFi OUT", NULL, "DAC Left2"},
1543 {"Virtual HiFi OUT", NULL, "DAC Right2"},
1544 /* Must be always connected (for APLL) */
1545 {"Virtual Voice OUT", NULL, "Digital Voice Playback Mixer"},
1546 /* Physical outputs */
1547 {"EARPIECE", NULL, "Earpiece PGA"},
1548 {"PREDRIVEL", NULL, "PredriveL PGA"},
1549 {"PREDRIVER", NULL, "PredriveR PGA"},
1550 {"HSOL", NULL, "HeadsetL PGA"},
1551 {"HSOR", NULL, "HeadsetR PGA"},
1552 {"CARKITL", NULL, "CarkitL PGA"},
1553 {"CARKITR", NULL, "CarkitR PGA"},
1554 {"HFL", NULL, "HandsfreeL PGA"},
1555 {"HFR", NULL, "HandsfreeR PGA"},
1556 {"Vibra Route", "Audio", "Vibra Mux"},
1557 {"VIBRA", NULL, "Vibra Route"},
1560 /* Must be always connected (for AIF and APLL) */
1561 {"ADC Virtual Left1", NULL, "Virtual HiFi IN"},
1562 {"ADC Virtual Right1", NULL, "Virtual HiFi IN"},
1563 {"ADC Virtual Left2", NULL, "Virtual HiFi IN"},
1564 {"ADC Virtual Right2", NULL, "Virtual HiFi IN"},
1565 /* Physical inputs */
1566 {"Analog Left", "Main Mic Capture Switch", "MAINMIC"},
1567 {"Analog Left", "Headset Mic Capture Switch", "HSMIC"},
1568 {"Analog Left", "AUXL Capture Switch", "AUXL"},
1569 {"Analog Left", "Carkit Mic Capture Switch", "CARKITMIC"},
1571 {"Analog Right", "Sub Mic Capture Switch", "SUBMIC"},
1572 {"Analog Right", "AUXR Capture Switch", "AUXR"},
1574 {"ADC Physical Left", NULL, "Analog Left"},
1575 {"ADC Physical Right", NULL, "Analog Right"},
1577 {"Digimic0 Enable", NULL, "DIGIMIC0"},
1578 {"Digimic1 Enable", NULL, "DIGIMIC1"},
1580 {"DIGIMIC0", NULL, "micbias1 select"},
1581 {"DIGIMIC1", NULL, "micbias2 select"},
1583 /* TX1 Left capture path */
1584 {"TX1 Capture Route", "Analog", "ADC Physical Left"},
1585 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
1586 /* TX1 Right capture path */
1587 {"TX1 Capture Route", "Analog", "ADC Physical Right"},
1588 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
1589 /* TX2 Left capture path */
1590 {"TX2 Capture Route", "Analog", "ADC Physical Left"},
1591 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
1592 /* TX2 Right capture path */
1593 {"TX2 Capture Route", "Analog", "ADC Physical Right"},
1594 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
1596 {"ADC Virtual Left1", NULL, "TX1 Capture Route"},
1597 {"ADC Virtual Right1", NULL, "TX1 Capture Route"},
1598 {"ADC Virtual Left2", NULL, "TX2 Capture Route"},
1599 {"ADC Virtual Right2", NULL, "TX2 Capture Route"},
1601 {"ADC Virtual Left1", NULL, "AIF Enable"},
1602 {"ADC Virtual Right1", NULL, "AIF Enable"},
1603 {"ADC Virtual Left2", NULL, "AIF Enable"},
1604 {"ADC Virtual Right2", NULL, "AIF Enable"},
1606 /* Analog bypass routes */
1607 {"Right1 Analog Loopback", "Switch", "Analog Right"},
1608 {"Left1 Analog Loopback", "Switch", "Analog Left"},
1609 {"Right2 Analog Loopback", "Switch", "Analog Right"},
1610 {"Left2 Analog Loopback", "Switch", "Analog Left"},
1611 {"Voice Analog Loopback", "Switch", "Analog Left"},
1613 /* Supply for the Analog loopbacks */
1614 {"Right1 Analog Loopback", NULL, "FM Loop Enable"},
1615 {"Left1 Analog Loopback", NULL, "FM Loop Enable"},
1616 {"Right2 Analog Loopback", NULL, "FM Loop Enable"},
1617 {"Left2 Analog Loopback", NULL, "FM Loop Enable"},
1618 {"Voice Analog Loopback", NULL, "FM Loop Enable"},
1620 {"Analog R1 Playback Mixer", NULL, "Right1 Analog Loopback"},
1621 {"Analog L1 Playback Mixer", NULL, "Left1 Analog Loopback"},
1622 {"Analog R2 Playback Mixer", NULL, "Right2 Analog Loopback"},
1623 {"Analog L2 Playback Mixer", NULL, "Left2 Analog Loopback"},
1624 {"Analog Voice Playback Mixer", NULL, "Voice Analog Loopback"},
1626 /* Digital bypass routes */
1627 {"Right Digital Loopback", "Volume", "TX1 Capture Route"},
1628 {"Left Digital Loopback", "Volume", "TX1 Capture Route"},
1629 {"Voice Digital Loopback", "Volume", "TX2 Capture Route"},
1631 {"Digital R2 Playback Mixer", NULL, "Right Digital Loopback"},
1632 {"Digital L2 Playback Mixer", NULL, "Left Digital Loopback"},
1633 {"Digital Voice Playback Mixer", NULL, "Voice Digital Loopback"},
1637 static int twl4030_add_widgets(struct snd_soc_codec *codec)
1639 struct snd_soc_dapm_context *dapm = &codec->dapm;
1641 snd_soc_dapm_new_controls(dapm, twl4030_dapm_widgets,
1642 ARRAY_SIZE(twl4030_dapm_widgets));
1643 snd_soc_dapm_add_routes(dapm, intercon, ARRAY_SIZE(intercon));
1648 static int twl4030_set_bias_level(struct snd_soc_codec *codec,
1649 enum snd_soc_bias_level level)
1652 case SND_SOC_BIAS_ON:
1654 case SND_SOC_BIAS_PREPARE:
1656 case SND_SOC_BIAS_STANDBY:
1657 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF)
1658 twl4030_codec_enable(codec, 1);
1660 case SND_SOC_BIAS_OFF:
1661 twl4030_codec_enable(codec, 0);
1664 codec->dapm.bias_level = level;
1669 static void twl4030_constraints(struct twl4030_priv *twl4030,
1670 struct snd_pcm_substream *mst_substream)
1672 struct snd_pcm_substream *slv_substream;
1674 /* Pick the stream, which need to be constrained */
1675 if (mst_substream == twl4030->master_substream)
1676 slv_substream = twl4030->slave_substream;
1677 else if (mst_substream == twl4030->slave_substream)
1678 slv_substream = twl4030->master_substream;
1679 else /* This should not happen.. */
1682 /* Set the constraints according to the already configured stream */
1683 snd_pcm_hw_constraint_minmax(slv_substream->runtime,
1684 SNDRV_PCM_HW_PARAM_RATE,
1688 snd_pcm_hw_constraint_minmax(slv_substream->runtime,
1689 SNDRV_PCM_HW_PARAM_SAMPLE_BITS,
1690 twl4030->sample_bits,
1691 twl4030->sample_bits);
1693 snd_pcm_hw_constraint_minmax(slv_substream->runtime,
1694 SNDRV_PCM_HW_PARAM_CHANNELS,
1699 /* In case of 4 channel mode, the RX1 L/R for playback and the TX2 L/R for
1700 * capture has to be enabled/disabled. */
1701 static void twl4030_tdm_enable(struct snd_soc_codec *codec, int direction,
1706 reg = twl4030_read_reg_cache(codec, TWL4030_REG_OPTION);
1708 if (direction == SNDRV_PCM_STREAM_PLAYBACK)
1709 mask = TWL4030_ARXL1_VRX_EN | TWL4030_ARXR1_EN;
1711 mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN;
1718 twl4030_write(codec, TWL4030_REG_OPTION, reg);
1721 static int twl4030_startup(struct snd_pcm_substream *substream,
1722 struct snd_soc_dai *dai)
1724 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1725 struct snd_soc_codec *codec = rtd->codec;
1726 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
1728 if (twl4030->master_substream) {
1729 twl4030->slave_substream = substream;
1730 /* The DAI has one configuration for playback and capture, so
1731 * if the DAI has been already configured then constrain this
1732 * substream to match it. */
1733 if (twl4030->configured)
1734 twl4030_constraints(twl4030, twl4030->master_substream);
1736 if (!(twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE) &
1737 TWL4030_OPTION_1)) {
1738 /* In option2 4 channel is not supported, set the
1739 * constraint for the first stream for channels, the
1740 * second stream will 'inherit' this cosntraint */
1741 snd_pcm_hw_constraint_minmax(substream->runtime,
1742 SNDRV_PCM_HW_PARAM_CHANNELS,
1745 twl4030->master_substream = substream;
1751 static void twl4030_shutdown(struct snd_pcm_substream *substream,
1752 struct snd_soc_dai *dai)
1754 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1755 struct snd_soc_codec *codec = rtd->codec;
1756 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
1758 if (twl4030->master_substream == substream)
1759 twl4030->master_substream = twl4030->slave_substream;
1761 twl4030->slave_substream = NULL;
1763 /* If all streams are closed, or the remaining stream has not yet
1764 * been configured than set the DAI as not configured. */
1765 if (!twl4030->master_substream)
1766 twl4030->configured = 0;
1767 else if (!twl4030->master_substream->runtime->channels)
1768 twl4030->configured = 0;
1770 /* If the closing substream had 4 channel, do the necessary cleanup */
1771 if (substream->runtime->channels == 4)
1772 twl4030_tdm_enable(codec, substream->stream, 0);
1775 static int twl4030_hw_params(struct snd_pcm_substream *substream,
1776 struct snd_pcm_hw_params *params,
1777 struct snd_soc_dai *dai)
1779 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1780 struct snd_soc_codec *codec = rtd->codec;
1781 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
1782 u8 mode, old_mode, format, old_format;
1784 /* If the substream has 4 channel, do the necessary setup */
1785 if (params_channels(params) == 4) {
1786 format = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
1787 mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE);
1789 /* Safety check: are we in the correct operating mode and
1790 * the interface is in TDM mode? */
1791 if ((mode & TWL4030_OPTION_1) &&
1792 ((format & TWL4030_AIF_FORMAT) == TWL4030_AIF_FORMAT_TDM))
1793 twl4030_tdm_enable(codec, substream->stream, 1);
1798 if (twl4030->configured)
1799 /* Ignoring hw_params for already configured DAI */
1803 old_mode = twl4030_read_reg_cache(codec,
1804 TWL4030_REG_CODEC_MODE) & ~TWL4030_CODECPDZ;
1805 mode = old_mode & ~TWL4030_APLL_RATE;
1807 switch (params_rate(params)) {
1809 mode |= TWL4030_APLL_RATE_8000;
1812 mode |= TWL4030_APLL_RATE_11025;
1815 mode |= TWL4030_APLL_RATE_12000;
1818 mode |= TWL4030_APLL_RATE_16000;
1821 mode |= TWL4030_APLL_RATE_22050;
1824 mode |= TWL4030_APLL_RATE_24000;
1827 mode |= TWL4030_APLL_RATE_32000;
1830 mode |= TWL4030_APLL_RATE_44100;
1833 mode |= TWL4030_APLL_RATE_48000;
1836 mode |= TWL4030_APLL_RATE_96000;
1839 printk(KERN_ERR "TWL4030 hw params: unknown rate %d\n",
1840 params_rate(params));
1845 old_format = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
1846 format = old_format;
1847 format &= ~TWL4030_DATA_WIDTH;
1848 switch (params_format(params)) {
1849 case SNDRV_PCM_FORMAT_S16_LE:
1850 format |= TWL4030_DATA_WIDTH_16S_16W;
1852 case SNDRV_PCM_FORMAT_S24_LE:
1853 format |= TWL4030_DATA_WIDTH_32S_24W;
1856 printk(KERN_ERR "TWL4030 hw params: unknown format %d\n",
1857 params_format(params));
1861 if (format != old_format || mode != old_mode) {
1862 if (twl4030->codec_powered) {
1864 * If the codec is powered, than we need to toggle the
1867 twl4030_codec_enable(codec, 0);
1868 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
1869 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1870 twl4030_codec_enable(codec, 1);
1872 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
1873 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1877 /* Store the important parameters for the DAI configuration and set
1878 * the DAI as configured */
1879 twl4030->configured = 1;
1880 twl4030->rate = params_rate(params);
1881 twl4030->sample_bits = hw_param_interval(params,
1882 SNDRV_PCM_HW_PARAM_SAMPLE_BITS)->min;
1883 twl4030->channels = params_channels(params);
1885 /* If both playback and capture streams are open, and one of them
1886 * is setting the hw parameters right now (since we are here), set
1887 * constraints to the other stream to match the current one. */
1888 if (twl4030->slave_substream)
1889 twl4030_constraints(twl4030, substream);
1894 static int twl4030_set_dai_sysclk(struct snd_soc_dai *codec_dai,
1895 int clk_id, unsigned int freq, int dir)
1897 struct snd_soc_codec *codec = codec_dai->codec;
1898 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
1906 dev_err(codec->dev, "Unsupported APLL mclk: %u\n", freq);
1910 if ((freq / 1000) != twl4030->sysclk) {
1912 "Mismatch in APLL mclk: %u (configured: %u)\n",
1913 freq, twl4030->sysclk * 1000);
1920 static int twl4030_set_dai_fmt(struct snd_soc_dai *codec_dai,
1923 struct snd_soc_codec *codec = codec_dai->codec;
1924 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
1925 u8 old_format, format;
1928 old_format = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
1929 format = old_format;
1931 /* set master/slave audio interface */
1932 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1933 case SND_SOC_DAIFMT_CBM_CFM:
1934 format &= ~(TWL4030_AIF_SLAVE_EN);
1935 format &= ~(TWL4030_CLK256FS_EN);
1937 case SND_SOC_DAIFMT_CBS_CFS:
1938 format |= TWL4030_AIF_SLAVE_EN;
1939 format |= TWL4030_CLK256FS_EN;
1945 /* interface format */
1946 format &= ~TWL4030_AIF_FORMAT;
1947 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1948 case SND_SOC_DAIFMT_I2S:
1949 format |= TWL4030_AIF_FORMAT_CODEC;
1951 case SND_SOC_DAIFMT_DSP_A:
1952 format |= TWL4030_AIF_FORMAT_TDM;
1958 if (format != old_format) {
1959 if (twl4030->codec_powered) {
1961 * If the codec is powered, than we need to toggle the
1964 twl4030_codec_enable(codec, 0);
1965 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1966 twl4030_codec_enable(codec, 1);
1968 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1975 static int twl4030_set_tristate(struct snd_soc_dai *dai, int tristate)
1977 struct snd_soc_codec *codec = dai->codec;
1978 u8 reg = twl4030_read_reg_cache(codec, TWL4030_REG_AUDIO_IF);
1981 reg |= TWL4030_AIF_TRI_EN;
1983 reg &= ~TWL4030_AIF_TRI_EN;
1985 return twl4030_write(codec, TWL4030_REG_AUDIO_IF, reg);
1988 /* In case of voice mode, the RX1 L(VRX) for downlink and the TX2 L/R
1989 * (VTXL, VTXR) for uplink has to be enabled/disabled. */
1990 static void twl4030_voice_enable(struct snd_soc_codec *codec, int direction,
1995 reg = twl4030_read_reg_cache(codec, TWL4030_REG_OPTION);
1997 if (direction == SNDRV_PCM_STREAM_PLAYBACK)
1998 mask = TWL4030_ARXL1_VRX_EN;
2000 mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN;
2007 twl4030_write(codec, TWL4030_REG_OPTION, reg);
2010 static int twl4030_voice_startup(struct snd_pcm_substream *substream,
2011 struct snd_soc_dai *dai)
2013 struct snd_soc_pcm_runtime *rtd = substream->private_data;
2014 struct snd_soc_codec *codec = rtd->codec;
2015 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
2018 /* If the system master clock is not 26MHz, the voice PCM interface is
2021 if (twl4030->sysclk != 26000) {
2022 dev_err(codec->dev, "The board is configured for %u Hz, while"
2023 "the Voice interface needs 26MHz APLL mclk\n",
2024 twl4030->sysclk * 1000);
2028 /* If the codec mode is not option2, the voice PCM interface is not
2031 mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE)
2034 if (mode != TWL4030_OPTION_2) {
2035 printk(KERN_ERR "TWL4030 voice startup: "
2036 "the codec mode is not option2\n");
2043 static void twl4030_voice_shutdown(struct snd_pcm_substream *substream,
2044 struct snd_soc_dai *dai)
2046 struct snd_soc_pcm_runtime *rtd = substream->private_data;
2047 struct snd_soc_codec *codec = rtd->codec;
2049 /* Enable voice digital filters */
2050 twl4030_voice_enable(codec, substream->stream, 0);
2053 static int twl4030_voice_hw_params(struct snd_pcm_substream *substream,
2054 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
2056 struct snd_soc_pcm_runtime *rtd = substream->private_data;
2057 struct snd_soc_codec *codec = rtd->codec;
2058 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
2061 /* Enable voice digital filters */
2062 twl4030_voice_enable(codec, substream->stream, 1);
2065 old_mode = twl4030_read_reg_cache(codec, TWL4030_REG_CODEC_MODE)
2066 & ~(TWL4030_CODECPDZ);
2069 switch (params_rate(params)) {
2071 mode &= ~(TWL4030_SEL_16K);
2074 mode |= TWL4030_SEL_16K;
2077 printk(KERN_ERR "TWL4030 voice hw params: unknown rate %d\n",
2078 params_rate(params));
2082 if (mode != old_mode) {
2083 if (twl4030->codec_powered) {
2085 * If the codec is powered, than we need to toggle the
2088 twl4030_codec_enable(codec, 0);
2089 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
2090 twl4030_codec_enable(codec, 1);
2092 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
2099 static int twl4030_voice_set_dai_sysclk(struct snd_soc_dai *codec_dai,
2100 int clk_id, unsigned int freq, int dir)
2102 struct snd_soc_codec *codec = codec_dai->codec;
2103 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
2105 if (freq != 26000000) {
2106 dev_err(codec->dev, "Unsupported APLL mclk: %u, the Voice"
2107 "interface needs 26MHz APLL mclk\n", freq);
2110 if ((freq / 1000) != twl4030->sysclk) {
2112 "Mismatch in APLL mclk: %u (configured: %u)\n",
2113 freq, twl4030->sysclk * 1000);
2119 static int twl4030_voice_set_dai_fmt(struct snd_soc_dai *codec_dai,
2122 struct snd_soc_codec *codec = codec_dai->codec;
2123 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
2124 u8 old_format, format;
2127 old_format = twl4030_read_reg_cache(codec, TWL4030_REG_VOICE_IF);
2128 format = old_format;
2130 /* set master/slave audio interface */
2131 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
2132 case SND_SOC_DAIFMT_CBM_CFM:
2133 format &= ~(TWL4030_VIF_SLAVE_EN);
2135 case SND_SOC_DAIFMT_CBS_CFS:
2136 format |= TWL4030_VIF_SLAVE_EN;
2142 /* clock inversion */
2143 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
2144 case SND_SOC_DAIFMT_IB_NF:
2145 format &= ~(TWL4030_VIF_FORMAT);
2147 case SND_SOC_DAIFMT_NB_IF:
2148 format |= TWL4030_VIF_FORMAT;
2154 if (format != old_format) {
2155 if (twl4030->codec_powered) {
2157 * If the codec is powered, than we need to toggle the
2160 twl4030_codec_enable(codec, 0);
2161 twl4030_write(codec, TWL4030_REG_VOICE_IF, format);
2162 twl4030_codec_enable(codec, 1);
2164 twl4030_write(codec, TWL4030_REG_VOICE_IF, format);
2171 static int twl4030_voice_set_tristate(struct snd_soc_dai *dai, int tristate)
2173 struct snd_soc_codec *codec = dai->codec;
2174 u8 reg = twl4030_read_reg_cache(codec, TWL4030_REG_VOICE_IF);
2177 reg |= TWL4030_VIF_TRI_EN;
2179 reg &= ~TWL4030_VIF_TRI_EN;
2181 return twl4030_write(codec, TWL4030_REG_VOICE_IF, reg);
2184 #define TWL4030_RATES (SNDRV_PCM_RATE_8000_48000)
2185 #define TWL4030_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FORMAT_S24_LE)
2187 static struct snd_soc_dai_ops twl4030_dai_hifi_ops = {
2188 .startup = twl4030_startup,
2189 .shutdown = twl4030_shutdown,
2190 .hw_params = twl4030_hw_params,
2191 .set_sysclk = twl4030_set_dai_sysclk,
2192 .set_fmt = twl4030_set_dai_fmt,
2193 .set_tristate = twl4030_set_tristate,
2196 static struct snd_soc_dai_ops twl4030_dai_voice_ops = {
2197 .startup = twl4030_voice_startup,
2198 .shutdown = twl4030_voice_shutdown,
2199 .hw_params = twl4030_voice_hw_params,
2200 .set_sysclk = twl4030_voice_set_dai_sysclk,
2201 .set_fmt = twl4030_voice_set_dai_fmt,
2202 .set_tristate = twl4030_voice_set_tristate,
2205 static struct snd_soc_dai_driver twl4030_dai[] = {
2207 .name = "twl4030-hifi",
2209 .stream_name = "HiFi Playback",
2212 .rates = TWL4030_RATES | SNDRV_PCM_RATE_96000,
2213 .formats = TWL4030_FORMATS,},
2215 .stream_name = "Capture",
2218 .rates = TWL4030_RATES,
2219 .formats = TWL4030_FORMATS,},
2220 .ops = &twl4030_dai_hifi_ops,
2223 .name = "twl4030-voice",
2225 .stream_name = "Voice Playback",
2228 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
2229 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
2231 .stream_name = "Capture",
2234 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
2235 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
2236 .ops = &twl4030_dai_voice_ops,
2240 static int twl4030_soc_suspend(struct snd_soc_codec *codec, pm_message_t state)
2242 twl4030_set_bias_level(codec, SND_SOC_BIAS_OFF);
2246 static int twl4030_soc_resume(struct snd_soc_codec *codec)
2248 twl4030_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
2252 static int twl4030_soc_probe(struct snd_soc_codec *codec)
2254 struct twl4030_priv *twl4030;
2256 twl4030 = kzalloc(sizeof(struct twl4030_priv), GFP_KERNEL);
2257 if (twl4030 == NULL) {
2258 printk("Can not allocate memroy\n");
2261 snd_soc_codec_set_drvdata(codec, twl4030);
2262 /* Set the defaults, and power up the codec */
2263 twl4030->sysclk = twl4030_codec_get_mclk() / 1000;
2264 codec->dapm.idle_bias_off = 1;
2266 twl4030_init_chip(codec);
2268 snd_soc_add_controls(codec, twl4030_snd_controls,
2269 ARRAY_SIZE(twl4030_snd_controls));
2270 twl4030_add_widgets(codec);
2274 static int twl4030_soc_remove(struct snd_soc_codec *codec)
2276 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
2278 /* Reset registers to their chip default before leaving */
2279 twl4030_reset_registers(codec);
2280 twl4030_set_bias_level(codec, SND_SOC_BIAS_OFF);
2285 static struct snd_soc_codec_driver soc_codec_dev_twl4030 = {
2286 .probe = twl4030_soc_probe,
2287 .remove = twl4030_soc_remove,
2288 .suspend = twl4030_soc_suspend,
2289 .resume = twl4030_soc_resume,
2290 .read = twl4030_read_reg_cache,
2291 .write = twl4030_write,
2292 .set_bias_level = twl4030_set_bias_level,
2293 .reg_cache_size = sizeof(twl4030_reg),
2294 .reg_word_size = sizeof(u8),
2295 .reg_cache_default = twl4030_reg,
2298 static int __devinit twl4030_codec_probe(struct platform_device *pdev)
2300 struct twl4030_codec_audio_data *pdata = pdev->dev.platform_data;
2303 dev_err(&pdev->dev, "platform_data is missing\n");
2307 return snd_soc_register_codec(&pdev->dev, &soc_codec_dev_twl4030,
2308 twl4030_dai, ARRAY_SIZE(twl4030_dai));
2311 static int __devexit twl4030_codec_remove(struct platform_device *pdev)
2313 snd_soc_unregister_codec(&pdev->dev);
2317 MODULE_ALIAS("platform:twl4030-codec");
2319 static struct platform_driver twl4030_codec_driver = {
2320 .probe = twl4030_codec_probe,
2321 .remove = __devexit_p(twl4030_codec_remove),
2323 .name = "twl4030-codec",
2324 .owner = THIS_MODULE,
2328 static int __init twl4030_modinit(void)
2330 return platform_driver_register(&twl4030_codec_driver);
2332 module_init(twl4030_modinit);
2334 static void __exit twl4030_exit(void)
2336 platform_driver_unregister(&twl4030_codec_driver);
2338 module_exit(twl4030_exit);
2340 MODULE_DESCRIPTION("ASoC TWL4030 codec driver");
2341 MODULE_AUTHOR("Steve Sakoman");
2342 MODULE_LICENSE("GPL");