ARM: 6700/1: SPEAr: Correct SOC config base address for spear320

SPEAR320_SOC_CONFIG_BASE was wrong, causing the wrong registers to be
accessed.

Reviewed-by: Stanley Miao <stanley.miao@windriver.com>
Signed-off-by: Viresh Kumar <viresh.kumar@st.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

diff --git a/arch/arm/mach-spear3xx/include/mach/spear320.h b/arch/arm/mach-spear3xx/include/mach/spear320.h
index cacf17a958cdffdd88adcdd13dd928b5f47b5921..53677e464d4b3f90f8b0183587089a56ee3b1244 100644 (file)
--- a/arch/arm/mach-spear3xx/include/mach/spear320.h
+++ b/arch/arm/mach-spear3xx/include/mach/spear320.h
@@ -62,7 +62,7 @@
 #define SPEAR320_SMII1_BASE            0xAB000000
 #define SPEAR320_SMII1_SIZE            0x01000000
 
-#define SPEAR320_SOC_CONFIG_BASE       0xB4000000
+#define SPEAR320_SOC_CONFIG_BASE       0xB3000000
 #define SPEAR320_SOC_CONFIG_SIZE       0x00000070
 /* Interrupt registers offsets and masks */
 #define INT_STS_MASK_REG               0x04