- Configure boot partition
Expose the interfaces that used to enable the configurations
of the boot mode of the eMMC cards.
usage how-to and examples:
Enable the boot partition 1 boot enabled.
"echo 8 > /sys/devices/soc0/soc.1/2100000.aips-bus/ 219c000.usdhc/mmc_host/mmc2/mmc2\:0001/boot_config"
In order to make sure that the re-read the ext-csd of card
can be completed successfully, add the method to wait for
the finish of the busy state.
- setup boot_info message output
Output bit means of important esd_csd register
Read esd_csd info each time when cat boot_info
becasue user may change config affect esd_csd
value.
- Boot partition access howto:
About the details, please refer to the guidance of
Documentation/mmc/mmc-dev-parts.txt
To enable write access to /dev/mmcblkXbootY, disable the forced
read-only access with:
echo 0 > /sys/block/mmcblkXbootY/force_ro
To re-enable read-only access:
echo 1 > /sys/block/mmcblkXbootY/force_ro
NOTE:
- The definitions of the EXT_CSD_PART_CONFIG and EXT_CSD_BOOT_BUS_WIDTH
+------------------------------------------------------------+
| Bit7 | Bit6 | Bit5 Bit4 Bit3 | Bit2 Bit1 Bit0 |
|------|----------|-----------------------|------------------|
| X | BOOT_ACK | BOOT_PARTITION_ENABLE | PARTITION_ACCESS |
+------------------------------------------------------------+
Bit7: Reserved
Bit6: always set to vaule '1' when boot_part is enabled
Bit[5:3]:
0x0 : Device not boot enabled (default)
0x1 : Boot partition 1 enabled for boot
0x2 : Boot partition 2 enabled for boot
0x7 : User area enabled for boot
Bit[2:0]:
0x0 : No access to boot partition (default)
0x1 : R/W boot partition 1
0x2 : R/W boot partition 2
+--------------------------------------------------------------------+
| Bit7 Bit6 Bit5 | Bit4 Bit3 | Bit2 | Bit1 Bit0 |
|----------------|----------------------------------|----------------|
| X | BOOT_MODE | RESET_BOOT_BUS_WIDTH | BOOT_BUS_WIDTH |
+--------------------------------------------------------------------+
Bit [4:3] : BOOT_MODE (non-volatile)
0x0 : Use single data rate + backward compatible timings in boot
operation (default)
0x1 : Use single data rate + high speed timings in boot operation mode
0x2 : Use dual data rate in boot operation
0x3 : Reserved
Bit [2]: RESET_BOOT_BUS_WIDTH (non-volatile)
0x0 : Reset bus width to x1, single data rate and backward compatible
timings after boot operation (default)
0x1 : Retain boot bus width and boot mode after boot operation
Bit[1:0] : BOOT_BUS_WIDTH (non-volatile)
0x0 : x1 (sdr) or x4 (ddr) bus width in boot operation mode (default)
0x1 : x4 (sdr/ddr) bus width in boot operation mode
0x2 : x8 (sdr/ddr) bus width in boot operation mode
0x3 : Reserved
- example of the boot_info:
boot_info:0x07;
ALT_BOOT_MODE:1 - Supports alternate boot method
DDR_BOOT_MODE:1 - Supports alternate dual data rate during boot
HS_BOOTMODE:1 - Supports high speed timing during boot
boot_size:2048KB
boot_partition:0x48;
BOOT_ACK:1 - Boot acknowledge sent during boot operation
BOOT_PARTITION-ENABLE: 1 - Boot partition 1 enabled
PARTITION_ACCESS:0 - No access to boot partition
boot_bus:0x00
BOOT_MODE:0 - Use single data rate + backward compatible timings
in boot operation
RESET_BOOT_BUS_WIDTH:0 - Reset bus width to x1, single data rate
and backwardcompatible timings after boot operation
BOOT_BUS_WIDTH:0 - x1 (sdr) or x4 (ddr) bus width in boot
operation mode
Xianzhong [Tue, 13 Aug 2013 15:16:24 +0000 (23:16 +0800)]
ENGR00274782 fixed gpu crash when baseAddress is not 0 or 2G
The baseAddress of contiguousVidMem is the actual physical address
which is not subtracted by gpu baseAddress, but the allocated physical address
has been subtracted by gpu baseAddress in gckVIDMEM_Lock,
so the invalid offset is produced and used to calculate the logical address.
Dong Aisheng [Mon, 21 Oct 2013 08:54:40 +0000 (16:54 +0800)]
mmc: sdhci-esdhc-imx: add delay line setting support
The DLL(Delay Line) is newly added to assist in sampling read data.
The DLL provides the ability to programmatically select a quantized
delay (in fractions of the clock period) regardless of on-chip variations
such as process, voltage and temperature (PVT).
This patch adds a user interface to set slave delay line via device tree.
It's usually used in high speed mode like mmc DDR mode when the signal
quality is not good caused by board design, e.g. the signal path is too
long. User can manually set delay line to find a suitable data sampling
window for card to work properly.
Robby Cai [Mon, 14 Oct 2013 03:32:25 +0000 (11:32 +0800)]
ENGR00283496 ARM: clk: imx6sl: update epdc pixel clock tree
Add CLK_SET_RATE_PARENT flag for epdc pixel clock to allow the rate change
operation to propagate up to the clock's parent in order to get desired rate.
Huang Shijie [Wed, 9 Oct 2013 07:13:23 +0000 (15:13 +0800)]
serial: imx: implement the flush_buffer hook
The current driver does not implement the flush_buffer hook for
uart_ops. When we enable the DMA for the driver, and test it with Bluetooth,
we may meet the following bug for TX:
[1] User application may call the flush operation at any time.
The uart_flush_buffer() calls the uart_circ_clear() to set
the xmit->head and xmit->tail with 0.
[2] The TX DMA callback can be called at any time too.
The dma_tx_call() will update the xmit->tail.
If [2] occurs just after the [1], we will get the wrong xmit->tail.
This patch implements the flush_buffer hook to fix this issue.
Robby Cai [Wed, 25 Sep 2013 05:35:46 +0000 (13:35 +0800)]
ENGR00281186 dmaengine: pxp: not fetch data from AS buffer if it's not used
There's no explicit BIT in PxP register to disable AS buffer.
The right way to disable AS is to set ULC to a higher value than the LRC.
It has been done once in probe time, but not in run time.
This could cause one potential problem because even when ULC, LRC
and buffer address is set to 0 PxP will still fetch one pixel data from addr 0.
This patch fixes it by set ULC higher than LRC for AS if it's not used (i.e.,
no alpha-blending) at run time.
Hongzhang Yang [Thu, 10 Oct 2013 03:12:06 +0000 (11:12 +0800)]
ENGR00283192 Avoid vpu rmmod failure and modprobe warning
- Avoid vpu rmmod failure caused by regulator free failure
Do not call regulator_put because regulators returned from
devm_regulator_get are automatically regulator_put() on
driver detach
- Avoid vpu modprobe warning caused by unbalanced pm_runtime_enable
Add missing call to pm_runtime_disable
Signed-off-by: Hongzhang Yang <Hongzhang.Yang@freescale.com>
Frank Li [Thu, 3 Oct 2013 19:51:58 +0000 (14:51 -0500)]
ENGR00280494-2 Add config for mfgtools
Build in USB Mass storage
Enable CONFIG_FSL_UTP
Must list all gadgets in config file
otherwise CONFIG_USB_MASS_STORAGE becomes to m
+# CONFIG_USB_ZERO is not set
+# CONFIG_USB_AUDIO is not set
+# CONFIG_USB_ETH is not set
+# CONFIG_USB_G_NCM is not set
+# CONFIG_USB_GADGETFS is not set
+# CONFIG_USB_FUNCTIONFS is not set
+CONFIG_USB_MASS_STORAGE=y
+CONFIG_FSL_UTP=y
+# CONFIG_USB_G_SERIAL is not set
+# CONFIG_USB_MIDI_GADGET is not set
+# CONFIG_USB_G_PRINTER is not set
+# CONFIG_USB_CDC_COMPOSITE is not set
+# CONFIG_USB_G_ACM_MS is not set
+# CONFIG_USB_G_MULTI is not set
+# CONFIG_USB_G_HID is not set
+# CONFIG_USB_G_DBGP is not set
+# CONFIG_USB_G_WEBCAM is not set
The overlay framebuffer's position and resolution are
set with two different APIs. They depend on each other to
make sure the overlay framebuffer window will not go out
of the background framebuffer window. Potentially, this
causes the overlay framebuffer's position or resolution
of the current video pipeline be impacted by the settings
of the last time. To setup the overlay fb from scratch
correctly, this patch takes the following steps:
- blank framebuffer
- set framebuffer position to the starting point
- reconfigure framebuffer
- set framebuffer position to a specific point
- unblank framebuffer
This procedure applies to non-overlay framebuffers as well.
Liu Ying [Thu, 26 Sep 2013 05:41:17 +0000 (13:41 +0800)]
ENGR00279204-1 mxc vout: reconfig fb when necessary
Users may call VIDIOC_S_CTRL or VIDIOC_S_CROP ioctrls
to update streaming parameters on-the-fly after video
has been streamed on, such as for rotation/output
resolution/overlay output position change. Any
unnecessary frame buffer reconfiguration would cause
a pair of frame buffer blank/unblank events happen and
even makes the background framebuffer show up for a
short period of time if the video is rendered on an
overlay framebuffer. This patch compares the last time
video output pipe line settings with the current ones
to determine whether frame buffer reconfiguration is
necessary or not.
Robby Cai [Sun, 22 Sep 2013 09:31:06 +0000 (17:31 +0800)]
ENGR00280140 pxp/v4l2: restore the display content after video playback finishes
After finish video playback, the last frame remains on the display.
It's because the UI display start address (smem_start) has been changed when
do video playback but not changed back again after the playback finishes.
From the function call point of view,
pxp_set_fbinfo() // pxp->fb.base tracks right addr for UI framebuffer
pxp_show_buf(toshow) // smem_start changed to v4l2 display addr
pxp_set_fbinfo() // pxp->fb.base changed to v4l2 display addr
pxp_show_buf(not toshow) // smem_start still equal to v4l2 display addr
// for pan_display
This patch fixes it by calling pxp_set_fbinfo once in open function.
Robby Cai [Thu, 12 Sep 2013 11:11:54 +0000 (19:11 +0800)]
ENGR00279413 pxp/v4l2: get the right framebuffer start address at run time
Previously the driver gets the framebuffer start address at probe time.
But this address might be changed if the framebuffer drivers re-allocate
the frame buffers due to the application changes the yres_virtual.
As a result, some garbage data can be observed on display.
This patch adjusts the way to detect the start address at run time to
fix this problem.
The following commit introduced a wrong sanity check for
the io_regulator which is intended to be got from device tree. a364635a535705a8c16df49ff9bc7b9362b083ec
Oliver Brown [Sun, 8 Sep 2013 20:05:28 +0000 (15:05 -0500)]
ENGR00278667-1 [mxc_v4l2_capture]: Add adv7180 driver in 3.10.9 Kernel
Copied file from 3.5.7 Kernel
commit de6459732a23402cbe520812bf4202299330fd68
Author: Oliver Brown <oliver.brown@freescale.com>
Date: Mon Jun 24 16:41:17 2013 -0500
Added missing call to clk_disable_unprepare() in adv7180_probe.
Signed-off-by: Oliver Brown <oliver.brown@freescale.com>
-Added function and file name to some error messages that are
in multiple places.
-Added calls to clk_prepare_enable() and clk_disable_unprepare()
in ov5640_probe() to manage the sensor clock.
-Added missing sanity check for "io_regulator"
-Fixed several whitespace errors
Signed-off-by: Oliver Brown <oliver.brown@freescale.com>
Robby Cai [Wed, 11 Sep 2013 05:27:59 +0000 (13:27 +0800)]
ENGR00279087-2 csi_v4l2_capture: move int_dev_init() to open function
By later initialization for camera dev (to call int_dev_init), the driver
works well whether the master (csi_v4l2_capture) or the slave (ov5640)
has been attached first. In this way, the driver can stick to the philosophy
for the V4L2_INT_DEVICE framework (the attach sequence shouldn't matter).
-Added function and file names to error messages that are similar
-Changed mxc_v4l_open to use clk_prepare_enable()
-Changed mxc_v4l_open to use clk_disable_unprepare()
Signed-off-by: Oliver Brown <oliver.brown@freescale.com>
According to the help text in the config SWP_EMULATE in arch/arm/mm/Kconfig:
"In some older versions of glibc [<=2.8] SWP is used during futex trylock()
operations with the assumption that the code will not be preempted. This
invalid assumption may be more likely to fail with SWP emulation enabled,
leading to deadlock of the user application."
The audio codec toolchain version is gcc-4.1.1-glibc-2.4, we need turn off
the CONFIG_SWP_EMULATE in the imx_v7_defconfig.
Signed-off-by: Shengjiu Wang <b02247@freescale.com>
ENGR00277382-1 [MX6SL] Ensure that PLL1 and PLL2 are always enabled.
Need to ensure that PLL1 and PLL2 have the enabled bit set even when
the PLL is powered down and disabled.
1. Modifications to the ARM_PODF bits in the CCM require PLL1 to be enabled.
2. PLL2 will be set to bypass and enabled state (can be powered down) in low
power IDLE mode.
Robby Cai [Tue, 3 Sep 2013 09:42:22 +0000 (17:42 +0800)]
ENGR00275034-5 ARM: imx_v7_defconfig: enable camera and v4l2 capture support
Enable the following options on imx6sl
CONFIG_VIDEO_V4L2_INT_DEVICE=y
CONFIG_VIDEO_MXC_CAPTURE=y
CONFIG_VIDEO_MXC_CSI_CAMERA=y
CONFIG_MXC_CAMERA_OV5640=y
This patch also does
- use module_i2c_driver() instead of module_init/exit.
- set the regulator reference pointer to NULL if it's not found in DT.
Otherwise call regulator_enable/disable() on it will cause dump
since the codes only check the regulator against NULL before the call
and it's not NULL but still invalid.
- drop gpo regulator definition and operations since it's of no use
Robby Cai [Thu, 29 Aug 2013 07:39:12 +0000 (15:39 +0800)]
ENGR00275034-1 media: Add CSI/CSI v4l2 capture driver support
- change the includes
<asm/uaccess.h> to <linux/uaccess.h>
<mach/ipu-v3.h> to <linux/ipu-v3.h>
<mach/dma.h> to <linux/platform_data/dma-imx.h>
- add an extra parameter for device_prep_slave_sg() as the prototype's changed.
- drop csi_mclk_recalc() func since there's no divider in CSI module
- drop deprecated __devinit, __devexit and __devexit_p
- use module_platform_driver()
- use of_match_table()
- replace ioremap() with devm_ioremap()
- replace clk_get() with devm_clk_get()
- replace clk_enable/disable() with clk_prepare_enable/clk_disable_unprepare()
- add check for no camera attached on board
- drop function csi_mclk_enable(), csi_mclk_enable() in fsl_csi.c,
and move clock enable/disable to csi_v4l2_capture.c
ENGR00277864 input: mma8450: Add chip id check in probe
Add chip ID check in probe function. The mma8450 is
on the E-INK daughter board. When the daughter board
is not pluged, there would be polling error log
continuously. Add the check to avoid this.
Peter Chen [Wed, 4 Sep 2013 07:06:21 +0000 (15:06 +0800)]
ENGR00278097-2 usb: chipidea: imx: Add usb_phy_shutdown at probe's error path
If not, the PHY will be active even the controller is not in use.
We find this issue due to the PHY's clock refcount is not correct
due to -EPROBE_DEFER return after phy's init.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
ENGR00277955-2 rtc: rtc-snvs: support wakeup system from freeze mode
To support wakeup system from freeze mode of suspend,
device's irq can NOT be disabled during devices suspend,
so we need to add IRQF_NO_SUSPEND flag to irqflags.
ENGR00277955-1 keyboard: gpio_keys: support wakeup system from freeze mode
To support wakeup system from freeze mode of suspend,
device's irq can NOT be disabled during devices suspend,
so we need to add IRQF_NO_SUSPEND flag to irqflags.
ENGR00278098 Make gpu modulable driver passing build
Gpu driver requires to do cache invalid, clean and flush operation.
But in 3.10 kernel, these APIs are not supposed to be called from
device driver. To avoid too much code change, Revert "ARM: Fix bad
merge bd1274dc005 (Merge branch 'v6v7' into devel)" to make the
situation the same as 3.0.35 kernel.
Robby Cai [Thu, 22 Aug 2013 10:01:59 +0000 (18:01 +0800)]
ENGR00275033-1 mx6sl: pxp/v4l: port v4l2 output driver to 3.10
port v4l2 output driver to 3.10 kernel
- replace .ioctl with .unlocked_ioctl
- add .vfl_dir flag - VFL_DIR_TX (newly introduced) for video_device
- drop __devinit, __devexit, __exit and __exit_p
- replace mxc_elcdif_frame_addr_setup() with pxp_show_buf(), where pan_display
be called due to the adoption of mxsfb.c from community
- change the fb id to be compared due to use new mxsfb.c
- mark the s_crop() and s_fbuf() third parameter const
- move local fbi variable to struct pxps
- use module_platform_driver()
Peter Chen [Wed, 10 Jul 2013 09:21:23 +0000 (17:21 +0800)]
ENGR00277805-2 usb: chipidea: udc: Consolidate the call of disconnect
The udc-core will call gadget's driver->disconnect, so we should avoid
calling gadget's disconnect again at ci_udc_stop in case the gadget's
unbind free some structs which is still used at gadget's disconnect.
Tested-by: Marek Vasut <marex@denx.de> Signed-off-by: Peter Chen <peter.chen@freescale.com>
Nicolin Chen [Thu, 29 Aug 2013 06:27:32 +0000 (14:27 +0800)]
ENGR00276567-5 mfd: si476x: Add two involatile registers support
These two regsiters would be used by si476x-codec driver. Setting them as
involatile registers would allow codec driver to set the value into cache
and to sync them after power-up.
The commit fc52e42 (ENGR00269945: ARM: imx6: remove sabresd hdcp dts
files) removes dts but leaves dtb targets in Makefile. This causes
build issue with 'make ARCH=arm dtbs'. Remove the dead targets.
projects / karo-tx-linux.git / log