Merge remote-tracking branch 'tegra/for-next'

Conflicts:
	MAINTAINERS

diff --combined arch/arm/mach-tegra/Kconfig
index f8d1276d18afca4fd3960a79af12b4cd425e8cf9,a5e6556f87bc1b6f873c3f8cb7a163d9c2511506..09e740f58b274184f0cd22b282def431d037b6d9
--- 1/arch/arm/mach-tegra/Kconfig
--- 2/arch/arm/mach-tegra/Kconfig
+++ b/arch/arm/mach-tegra/Kconfig
@@@ -3,6 -3,7 +3,6 @@@ config ARCH_TEGR
        select ARCH_HAS_CPUFREQ
        select ARCH_REQUIRE_GPIOLIB
        select ARM_GIC
 -      select CLKDEV_LOOKUP
        select CLKSRC_MMIO
        select CLKSRC_OF
        select COMMON_CLK
@@@ -10,6 -11,7 +10,6 @@@
        select GENERIC_CLOCKEVENTS
        select HAVE_ARM_SCU if SMP
        select HAVE_ARM_TWD if SMP
 -      select HAVE_CLK
        select HAVE_SMP
        select MIGHT_HAVE_CACHE_L2X0
        select MIGHT_HAVE_PCI
@@@ -51,7 -53,7 +51,7 @@@ config ARCH_TEGRA_3x_SO
  
  config ARCH_TEGRA_114_SOC
        bool "Enable support for Tegra114 family"
 -      select ARM_ERRATA_798181
 +      select ARM_ERRATA_798181 if SMP
        select ARM_L1_CACHE_SHIFT_6
        select HAVE_ARM_ARCH_TIMER
        select PINCTRL_TEGRA114
@@@ -59,6 -61,14 +59,14 @@@
          Support for NVIDIA Tegra T114 processor family, based on the
          ARM CortexA15MP CPU
  
+ config ARCH_TEGRA_124_SOC
+       bool "Enable support for Tegra124 family"
+       select ARM_L1_CACHE_SHIFT_6
+       select HAVE_ARM_ARCH_TIMER
+       help
+         Support for NVIDIA Tegra T124 processor family, based on the
+         ARM CortexA15MP CPU
+ 
  config TEGRA_AHB
        bool "Enable AHB driver for NVIDIA Tegra SoCs"
        default y

diff --combined arch/arm/mach-tegra/fuse.c
index fef1dc8305d3341d9a9f95b1176619495ae0ec1c,d4639c5066222ea785f3dab068f46874fd52513c..9a4e910c3796154c8fa6c167851a8f6b112265f3
--- 1/arch/arm/mach-tegra/fuse.c
--- 2/arch/arm/mach-tegra/fuse.c
+++ b/arch/arm/mach-tegra/fuse.c
@@@ -21,14 -21,26 +21,26 @@@
  #include <linux/kernel.h>
  #include <linux/io.h>
  #include <linux/export.h>
+ #include <linux/random.h>
  #include <linux/tegra-soc.h>
  
  #include "fuse.h"
  #include "iomap.h"
  #include "apbio.h"
  
+ /* Tegra20 only */
  #define FUSE_UID_LOW          0x108
  #define FUSE_UID_HIGH         0x10c
+ 
+ /* Tegra30 and later */
+ #define FUSE_VENDOR_CODE      0x200
+ #define FUSE_FAB_CODE         0x204
+ #define FUSE_LOT_CODE_0               0x208
+ #define FUSE_LOT_CODE_1               0x20c
+ #define FUSE_WAFER_ID         0x210
+ #define FUSE_X_COORDINATE     0x214
+ #define FUSE_Y_COORDINATE     0x218
+ 
  #define FUSE_SKU_INFO         0x110
  
  #define TEGRA20_FUSE_SPARE_BIT                0x200
@@@ -112,21 -124,51 +124,51 @@@ u32 tegra_read_chipid(void
        return readl_relaxed(IO_ADDRESS(TEGRA_APB_MISC_BASE) + 0x804);
  }
  
+ static void __init tegra20_fuse_init_randomness(void)
+ {
+       u32 randomness[2];
+ 
+       randomness[0] = tegra_fuse_readl(FUSE_UID_LOW);
+       randomness[1] = tegra_fuse_readl(FUSE_UID_HIGH);
+ 
+       add_device_randomness(randomness, sizeof(randomness));
+ }
+ 
+ /* Applies to Tegra30 or later */
+ static void __init tegra30_fuse_init_randomness(void)
+ {
+       u32 randomness[7];
+ 
+       randomness[0] = tegra_fuse_readl(FUSE_VENDOR_CODE);
+       randomness[1] = tegra_fuse_readl(FUSE_FAB_CODE);
+       randomness[2] = tegra_fuse_readl(FUSE_LOT_CODE_0);
+       randomness[3] = tegra_fuse_readl(FUSE_LOT_CODE_1);
+       randomness[4] = tegra_fuse_readl(FUSE_WAFER_ID);
+       randomness[5] = tegra_fuse_readl(FUSE_X_COORDINATE);
+       randomness[6] = tegra_fuse_readl(FUSE_Y_COORDINATE);
+ 
+       add_device_randomness(randomness, sizeof(randomness));
+ }
+ 
  void __init tegra_init_fuse(void)
  {
        u32 id;
+       u32 randomness[5];
  
        u32 reg = readl(IO_ADDRESS(TEGRA_CLK_RESET_BASE + 0x48));
        reg |= 1 << 28;
        writel(reg, IO_ADDRESS(TEGRA_CLK_RESET_BASE + 0x48));
  
        reg = tegra_fuse_readl(FUSE_SKU_INFO);
+       randomness[0] = reg;
        tegra_sku_id = reg & 0xFF;
  
        reg = tegra_apb_readl(TEGRA_APB_MISC_BASE + STRAP_OPT);
+       randomness[1] = reg;
        tegra_bct_strapping = (reg & RAM_ID_MASK) >> RAM_CODE_SHIFT;
  
        id = tegra_read_chipid();
+       randomness[2] = id;
        tegra_chip_id = (id >> 8) & 0xff;
  
        switch (tegra_chip_id) {
@@@ -149,9 -191,31 +191,21 @@@
  
        tegra_revision = tegra_get_revision(id);
        tegra_init_speedo_data();
+       randomness[3] = (tegra_cpu_process_id << 16) | tegra_core_process_id;
+       randomness[4] = (tegra_cpu_speedo_id << 16) | tegra_soc_speedo_id;
+ 
+       add_device_randomness(randomness, sizeof(randomness));
+       switch (tegra_chip_id) {
+       case TEGRA20:
+               tegra20_fuse_init_randomness();
+       case TEGRA30:
+       case TEGRA114:
+       default:
+               tegra30_fuse_init_randomness();
+       }
  
        pr_info("Tegra Revision: %s SKU: %d CPU Process: %d Core Process: %d\n",
                tegra_revision_name[tegra_revision],
                tegra_sku_id, tegra_cpu_process_id,
                tegra_core_process_id);
  }
 -
 -unsigned long long tegra_chip_uid(void)
 -{
 -      unsigned long long lo, hi;
 -
 -      lo = tegra_fuse_readl(FUSE_UID_LOW);
 -      hi = tegra_fuse_readl(FUSE_UID_HIGH);
 -      return (hi << 32ull) | lo;
 -}
 -EXPORT_SYMBOL(tegra_chip_uid);

diff --combined arch/arm/mach-tegra/tegra.c
index 386115ae5c0322e487e51b289cb831f18aa4fa37,80b801a94677aaf71e725ba5908eb825e06a6567..ce553d557c31caf1670e50ceadad19c067d2864c
--- 1/arch/arm/mach-tegra/tegra.c
--- 2/arch/arm/mach-tegra/tegra.c
+++ b/arch/arm/mach-tegra/tegra.c
@@@ -16,6 -16,7 +16,6 @@@
   *
   */
  
 -#include <linux/clocksource.h>
  #include <linux/kernel.h>
  #include <linux/init.h>
  #include <linux/platform_device.h>
@@@ -32,6 -33,7 +32,6 @@@
  #include <linux/slab.h>
  #include <linux/sys_soc.h>
  #include <linux/usb/tegra_usb_phy.h>
 -#include <linux/clk-provider.h>
  #include <linux/clk/tegra.h>
  #include <linux/irqchip.h>
  
@@@ -143,6 -145,12 +143,6 @@@ out
        of_platform_populate(NULL, of_default_bus_match_table, NULL, parent);
  }
  
 -static void __init tegra_dt_init_time(void)
 -{
 -      of_clk_init(NULL);
 -      clocksource_of_init();
 -}
 -
  static void __init paz00_init(void)
  {
        if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC))
@@@ -173,6 -181,7 +173,7 @@@ static void __init tegra_dt_init_late(v
  }
  
  static const char * const tegra_dt_board_compat[] = {
+       "nvidia,tegra124",
        "nvidia,tegra114",
        "nvidia,tegra30",
        "nvidia,tegra20",
@@@ -184,6 -193,7 +185,6 @@@ DT_MACHINE_START(TEGRA_DT, "NVIDIA Tegr
        .smp            = smp_ops(tegra_smp_ops),
        .init_early     = tegra_init_early,
        .init_irq       = tegra_dt_init_irq,
 -      .init_time      = tegra_dt_init_time,
        .init_machine   = tegra_dt_init,
        .init_late      = tegra_dt_init_late,
        .restart        = tegra_pmc_restart,