Clean up enet property and enebale enet2 multi-queue.
Signed-off-by: Fugang Duan <B38611@freescale.com>
pinctrl-0 = <&pinctrl_enet1_1>;
phy-mode = "rgmii";
phy-handle = <ðphy1>;
- fsl,num_tx_queues=<3>;
- fsl,num_rx_queues=<3>;
pinctrl-assert-gpios = <&max7322_1 0 GPIO_ACTIVE_HIGH>;
fsl,magic-packet;
status = "okay";
pinctrl-0 = <&pinctrl_enet2_1>;
phy-mode = "rgmii";
phy-handle = <ðphy0>;
- fsl,num_tx_queues=<3>;
- fsl,num_rx_queues=<3>;
pinctrl-assert-gpios = <&max7322_2 0 GPIO_ACTIVE_HIGH>;
fsl,magic-packet;
status = "okay";
pinctrl-0 = <&pinctrl_enet1_1>;
phy-mode = "rgmii";
phy-handle = <ðphy1>;
- fsl,num_tx_queues=<3>;
- fsl,num_rx_queues=<3>;
pinctrl-assert-gpios = <&max7322_1 0 GPIO_ACTIVE_HIGH>;
fsl,magic-packet;
status = "okay";
pinctrl-0 = <&pinctrl_enet2_1>;
phy-mode = "rgmii";
phy-handle = <ðphy0>;
- fsl,num_tx_queues=<3>;
- fsl,num_rx_queues=<3>;
pinctrl-assert-gpios = <&max7322_2 0 GPIO_ACTIVE_HIGH>;
fsl,magic-packet;
status = "okay";
pinctrl-0 = <&pinctrl_enet1_1>;
phy-mode = "rgmii";
phy-handle = <ðphy1>;
- fsl,num_tx_queues=<3>;
- fsl,num_rx_queues=<3>;
pinctrl-assert-gpios = <&max7322 0 GPIO_ACTIVE_HIGH>;
fsl,magic-packet;
status = "okay";
pinctrl-0 = <&pinctrl_enet2_1>;
phy-mode = "rgmii";
phy-handle = <ðphy0>;
- fsl,num_tx_queues=<3>;
- fsl,num_rx_queues=<3>;
fsl,magic-packet;
status = "okay";
};
pinctrl-0 = <&pinctrl_enet1>;
pinctrl-assert-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>, <&gpio2 6 GPIO_ACTIVE_LOW>;
phy-mode = "rgmii";
- fsl,num_tx_queues=<3>;
- fsl,num_rx_queues=<3>;
status = "okay";
};
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet2>;
phy-mode = "rgmii";
- fsl,num_tx_queues=<3>;
- fsl,num_rx_queues=<3>;
status = "okay";
};
<&clks IMX6SX_CLK_ENET_PTP>;
clock-names = "ipg", "ahb", "ptp",
"enet_clk_ref", "enet_out";
+ fsl,num-tx-queues=<3>;
+ fsl,num-rx-queues=<3>;
status = "disabled";
};