1 #ifndef CYGONCE_DEVS_ETH_PHY_H_
2 #define CYGONCE_DEVS_ETH_PHY_H_
3 //==========================================================================
7 // User API for ethernet transciever (PHY) support
9 //==========================================================================
10 //####ECOSGPLCOPYRIGHTBEGIN####
11 // -------------------------------------------
12 // This file is part of eCos, the Embedded Configurable Operating System.
13 // Copyright (C) 2003 Gary Thomas
15 // eCos is free software; you can redistribute it and/or modify it under
16 // the terms of the GNU General Public License as published by the Free
17 // Software Foundation; either version 2 or (at your option) any later version.
19 // eCos is distributed in the hope that it will be useful, but WITHOUT ANY
20 // WARRANTY; without even the implied warranty of MERCHANTABILITY or
21 // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
24 // You should have received a copy of the GNU General Public License along
25 // with eCos; if not, write to the Free Software Foundation, Inc.,
26 // 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
28 // As a special exception, if other files instantiate templates or use macros
29 // or inline functions from this file, or you compile this file and link it
30 // with other works to produce a work based on this file, this file does not
31 // by itself cause the resulting work to be covered by the GNU General Public
32 // License. However the source code for this file must still be made available
33 // in accordance with section (3) of the GNU General Public License.
35 // This exception does not invalidate any other reasons why a work based on
36 // this file might be covered by the GNU General Public License.
38 // Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
39 // at http://sources.redhat.com/ecos/ecos-license/
40 // -------------------------------------------
41 //####ECOSGPLCOPYRIGHTEND####
42 //==========================================================================
43 //#####DESCRIPTIONBEGIN####
46 // Contributors: gthomas
51 //####DESCRIPTIONEND####
53 //==========================================================================
55 #define PHY_BIT_LEVEL_ACCESS_TYPE 0
56 #define PHY_REG_LEVEL_ACCESS_TYPE 1
58 // Physical device access - defined by hardware instance
60 int ops_type; // 0 => bit level, 1 => register level
66 void (*set_data)(int);
67 int (*get_data)(void);
68 void (*set_clock)(int);
72 void (*put_reg)(int reg, int unit, unsigned short data);
73 bool (*get_reg)(int reg, int unit, unsigned short *data);
77 struct _eth_phy_dev_entry *dev; // Chip access functions
80 #define ETH_PHY_BIT_LEVEL_ACCESS_FUNS(_l,_init,_reset,_set_data,_get_data,_set_clock,_set_dir) \
81 static eth_phy_access_t _l = {PHY_BIT_LEVEL_ACCESS_TYPE, false, _init, _reset, \
82 {.bit_level_ops = {_set_data, _get_data, _set_clock, _set_dir}}}
84 #define ETH_PHY_REG_LEVEL_ACCESS_FUNS(_l,_init,_reset,_put_reg,_get_reg) \
85 static eth_phy_access_t _l = {PHY_REG_LEVEL_ACCESS_TYPE, false, _init, _reset, \
86 {.reg_level_ops = {_put_reg, _get_reg}}}
88 #define ETH_PHY_STAT_LINK 0x0001 // Link up/down
89 #define ETH_PHY_STAT_100MB 0x0002 // Connection is 100Mb/10Mb
90 #define ETH_PHY_STAT_FDX 0x0004 // Connection is full/half duplex
92 externC bool _eth_phy_init(eth_phy_access_t *f);
93 externC void _eth_phy_reset(eth_phy_access_t *f);
94 externC int _eth_phy_state(eth_phy_access_t *f);
95 externC int _eth_phy_cfg(eth_phy_access_t *f, int mode);
96 #define ETH_PHY_MODE_DEFAULT 0
99 externC void _eth_phy_write(eth_phy_access_t *f, int reg, int unit, unsigned short data);
100 externC bool _eth_phy_read(eth_phy_access_t *f, int reg, int unit, unsigned short *val);
102 #endif // CYGONCE_DEVS_ETH_PHY_H_
103 // ------------------------------------------------------------------------