1 //==========================================================================
3 // devs/serial/arm/at91/at91_serial.c
5 // Atmel AT91/EB40 Serial I/O Interface Module (interrupt driven)
7 //==========================================================================
8 //####ECOSGPLCOPYRIGHTBEGIN####
9 // -------------------------------------------
10 // This file is part of eCos, the Embedded Configurable Operating System.
11 // Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
13 // eCos is free software; you can redistribute it and/or modify it under
14 // the terms of the GNU General Public License as published by the Free
15 // Software Foundation; either version 2 or (at your option) any later version.
17 // eCos is distributed in the hope that it will be useful, but WITHOUT ANY
18 // WARRANTY; without even the implied warranty of MERCHANTABILITY or
19 // FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
22 // You should have received a copy of the GNU General Public License along
23 // with eCos; if not, write to the Free Software Foundation, Inc.,
24 // 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
26 // As a special exception, if other files instantiate templates or use macros
27 // or inline functions from this file, or you compile this file and link it
28 // with other works to produce a work based on this file, this file does not
29 // by itself cause the resulting work to be covered by the GNU General Public
30 // License. However the source code for this file must still be made available
31 // in accordance with section (3) of the GNU General Public License.
33 // This exception does not invalidate any other reasons why a work based on
34 // this file might be covered by the GNU General Public License.
36 // Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
37 // at http://sources.redhat.com/ecos/ecos-license/
38 // -------------------------------------------
39 //####ECOSGPLCOPYRIGHTEND####
40 //==========================================================================
41 //#####DESCRIPTIONBEGIN####
44 // Contributors: gthomas, tkoeller, sblock
46 // Purpose: Atmel AT91/EB40 Serial I/O module (interrupt driven version)
49 //####DESCRIPTIONEND####
51 //==========================================================================
53 #include <pkgconf/hal.h>
54 #include <pkgconf/infra.h>
55 #include <pkgconf/system.h>
56 #include <pkgconf/io_serial.h>
57 #include <pkgconf/io.h>
58 #include <pkgconf/kernel.h>
60 #include <cyg/io/io.h>
61 #include <cyg/hal/hal_io.h>
62 #include <cyg/hal/hal_intr.h>
63 #include <cyg/io/devtab.h>
64 #include <cyg/io/serial.h>
65 #include <cyg/infra/diag.h>
66 #include <cyg/infra/cyg_type.h>
67 #include <cyg/infra/cyg_ass.h>
69 externC void * memcpy( void *, const void *, size_t );
71 #ifdef CYGPKG_IO_SERIAL_ARM_AT91
73 #include "at91_serial.h"
75 #define RCVBUF_EXTRA 16
76 #define RCV_TIMEOUT 10
78 #define SIFLG_NONE 0x00
79 #define SIFLG_TX_READY 0x01
80 #define SIFLG_XMIT_BUSY 0x02
81 #define SIFLG_XMIT_CONTINUE 0x04
83 typedef struct at91_serial_info {
88 cyg_interrupt serial_interrupt;
89 cyg_handle_t serial_interrupt_handle;
90 cyg_uint8 *rcv_buffer[2];
91 cyg_uint16 rcv_chunk_size;
96 static bool at91_serial_init(struct cyg_devtab_entry *tab);
97 static bool at91_serial_putc_interrupt(serial_channel *chan, unsigned char c);
98 #if (defined(CYGPKG_IO_SERIAL_ARM_AT91_SERIAL0) && CYGNUM_IO_SERIAL_ARM_AT91_SERIAL0_BUFSIZE == 0) \
99 || (defined(CYGPKG_IO_SERIAL_ARM_AT91_SERIAL1) && CYGNUM_IO_SERIAL_ARM_AT91_SERIAL1_BUFSIZE == 0) \
100 || (defined(CYGPKG_IO_SERIAL_ARM_AT91_SERIAL2) && CYGNUM_IO_SERIAL_ARM_AT91_SERIAL2_BUFSIZE == 0)
101 static bool at91_serial_putc_polled(serial_channel *chan, unsigned char c);
103 static Cyg_ErrNo at91_serial_lookup(struct cyg_devtab_entry **tab,
104 struct cyg_devtab_entry *sub_tab,
106 static unsigned char at91_serial_getc_interrupt(serial_channel *chan);
107 #if (defined(CYGPKG_IO_SERIAL_ARM_AT91_SERIAL0) && CYGNUM_IO_SERIAL_ARM_AT91_SERIAL0_BUFSIZE == 0) \
108 || (defined(CYGPKG_IO_SERIAL_ARM_AT91_SERIAL1) && CYGNUM_IO_SERIAL_ARM_AT91_SERIAL1_BUFSIZE == 0) \
109 || (defined(CYGPKG_IO_SERIAL_ARM_AT91_SERIAL2) && CYGNUM_IO_SERIAL_ARM_AT91_SERIAL2_BUFSIZE == 0)
110 static unsigned char at91_serial_getc_polled(serial_channel *chan);
112 static Cyg_ErrNo at91_serial_set_config(serial_channel *chan, cyg_uint32 key,
113 const void *xbuf, cyg_uint32 *len);
114 static void at91_serial_start_xmit(serial_channel *chan);
115 static void at91_serial_stop_xmit(serial_channel *chan);
117 static cyg_uint32 at91_serial_ISR(cyg_vector_t vector, cyg_addrword_t data);
118 static void at91_serial_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data);
120 #if (defined(CYGPKG_IO_SERIAL_ARM_AT91_SERIAL0) && CYGNUM_IO_SERIAL_ARM_AT91_SERIAL0_BUFSIZE > 0) \
121 || (defined(CYGPKG_IO_SERIAL_ARM_AT91_SERIAL1) && CYGNUM_IO_SERIAL_ARM_AT91_SERIAL1_BUFSIZE > 0) \
122 || (defined(CYGPKG_IO_SERIAL_ARM_AT91_SERIAL2) && CYGNUM_IO_SERIAL_ARM_AT91_SERIAL2_BUFSIZE > 0)
123 static SERIAL_FUNS(at91_serial_funs_interrupt,
124 at91_serial_putc_interrupt,
125 at91_serial_getc_interrupt,
126 at91_serial_set_config,
127 at91_serial_start_xmit,
128 at91_serial_stop_xmit
132 #if (defined(CYGPKG_IO_SERIAL_ARM_AT91_SERIAL0) && CYGNUM_IO_SERIAL_ARM_AT91_SERIAL0_BUFSIZE == 0) \
133 || (defined(CYGPKG_IO_SERIAL_ARM_AT91_SERIAL1) && CYGNUM_IO_SERIAL_ARM_AT91_SERIAL1_BUFSIZE == 0) \
134 || (defined(CYGPKG_IO_SERIAL_ARM_AT91_SERIAL2) && CYGNUM_IO_SERIAL_ARM_AT91_SERIAL2_BUFSIZE == 0)
135 static SERIAL_FUNS(at91_serial_funs_polled,
136 at91_serial_putc_polled,
137 at91_serial_getc_polled,
138 at91_serial_set_config,
139 at91_serial_start_xmit,
140 at91_serial_stop_xmit
144 #ifdef CYGPKG_IO_SERIAL_ARM_AT91_SERIAL0
145 static cyg_uint8 at91_serial_rcv_buffer_0
146 [2][CYGNUM_IO_SERIAL_ARM_AT91_SERIAL0_RCV_CHUNK_SIZE + RCVBUF_EXTRA];
147 static at91_serial_info at91_serial_info0 = {
148 base : (CYG_ADDRWORD) AT91_USART0,
149 int_num : CYGNUM_HAL_INTERRUPT_USART0,
150 rcv_chunk_size : CYGNUM_IO_SERIAL_ARM_AT91_SERIAL0_RCV_CHUNK_SIZE,
151 rcv_buffer : {at91_serial_rcv_buffer_0[0], at91_serial_rcv_buffer_0[1]}
154 #if CYGNUM_IO_SERIAL_ARM_AT91_SERIAL0_BUFSIZE > 0
155 static unsigned char at91_serial_out_buf0[CYGNUM_IO_SERIAL_ARM_AT91_SERIAL0_BUFSIZE];
156 static unsigned char at91_serial_in_buf0[CYGNUM_IO_SERIAL_ARM_AT91_SERIAL0_BUFSIZE];
158 static SERIAL_CHANNEL_USING_INTERRUPTS(at91_serial_channel0,
159 at91_serial_funs_interrupt,
161 CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_ARM_AT91_SERIAL0_BAUD),
162 CYG_SERIAL_STOP_DEFAULT,
163 CYG_SERIAL_PARITY_DEFAULT,
164 CYG_SERIAL_WORD_LENGTH_DEFAULT,
165 CYG_SERIAL_FLAGS_DEFAULT,
166 &at91_serial_out_buf0[0], sizeof(at91_serial_out_buf0),
167 &at91_serial_in_buf0[0], sizeof(at91_serial_in_buf0)
170 static SERIAL_CHANNEL(at91_serial_channel0,
171 at91_serial_funs_polled,
173 CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_ARM_AT91_SERIAL0_BAUD),
174 CYG_SERIAL_STOP_DEFAULT,
175 CYG_SERIAL_PARITY_DEFAULT,
176 CYG_SERIAL_WORD_LENGTH_DEFAULT,
177 CYG_SERIAL_FLAGS_DEFAULT
181 DEVTAB_ENTRY(at91_serial_io0,
182 CYGDAT_IO_SERIAL_ARM_AT91_SERIAL0_NAME,
183 0, // Does not depend on a lower level interface
184 &cyg_io_serial_devio,
186 at91_serial_lookup, // Serial driver may need initializing
187 &at91_serial_channel0
189 #endif // CYGPKG_IO_SERIAL_ARM_AT91_SERIAL1
191 #ifdef CYGPKG_IO_SERIAL_ARM_AT91_SERIAL1
192 static cyg_uint8 at91_serial_rcv_buffer_1
193 [2][CYGNUM_IO_SERIAL_ARM_AT91_SERIAL1_RCV_CHUNK_SIZE + RCVBUF_EXTRA];
194 static at91_serial_info at91_serial_info1 = {
195 base : (CYG_ADDRWORD) AT91_USART1,
196 int_num : CYGNUM_HAL_INTERRUPT_USART1,
197 rcv_chunk_size : CYGNUM_IO_SERIAL_ARM_AT91_SERIAL1_RCV_CHUNK_SIZE,
198 rcv_buffer : {at91_serial_rcv_buffer_1[0], at91_serial_rcv_buffer_1[1]}
200 #if CYGNUM_IO_SERIAL_ARM_AT91_SERIAL1_BUFSIZE > 0
201 static unsigned char at91_serial_out_buf1[CYGNUM_IO_SERIAL_ARM_AT91_SERIAL1_BUFSIZE];
202 static unsigned char at91_serial_in_buf1[CYGNUM_IO_SERIAL_ARM_AT91_SERIAL1_BUFSIZE];
204 static SERIAL_CHANNEL_USING_INTERRUPTS(at91_serial_channel1,
205 at91_serial_funs_interrupt,
207 CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_ARM_AT91_SERIAL1_BAUD),
208 CYG_SERIAL_STOP_DEFAULT,
209 CYG_SERIAL_PARITY_DEFAULT,
210 CYG_SERIAL_WORD_LENGTH_DEFAULT,
211 CYG_SERIAL_FLAGS_DEFAULT,
212 &at91_serial_out_buf1[0], sizeof(at91_serial_out_buf1),
213 &at91_serial_in_buf1[0], sizeof(at91_serial_in_buf1)
216 static SERIAL_CHANNEL(at91_serial_channel1,
217 at91_serial_funs_polled,
219 CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_ARM_AT91_SERIAL1_BAUD),
220 CYG_SERIAL_STOP_DEFAULT,
221 CYG_SERIAL_PARITY_DEFAULT,
222 CYG_SERIAL_WORD_LENGTH_DEFAULT,
223 CYG_SERIAL_FLAGS_DEFAULT
227 DEVTAB_ENTRY(at91_serial_io1,
228 CYGDAT_IO_SERIAL_ARM_AT91_SERIAL1_NAME,
229 0, // Does not depend on a lower level interface
230 &cyg_io_serial_devio,
232 at91_serial_lookup, // Serial driver may need initializing
233 &at91_serial_channel1
235 #endif // CYGPKG_IO_SERIAL_ARM_AT91_SERIAL1
238 #ifdef CYGPKG_IO_SERIAL_ARM_AT91_SERIAL2
240 static cyg_uint8 at91_serial_rcv_buffer_2
241 [2][CYGNUM_IO_SERIAL_ARM_AT91_SERIAL2_RCV_CHUNK_SIZE + RCVBUF_EXTRA];
242 static at91_serial_info at91_serial_info2 = {
243 base : (CYG_ADDRWORD) AT91_USART2,
244 int_num : CYGNUM_HAL_INTERRUPT_USART2,
245 rcv_chunk_size : CYGNUM_IO_SERIAL_ARM_AT91_SERIAL2_RCV_CHUNK_SIZE,
246 rcv_buffer : {at91_serial_rcv_buffer_2[0], at91_serial_rcv_buffer_2[1]}
249 #if CYGNUM_IO_SERIAL_ARM_AT91_SERIAL2_BUFSIZE > 0
250 static unsigned char at91_serial_out_buf2[CYGNUM_IO_SERIAL_ARM_AT91_SERIAL2_BUFSIZE];
251 static unsigned char at91_serial_in_buf2[CYGNUM_IO_SERIAL_ARM_AT91_SERIAL2_BUFSIZE];
253 static SERIAL_CHANNEL_USING_INTERRUPTS(at91_serial_channel2,
254 at91_serial_funs_interrupt,
256 CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_ARM_AT91_SERIAL2_BAUD),
257 CYG_SERIAL_STOP_DEFAULT,
258 CYG_SERIAL_PARITY_DEFAULT,
259 CYG_SERIAL_WORD_LENGTH_DEFAULT,
260 CYG_SERIAL_FLAGS_DEFAULT,
261 &at91_serial_out_buf2[0], sizeof(at91_serial_out_buf2),
262 &at91_serial_in_buf2[0], sizeof(at91_serial_in_buf2)
265 static SERIAL_CHANNEL(at91_serial_channel2,
266 at91_serial_funs_polled,
268 CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_ARM_AT91_SERIAL2_BAUD),
269 CYG_SERIAL_STOP_DEFAULT,
270 CYG_SERIAL_PARITY_DEFAULT,
271 CYG_SERIAL_WORD_LENGTH_DEFAULT,
272 CYG_SERIAL_FLAGS_DEFAULT
276 DEVTAB_ENTRY(at91_serial_io2,
277 CYGDAT_IO_SERIAL_ARM_AT91_SERIAL2_NAME,
278 0, // Does not depend on a lower level interface
279 &cyg_io_serial_devio,
281 at91_serial_lookup, // Serial driver may need initializing
282 &at91_serial_channel2
284 #endif // CYGPKG_IO_SERIAL_ARM_AT91_SERIAL2
287 // Internal function to actually configure the hardware to desired baud rate, etc.
289 at91_serial_config_port(serial_channel *chan, cyg_serial_info_t *new_config, bool init)
291 at91_serial_info * const at91_chan = (at91_serial_info *)chan->dev_priv;
292 const CYG_ADDRWORD base = at91_chan->base;
293 cyg_uint32 parity = select_parity[new_config->parity];
294 cyg_uint32 word_length = select_word_length[new_config->word_length-CYGNUM_SERIAL_WORD_LENGTH_5];
295 cyg_uint32 stop_bits = select_stop_bits[new_config->stop];
297 if ((word_length == 0xFF) ||
299 (stop_bits == 0xFF)) {
300 return false; // Unsupported configuration
304 HAL_WRITE_UINT32(base + AT91_US_CR, AT91_US_CR_RxRESET | AT91_US_CR_TxRESET);
307 HAL_WRITE_UINT32(base + AT91_US_MR, parity | word_length | stop_bits);
310 HAL_WRITE_UINT32(base + AT91_US_BRG, AT91_US_BAUD(select_baud[new_config->baud]));
312 // Disable all interrupts
313 HAL_WRITE_UINT32(base + AT91_US_IDR, 0xFFFFFFFF);
316 at91_chan->curbuf = 0;
317 HAL_WRITE_UINT32(base + AT91_US_RPR, (CYG_ADDRESS) at91_chan->rcv_buffer[0]);
318 HAL_WRITE_UINT32(base + AT91_US_RTO, RCV_TIMEOUT);
319 HAL_WRITE_UINT32(base + AT91_US_IER, AT91_US_IER_ENDRX | AT91_US_IER_TIMEOUT);
320 HAL_WRITE_UINT32(base + AT91_US_RCR, at91_chan->rcv_chunk_size);
325 AT91_US_CR_RxENAB | AT91_US_CR_TxENAB | AT91_US_CR_RSTATUS | AT91_US_CR_STTTO
328 // Enable the DMA is the control register exists
330 HAL_WRITE_UINT32(base + AT91_US_PTCR,
335 if (new_config != &chan->config) {
336 chan->config = *new_config;
342 // Function to initialize the device. Called at bootstrap time.
344 at91_serial_init(struct cyg_devtab_entry *tab)
346 serial_channel * const chan = (serial_channel *) tab->priv;
347 at91_serial_info * const at91_chan = (at91_serial_info *) chan->dev_priv;
350 #ifdef CYGDBG_IO_INIT
351 diag_printf("AT91 SERIAL init - dev: %x.%d\n", at91_chan->base, at91_chan->int_num);
353 at91_chan->curbuf = 0;
354 at91_chan->flags = SIFLG_NONE;
356 (chan->callbacks->serial_init)(chan); // Really only required for interrupt driven devices
357 if (chan->out_cbuf.len != 0) {
358 cyg_drv_interrupt_create(at91_chan->int_num,
360 (cyg_addrword_t)chan, // Data item passed to interrupt handler
363 &at91_chan->serial_interrupt_handle,
364 &at91_chan->serial_interrupt);
365 cyg_drv_interrupt_attach(at91_chan->serial_interrupt_handle);
366 cyg_drv_interrupt_unmask(at91_chan->int_num);
368 res = at91_serial_config_port(chan, &chan->config, true);
372 // This routine is called when the device is "looked" up (i.e. attached)
374 at91_serial_lookup(struct cyg_devtab_entry **tab,
375 struct cyg_devtab_entry *sub_tab,
378 serial_channel * const chan = (serial_channel *) (*tab)->priv;
381 // Enable the peripheral clock to the device
382 at91_serial_info * const at91_chan = (at91_serial_info *)chan->dev_priv;
383 HAL_WRITE_UINT32(AT91_PMC+AT91_PMC_PCER,
384 (1 << at91_chan->int_num));
386 (chan->callbacks->serial_init)(chan); // Really only required for interrupt driven devices
390 // Send a character to the device output buffer.
391 // Return 'true' if character is sent to device
393 at91_serial_putc_interrupt(serial_channel *chan, unsigned char c)
395 at91_serial_info * const at91_chan = (at91_serial_info *) chan->dev_priv;
396 const bool res = (at91_chan->flags & SIFLG_XMIT_BUSY) == 0;
399 const CYG_ADDRWORD base = at91_chan->base;
400 HAL_WRITE_UINT32(base + AT91_US_THR, c);
401 at91_chan->flags |= SIFLG_XMIT_BUSY;
406 #if (defined(CYGPKG_IO_SERIAL_ARM_AT91_SERIAL0) && CYGNUM_IO_SERIAL_ARM_AT91_SERIAL0_BUFSIZE == 0) \
407 || (defined(CYGPKG_IO_SERIAL_ARM_AT91_SERIAL1) && CYGNUM_IO_SERIAL_ARM_AT91_SERIAL1_BUFSIZE == 0) \
408 || (defined(CYGPKG_IO_SERIAL_ARM_AT91_SERIAL2) && CYGNUM_IO_SERIAL_ARM_AT91_SERIAL2_BUFSIZE == 0)
410 at91_serial_putc_polled(serial_channel *chan, unsigned char c)
412 at91_serial_info * const at91_chan = (at91_serial_info *) chan->dev_priv;
413 const CYG_ADDRWORD base = at91_chan->base;
416 while (HAL_READ_UINT32(base + AT91_US_CSR, w), (w & AT91_US_IER_TxRDY) == 0)
418 HAL_WRITE_UINT32(base + AT91_US_THR, c);
423 // Fetch a character from the device input buffer, waiting if necessary
425 at91_serial_getc_interrupt(serial_channel *chan)
427 at91_serial_info * const at91_chan = (at91_serial_info *) chan->dev_priv;
428 const CYG_ADDRWORD base = at91_chan->base;
432 HAL_READ_UINT32(base + AT91_US_RHR, c);
433 return (unsigned char) c;
436 #if (defined(CYGPKG_IO_SERIAL_ARM_AT91_SERIAL0) && CYGNUM_IO_SERIAL_ARM_AT91_SERIAL0_BUFSIZE == 0) \
437 || (defined(CYGPKG_IO_SERIAL_ARM_AT91_SERIAL1) && CYGNUM_IO_SERIAL_ARM_AT91_SERIAL1_BUFSIZE == 0) \
438 || (defined(CYGPKG_IO_SERIAL_ARM_AT91_SERIAL2) && CYGNUM_IO_SERIAL_ARM_AT91_SERIAL2_BUFSIZE == 0)
440 at91_serial_getc_polled(serial_channel *chan)
442 at91_serial_info * const at91_chan = (at91_serial_info *) chan->dev_priv;
443 const CYG_ADDRWORD base = at91_chan->base;
446 while (HAL_READ_UINT32(base + AT91_US_CSR, c), (c & AT91_US_IER_RxRDY) == 0)
449 HAL_READ_UINT32(base + AT91_US_RHR, c);
450 return (unsigned char) c;
453 // Set up the device characteristics; baud rate, etc.
455 at91_serial_set_config(serial_channel *chan, cyg_uint32 key,
456 const void *xbuf, cyg_uint32 *len)
459 case CYG_IO_SET_CONFIG_SERIAL_INFO:
461 cyg_serial_info_t *config = (cyg_serial_info_t *)xbuf;
462 if ( *len < sizeof(cyg_serial_info_t) ) {
465 *len = sizeof(cyg_serial_info_t);
466 if ( true != at91_serial_config_port(chan, config, false) )
476 // Enable the transmitter on the device
478 at91_serial_start_xmit(serial_channel *chan)
480 at91_serial_info * const at91_chan = (at91_serial_info *) chan->dev_priv;
481 const CYG_ADDRWORD base = at91_chan->base;
482 unsigned char * chars;
486 if ((at91_chan->flags & SIFLG_XMIT_CONTINUE) == 0) {
487 res = (chan->callbacks->data_xmt_req)(chan, 0xffff, &at91_chan->transmit_size, &chars);
491 HAL_WRITE_UINT32(base + AT91_US_TPR, (CYG_WORD32) chars);
492 HAL_WRITE_UINT32(base + AT91_US_TCR, at91_chan->transmit_size);
493 at91_chan->flags |= SIFLG_XMIT_CONTINUE;
494 HAL_WRITE_UINT32(base + AT91_US_IER, AT91_US_IER_ENDTX);
496 case CYG_XMT_DISABLED:
497 (chan->callbacks->xmt_char)(chan); // Kick transmitter
498 at91_chan->flags |= SIFLG_XMIT_CONTINUE;
499 HAL_WRITE_UINT32(base + AT91_US_IER, AT91_US_IER_TxRDY);
502 // No data or unknown error - can't do anything about it
506 cyg_drv_dsr_unlock();
509 // Disable the transmitter on the device
511 at91_serial_stop_xmit(serial_channel *chan)
513 at91_serial_info * const at91_chan = (at91_serial_info *) chan->dev_priv;
514 const CYG_ADDRWORD base = at91_chan->base;
515 HAL_WRITE_UINT32(base + AT91_US_IDR, AT91_US_IER_TxRDY | AT91_US_IER_ENDTX);
516 at91_chan->flags &= ~SIFLG_XMIT_CONTINUE;
519 // Serial I/O - low level interrupt handler (ISR)
521 at91_serial_ISR(cyg_vector_t vector, cyg_addrword_t data)
523 serial_channel * const chan = (serial_channel *) data;
524 at91_serial_info * const at91_chan = (at91_serial_info *) chan->dev_priv;
525 const CYG_ADDRWORD base = at91_chan->base;
526 CYG_WORD32 stat, mask;
527 cyg_uint32 retcode = 0;
529 HAL_READ_UINT32(base + AT91_US_CSR, stat);
530 HAL_READ_UINT32(base + AT91_US_IMR, mask);
533 if (stat & (AT91_US_IER_ENDRX | AT91_US_IER_TIMEOUT)) {
535 HAL_WRITE_UINT32(base + AT91_US_IDR, AT91_US_IER_ENDRX | AT91_US_IER_TIMEOUT);
536 HAL_WRITE_UINT32(base + AT91_US_RCR, 0);
537 HAL_WRITE_UINT32(base + AT91_US_RTO, 0);
538 HAL_READ_UINT32(base + AT91_US_RPR, x);
541 (CYG_ADDRESS) at91_chan->rcv_buffer[at91_chan->curbuf]
542 + at91_chan->rcv_chunk_size + RCVBUF_EXTRA - x
544 retcode = CYG_ISR_CALL_DSR;
547 if (stat & (AT91_US_IER_TxRDY | AT91_US_IER_ENDTX)) {
548 HAL_WRITE_UINT32(base + AT91_US_IDR, AT91_US_IER_TxRDY | AT91_US_IER_ENDTX);
549 retcode = CYG_ISR_CALL_DSR;
551 at91_chan->stat |= stat;
553 cyg_drv_interrupt_acknowledge(vector);
557 // Serial I/O - high level interrupt handler (DSR)
559 at91_serial_DSR(cyg_vector_t vector, cyg_ucount32 count, cyg_addrword_t data)
561 serial_channel * const chan = (serial_channel *) data;
562 at91_serial_info * const at91_chan = (at91_serial_info *) chan->dev_priv;
563 const CYG_ADDRWORD base = at91_chan->base;
566 cyg_drv_interrupt_mask(vector);
567 stat = at91_chan->stat;
569 cyg_drv_interrupt_unmask(vector);
571 if (stat & (AT91_US_IER_ENDRX | AT91_US_IER_TIMEOUT)) {
572 const cyg_uint8 cb = at91_chan->curbuf, nb = cb ^ 0x01;
573 const cyg_uint8 * p = at91_chan->rcv_buffer[cb], * end;
574 cyg_uint32 temp_word;
576 at91_chan->curbuf = nb;
577 HAL_WRITE_UINT32(base + AT91_US_RCR, 0);
578 HAL_READ_UINT32(base + AT91_US_RPR, temp_word);
579 end = (const cyg_uint8 *)temp_word;
580 HAL_WRITE_UINT32(base + AT91_US_RTO, RCV_TIMEOUT);
581 HAL_WRITE_UINT32(base + AT91_US_CR, AT91_US_CR_RSTATUS | AT91_US_CR_STTTO);
582 HAL_WRITE_UINT32(base + AT91_US_RPR, (CYG_ADDRESS) at91_chan->rcv_buffer[nb]);
583 HAL_WRITE_UINT32(base + AT91_US_RCR, at91_chan->rcv_chunk_size);
586 AT91_US_IER_ENDRX | AT91_US_IER_TIMEOUT
592 unsigned char *space;
594 res = (chan->callbacks->data_rcv_req)(
596 end - at91_chan->rcv_buffer[cb],
604 memcpy(space, p, space_avail);
605 (chan->callbacks->data_rcv_done)(chan, space_avail);
608 case CYG_RCV_DISABLED:
609 (chan->callbacks->rcv_char)(chan, *p++);
612 // Buffer full or unknown error, can't do anything about it
620 if (stat & AT91_US_IER_TxRDY) {
621 at91_chan->flags &= ~SIFLG_XMIT_BUSY;
622 (chan->callbacks->xmt_char)(chan);
623 if (at91_chan->flags & SIFLG_XMIT_CONTINUE)
624 HAL_WRITE_UINT32(base + AT91_US_IER, AT91_US_IER_TxRDY);
627 if (stat & AT91_US_IER_ENDTX) {
628 (chan->callbacks->data_xmt_done)(chan, at91_chan->transmit_size);
629 if (at91_chan->flags & SIFLG_XMIT_CONTINUE) {
630 unsigned char * chars;
633 res = (chan->callbacks->data_xmt_req)(chan, 0xffff, &at91_chan->transmit_size, &chars);
638 HAL_WRITE_UINT32(base + AT91_US_TPR, (CYG_WORD32) chars);
639 HAL_WRITE_UINT32(base + AT91_US_TCR, at91_chan->transmit_size);
640 at91_chan->flags |= SIFLG_XMIT_CONTINUE;
641 HAL_WRITE_UINT32(base + AT91_US_IER, AT91_US_IER_ENDTX);
644 // No data or unknown error - can't do anything about it
645 // CYG_XMT_DISABLED should not happen here!