#define PLATFORM_PREAMBLE flash_header
+#ifdef RAM_BANK1_SIZE
+#define REDBOOT_RAM_START (RAM_BANK1_BASE + RAM_BANK1_SIZE - REDBOOT_OFFSET)
+#else
+#define REDBOOT_RAM_START (RAM_BANK0_BASE + RAM_BANK0_SIZE - REDBOOT_OFFSET)
+#endif
+
+#define redboot_v2p(v) ((v) - __text_start + REDBOOT_RAM_START)
+
// This macro represents the initial startup code for the platform
.macro _platform_setup1
KARO_TX53_SETUP_START:
init_clock
LED_BLINK #1
-Normal_Boot_Continue:
/*
* Note:
* IOMUX/PBC setup is done in C function plf_hardware_init() for simplicity
*/
STACK_Setup:
@ Set up a stack [for calling C code]
- ldr r1, =__startup_stack
- ldr r2, =RAM_BANK0_BASE
- orr sp, r1, r2
+ /* stack is always in the first memory bank, so there is no
+ * need to fixup the address
+ */
+ ldr sp, .__startup_stack
@ Create MMU tables
mcr MMU_CP, 0, r1, c10, c2, 0 // Write Primary Region Remap Register
@ Enable MMU
- adr r2, 10f
+ adr r2, mmu_switched
+#ifdef RAM_BANK1_SIZE
+ ldr r1, =(__text_start - REDBOOT_RAM_START)
+ sub r2, r2, r1
+#endif
mrc MMU_CP, 0, r1, MMU_Control, c0
orr r1, r1, #7 @ enable MMU bit
orr r1, r1, #0x800 @ enable z bit
mov pc, r2 @ Change address spaces
.ltorg
.align 5
-10:
+mmu_switched:
LED_BLINK #4
.endm @ _platform_setup1
#define ESDOR_CLK_PERIOD_ns (1000000000 / CKIL_FREQ_Hz / 2) /* base clock for ESDOR values */
/* DDR3 SDRAM */
-#if SDRAM_SIZE > SZ_512M
+#if SDRAM_SIZE > RAM_BANK0_SIZE
#define BANK_ADDR_BITS 2
#else
#define BANK_ADDR_BITS 1
.word 0 /* Bad Block marker offset in spare area */
fcb_end:
-#if BANK_ADDR_BITS > 1
-#define REDBOOT_RAM_START (RAM_BANK1_BASE + RAM_BANK1_SIZE - REDBOOT_OFFSET)
-#else
-#define REDBOOT_RAM_START (RAM_BANK0_BASE + RAM_BANK0_SIZE - REDBOOT_OFFSET)
-#endif
-
-#define redboot_v2p(v) ((v) - __text_start + REDBOOT_RAM_START)
-
.org 0x400
ivt_header:
.word CPU_2_BE_32((0xd1 << 24) | (32 << 8) | 0x40)
.endif
.endm
-MXC_REDBOOT_ROM_START: .long SDRAM_BASE_ADDR + SDRAM_SIZE - REDBOOT_OFFSET
-
-#if SDRAM_CLK > 333
-CCM_CBCDR_VAL1: .word 0x02888944
-CCM_CBCDR_VAL2: .word 0x00888944
-#else
-CCM_CBCDR_VAL1: .word 0x02888644
-CCM_CBCDR_VAL2: .word 0x00888644
-#endif
-
W_CSCMR1_VAL: .word 0xa6a2a020
W_CSCDR1_VAL: .word 0x00080b18
W_DP_OP_1000: .word DP_OP_1000
#include CYGBLD_HAL_PLF_DEFS_H
#include <cyg/hal/hal_soc.h>
+#define __ul(x) ((unsigned long)(x))
+#define CYGARC_PHYSICAL_ADDRESS(x) ((__ul(x) < SDRAM_SIZE) ? \
+ (__ul(x) + ((__ul(x) < RAM_BANK0_SIZE) ? \
+ RAM_BANK0_BASE : RAM_BANK1_BASE - RAM_BANK0_SIZE)) : \
+ ((__ul(x) >= RAM_BANK0_BASE) && (__ul(x) < RAM_BANK0_BASE + SDRAM_SIZE)) ? \
+ (((__ul(x) < RAM_BANK0_BASE + RAM_BANK0_SIZE)) ? \
+ __ul(x) : __ul(x) - RAM_BANK0_BASE + RAM_BANK1_BASE - RAM_BANK0_SIZE) : ~0)
+
#ifdef RAM_BANK1_SIZE
#define CYGHWR_REDBOOT_LINUX_ATAG_MEM(_p_) \
CYG_MACRO_START \